3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
10 constant WORD_WIDTH : INTEGER := 32;
11 constant HWORD_WIDTH : INTEGER := 16;
12 constant BYTE_WIDTH : INTEGER := 8;
13 constant OPCODE_WIDTH : INTEGER := 5;
14 constant DISPL_WIDTH : INTEGER := 15;
16 subtype byte_t is std_logic_vector(BYTE_WIDTH-1 downto 0);
17 subtype hword_t is std_logic_vector(HWORD_WIDTH-1 downto 0);
18 subtype word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
20 subtype gp_register_t is word_t;
22 subtype byte_en_t is std_logic_vector((gp_register_t'length/byte_t'length-1) downto 0);
24 constant REG_ZERO : gp_register_t := (others => '0');
26 constant INSTR_ADDR_WIDTH : INTEGER := 32;
27 constant PHYS_INSTR_ADDR_WIDTH : INTEGER := 11;
28 constant REG_ADDR_WIDTH : INTEGER := 4;
29 constant DATA_ADDR_WIDTH : INTEGER := 11;
30 constant PHYS_DATA_ADDR_WIDTH : INTEGER := 32;
32 constant NUM_OP_OPT_WIDTH : INTEGER := 6;
33 constant COND_WIDTH : INTEGER := 4;
34 constant DATA_END_ADDR : integer := ((2**DATA_ADDR_WIDTH)-1);
37 subtype instruction_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
38 subtype instruction_addr_t is std_logic_vector(INSTR_ADDR_WIDTH-1 downto 0);
39 subtype instr_addr_t is instruction_addr_t;
41 subtype gp_addr_t is std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
42 subtype data_ram_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
43 subtype data_ram_addr_t is std_logic_vector(DATA_ADDR_WIDTH-1 downto 0);
45 subtype opcode_t is std_logic_vector(OPCODE_WIDTH-1 downto 0);
46 subtype condition_t is std_logic_vector(COND_WIDTH-1 downto 0);
48 --Opcode consits of decoded group information type and option bits
49 --currently not complete, might need option increase too.
50 --IMMEDIATE always in right_operand (src2)
52 constant IMM_OPT : integer := 0; -- no sharing
54 constant SUB_OPT : integer := 1;
55 constant ARITH_OPT : integer := 1;
57 constant CARRY_OPT : integer := 2;
59 constant RIGHT_OPT : integer := 3;
60 constant JMP_REG_OPT : integer := 3;
61 constant ST_OPT : integer := 3; -- store opt
62 constant RET_OPT : integer := 3;
64 constant NO_PSW_OPT : integer := 4;--no sharing
65 constant NO_DST_OPT : integer := 5; --no sharing
67 type op_info_t is (ADDSUB_OP,AND_OP,OR_OP, XOR_OP,SHIFT_OP, LDST_OP, JMP_OP, JMP_ST_OP);
68 subtype op_opt_t is std_logic_vector(NUM_OP_OPT_WIDTH-1 downto 0);
71 type instruction_rec is record
73 predicates : std_logic_vector(3 downto 0);
77 reg_dest_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
78 reg_src1_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
79 reg_src2_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
81 immediate : std_logic_vector(WORD_WIDTH-1 downto 0);
83 displacement : gp_register_t;
85 jmptype : std_logic_vector(1 downto 0);
87 high_low, fill, signext, bp: std_logic;
96 type read_through_write_rec is record
98 rtw_reg : gp_register_t;
100 rtw_reg2 : std_logic;
101 immediate : gp_register_t;
103 reg1_addr : gp_addr_t;
104 reg2_addr : gp_addr_t;
108 type dec_op is record
109 condition : condition_t;
110 op_group : op_info_t;
111 op_detail : op_opt_t;
114 displacement : gp_register_t;
115 prog_cnt : instr_addr_t;
117 src1 : gp_register_t;
118 src2 : gp_register_t;
127 type writeback_rec is record
128 -- result : in gp_register_t; --reg (alu result or jumpaddr)
129 -- result_addr : in gp_addr_t; --reg
130 address : word_t; --ureg
131 -- alu_jmp : in std_logic; --reg
132 -- br_pred : in std_logic; --reg
133 -- write_en : in std_logic; --reg (register file)
134 dmem_en : std_logic; --ureg (jump addr in mem or in address)
135 dmem_write_en : std_logic; --ureg
136 hword : std_logic; --ureg
139 data : gp_register_t;
142 type exec2wb_rec is record
143 result : gp_register_t; --reg (alu result or jumpaddr)
144 result_addr : gp_addr_t; --reg
145 address : word_t; --ureg
146 ram_data : word_t; --ureg
147 alu_jmp : std_logic; --reg
148 br_pred : std_logic; --reg
149 write_en : std_logic; --reg (register file) bei jump 1 wenn addr in result
150 dmem_en : std_logic; --ureg (jump addr in mem or in address)
151 dmem_write_en : std_logic; --ureg
152 hword : std_logic; --ureg
153 byte_s : std_logic; --ureg
156 function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector;
157 function log2c(constant value : in integer range 0 to integer'high) return integer;
158 end package common_pkg;
160 package body common_pkg is
162 function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector is
164 return std_logic_vector(UNSIGNED(value)+by);
167 function log2c(constant value : in integer range 0 to integer'high) return integer is
168 variable ret_value : integer;
169 variable cur_value : integer;
174 while cur_value < value loop
175 ret_value := ret_value + 1;
176 cur_value := cur_value * 2;
181 end package body common_pkg;