cpu/sim/testcore1.do

   1 vlib work
   2 vmap work work
   3
   4 vcom -work work ../src/mem_pkg.vhd
   5 vcom -work work ../src/r_w_ram.vhd
   6 vcom -work work ../src/r_w_ram_b.vhd
   7 vcom -work work ../src/r2_w_ram.vhd
   8 vcom -work work ../src/r2_w_ram_b.vhd
   9 vcom -work work ../src/common_pkg.vhd
  10 vcom -work work ../src/extension_pkg.vhd
  11 vcom -work work ../src/core_pkg.vhd
  12 vcom -work work ../src/decoder.vhd
  13 vcom -work work ../src/decoder_b.vhd
  14 vcom -work work ../src/fetch_stage.vhd
  15 vcom -work work ../src/fetch_stage_b.vhd
  16 vcom -work work ../src/decode_stage.vhd
  17 vcom -work work ../src/decode_stage_b.vhd
  18
  19 vcom -work work ../src/alu_pkg.vhd
  20
  21
  22 vcom -work work ../src/exec_op.vhd
  23 vcom -work work ../src/exec_op/add_op_b.vhd
  24 vcom -work work ../src/exec_op/and_op_b.vhd
  25 vcom -work work ../src/exec_op/or_op_b.vhd
  26 vcom -work work ../src/exec_op/xor_op_b.vhd
  27 vcom -work work ../src/exec_op/shift_op_b.vhd
  28
  29 vcom -work work ../src/alu.vhd
  30 vcom -work work ../src/alu_b.vhd
  31
  32 vcom -work work ../src/gpm.vhd
  33 vcom -work work ../src/gpm_b.vhd
  34
  35 vcom -work work ../src/extension_pkg.vhd
  36 vcom -work work ../src/extension.vhd
  37 vcom -work work ../src/extension_b.vhd
  38
  39
  40 vcom -work work ../src/extension_uart_pkg.vhd
  41 vcom -work work ../src/rs232_tx.vhd
  42 vcom -work work ../src/rs232_tx_arc.vhd
  43 vcom -work work ../src/rs232_rx.vhd
  44 vcom -work work ../src/rs232_rx_arc.vhd
  45 vcom -work work ../src/extension_uart.vhd
  46 vcom -work work ../src/extension_uart_b.vhd
  47
  48 vcom -work work ../src/execute_stage.vhd
  49 vcom -work work ../src/execute_stage_b.vhd
  50
  51
  52 vcom -work work ../src/writeback_stage.vhd
  53 vcom -work work ../src/writeback_stage_b.vhd
  54
  55 vcom -work work ../src/pipeline_tb.vhd
  56
  57 vsim work.pipeline_conf_beh -t ns
  58
  59 add wave  -group system -format logic /pipeline_tb/sys_clk_pin
  60 add wave  -group system -format logic /pipeline_tb/sys_res_n_pin
  61
  62 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr_nxt
  63 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr
  64 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_rd_data
  65 add wave  -group fetchstageregister -radix hexadecimal /pipeline_tb/fetch_st/instruction
  66 add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/branch_prediction_bit
  67 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
  68
  69 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instruction
  70 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instr_spl
  71 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instr_spl.reg_dest_addr
  72 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instr_spl.reg_src1_addr
  73 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instr_spl.reg_src2_addr
  74
  75 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/reg_we
  76 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
  77 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
  78
  79
  80
  81
  82 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/reg1_mem_data
  83 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/reg2_mem_data
  84 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/rtw_rec
  85 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/rtw_rec.rtw_reg1
  86 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/rtw_rec.rtw_reg2
  87 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/to_next_stage
  88 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/to_next_stage.src1
  89 add wave  -group decodestageregister -radix hexadecimal /pipeline_tb/decode_st/to_next_stage.src2
  90
  91
  92
  93
  94
  95
  96 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr
  97 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr.daddr
  98 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr.saddr1
  99 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr.saddr2
 100 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr.src1
 101 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/dec_instr.src2
 102 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/reg_we
 103 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/reg_addr
 104 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/regfile_val
 105 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/alu_inst/left_operand
 106 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/alu_inst/right_operand
 107 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/reg_nxt
 108
 109
 110 add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
 111 add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/reg
 112 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result
 113 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result_addr
 114 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/alu_jmp
 115 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/br_pred
 116 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/write_en
 117 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/address
 118
 119 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_we
 120 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_addr
 121 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/regfile_val
 122
 123
 124 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/ext_uart
 125 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/ext_reg
 126 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w1_st_co_nxt
 127 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w2_uart_config
 128 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w3_uart_send
 129 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w4_uart_receive
 130 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/data_out
 131 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/new_tx_data
 132 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/bus_tx
 133 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/tx_data
 134 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/tx_rdy
 135 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/tx_rdy_int
 136 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/sys_clk
 137 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/cnt
 138 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/stop_bit
 139 add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/bd_rate
 140
 141
 142 run 5000 ns