c77feb02ae23ce5ba6890fdcfc37aec093d2a390
[calu.git] / cpu / sim / testcore.do
1 vlib work
2 vmap work work
3
4 vcom -work work ../src/mem_pkg.vhd
5 vcom -work work ../src/r_w_ram.vhd
6 vcom -work work ../src/r_w_ram_b.vhd
7 vcom -work work ../src/r2_w_ram.vhd
8 vcom -work work ../src/r2_w_ram_b.vhd
9 vcom -work work ../src/common_pkg.vhd
10 vcom -work work ../src/extension_pkg.vhd
11 vcom -work work ../src/core_pkg.vhd
12 vcom -work work ../src/decoder.vhd
13 vcom -work work ../src/decoder_b.vhd
14 vcom -work work ../src/fetch_stage.vhd
15 vcom -work work ../src/fetch_stage_b.vhd
16 vcom -work work ../src/decode_stage.vhd
17 vcom -work work ../src/decode_stage_b.vhd
18
19 vcom -work work ../src/alu_pkg.vhd
20 vcom -work work ../src/extension_pkg.vhd
21
22 vcom -work work ../src/exec_op.vhd
23 vcom -work work ../src/exec_op/add_op_b.vhd
24 vcom -work work ../src/exec_op/and_op_b.vhd
25 vcom -work work ../src/exec_op/or_op_b.vhd
26 vcom -work work ../src/exec_op/xor_op_b.vhd
27 vcom -work work ../src/exec_op/shift_op_b.vhd
28
29 vcom -work work ../src/alu.vhd
30 vcom -work work ../src/alu_b.vhd
31 vcom -work work ../src/extension_pkg.vhd
32 #vcom -work work ../src/gpm_pkg.vhd
33
34 #vcom -work work ../src/gpm.vhd
35 #vcom -work work ../src/gpm_b.vhd
36
37 vcom -work work ../src/extension.vhd
38 vcom -work work ../src/extension_b.vhd
39
40 vcom -work work ../src/execute_stage.vhd
41 vcom -work work ../src/execute_stage_b.vhd
42
43
44 vcom -work work ../src/writeback_stage.vhd
45 vcom -work work ../src/writeback_stage_b.vhd
46
47 vcom -work work ../src/pipeline_tb.vhd
48
49 vsim work.pipeline_conf_beh -t ns
50
51 add wave  -format logic /pipeline_tb/sys_clk_pin
52 add wave  -format logic /pipeline_tb/sys_res_n_pin
53 add wave  -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr
54 add wave  -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr_nxt
55 add wave  -format logic /pipeline_tb/fetch_st/branch_prediction_bit
56 add wave  -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
57
58 add wave  -radix hexadecimal /pipeline_tb/decode_st/instruction
59 add wave  -radix hexadecimal /pipeline_tb/decode_st/instr_spl
60 add wave  -radix hexadecimal /pipeline_tb/decode_st/to_next_stage
61 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg1_mem_data
62 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg2_mem_data
63 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec_nxt
64 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec
65 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
66 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
67 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
68
69 add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
70
71 add wave  -radix hexadecimal /pipeline_tb/addr_pin
72 add wave  -radix hexadecimal /pipeline_tb/data_pin
73 add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
74
75 run 5000 ns