4ba2fbb1e4264f909f82083250c2d38448183c25
[calu.git] / cpu / sim / testcore.do
1 vlib work
2 vmap work work
3
4 vcom -work work ../src/mem_pkg.vhd
5 vcom -work work ../src/r_w_ram.vhd
6 vcom -work work ../src/r_w_ram_b.vhd
7 vcom -work work ../src/r2_w_ram.vhd
8 vcom -work work ../src/r2_w_ram_b.vhd
9 vcom -work work ../src/rom.vhd
10 vcom -work work ../src/rom_b.vhd
11 vcom -work work ../src/common_pkg.vhd
12 vcom -work work ../src/extension_pkg.vhd
13 vcom -work work ../src/core_pkg.vhd
14 vcom -work work ../src/extension_uart_pkg.vhd
15 vcom -work work ../src/extension_uart.vhd
16 vcom -work work ../src/extension_uart_b.vhd
17 vcom -work work ../src/extension_7seg_pkg.vhd
18 vcom -work work ../src/extension_7seg.vhd
19 vcom -work work ../src/extension_7seg_b.vhd
20 vcom -work work ../src/rs232_tx.vhd
21 vcom -work work ../src/rs232_tx_arc.vhd
22 vcom -work work ../src/rs232_rx.vhd
23 vcom -work work ../src/rs232_rx_arc.vhd
24
25 vcom -work work ../src/decoder.vhd
26 vcom -work work ../src/decoder_b.vhd
27 vcom -work work ../src/fetch_stage.vhd
28 vcom -work work ../src/fetch_stage_b.vhd
29 vcom -work work ../src/decode_stage.vhd
30 vcom -work work ../src/decode_stage_b.vhd
31
32 vcom -work work ../src/alu_pkg.vhd
33 vcom -work work ../src/extension_pkg.vhd
34
35 vcom -work work ../src/exec_op.vhd
36 vcom -work work ../src/exec_op/add_op_b.vhd
37 vcom -work work ../src/exec_op/and_op_b.vhd
38 vcom -work work ../src/exec_op/or_op_b.vhd
39 vcom -work work ../src/exec_op/xor_op_b.vhd
40 vcom -work work ../src/exec_op/shift_op_b.vhd
41
42 vcom -work work ../src/alu.vhd
43 vcom -work work ../src/alu_b.vhd
44 vcom -work work ../src/extension_pkg.vhd
45 #vcom -work work ../src/gpm_pkg.vhd
46
47 #vcom -work work ../src/gpm.vhd
48 #vcom -work work ../src/gpm_b.vhd
49
50 vcom -work work ../src/extension.vhd
51 vcom -work work ../src/extension_b.vhd
52
53 vcom -work work ../src/execute_stage.vhd
54 vcom -work work ../src/execute_stage_b.vhd
55
56
57 vcom -work work ../src/writeback_stage.vhd
58 vcom -work work ../src/writeback_stage_b.vhd
59
60 vcom -work work ../src/pipeline_tb.vhd
61
62 vsim work.pipeline_conf_beh -t ns
63
64 add wave  -format logic /pipeline_tb/sys_clk_pin
65 add wave  -format logic /pipeline_tb/sys_res_n_pin
66 add wave  -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr
67 add wave  -radix hexadecimal /pipeline_tb/fetch_st/instr_r_addr_nxt
68 add wave  -format logic /pipeline_tb/fetch_st/branch_prediction_bit
69 add wave  -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
70
71 add wave  -radix hexadecimal /pipeline_tb/decode_st/instruction
72 add wave  -radix hexadecimal /pipeline_tb/decode_st/instr_spl
73 add wave  -radix hexadecimal /pipeline_tb/decode_st/to_next_stage
74 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg1_mem_data
75 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg2_mem_data
76 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec_nxt
77 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec
78 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
79 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
80 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
81
82 add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
83
84 add wave  -radix hexadecimal /pipeline_tb/addr_pin
85 add wave  -radix hexadecimal /pipeline_tb/data_pin
86 add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_ram_read
87 add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
88 add wave  -radix hexadecimal /pipeline_tb/writeback_st/dmem_we
89 add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_addr
90
91 add wave  -radix hexadecimal /pipeline_tb/tx_pin
92 add wave  -radix hexadecimal /pipeline_tb/rx_pin
93
94 add wave  -radix decimal     /pipeline_tb/cycle_cnt
95
96 run 10000 ns