1 /* `Deep Thought', a softcore CPU implemented on a FPGA
3 Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
4 Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
5 Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
6 Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
7 Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
9 This program is free software: you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation, either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "../Iinstr.hpp"
25 class Cldw : public Iinstr {
30 std::string toString();
35 * Name: create_instruction
36 * Purpose: if compiled as shared library, this functions creates the
39 * Returns: pointer to instruction object
41 extern "C" Iinstr* create_instruction() {
45 Iinstr* Cldw::getNew()
51 * Name: destroy_instruction
52 * Purpose: if compiled as shared library, this functions destoys the
55 * Parameter: IInstruction - the instruction object to delete
57 extern "C" void destroy_instruction(Iinstr* p) {
67 void Cldw::evalInstr()
71 dynamic_bitset<> immb = argbits;
73 this->m_imm = this->generate15ImmSign(immb.to_ulong());
76 m_ra = this->getRegister(argbits);
78 m_rd = this->getRegister(argbits);
82 void Cldw::execInstr()
84 //cout << "should exec " << this->toString() << endl;
85 CDat val = this->m_cpu->getRegister(this->m_ra);
87 val = this->m_cpu->getRAM(val);
88 this->m_cpu->setRegister(this->m_rd,val);
91 std::string Cldw::toString()
94 op << this->getName();
96 op << this->getConditionFlag() << " r" << m_rd << ", " << m_imm << "(r" << m_ra << ")";