disasm/sim: changed interface, branch => br, features++
[calu.git] / 3b_sim / ccpu.cpp
1 #include "ccpu.hpp"
2
3 /*              CDat m_pc, m_pc_next;
4                 CMem m_regfile, m_ram;
5 */
6
7 //void registerExtension() {};
8
9 void CCpu::tick()
10 {
11         // signal extensions
12         // Todo
13
14         m_pc = m_pc_next;
15         m_pc_next += 4;
16         Iinstr* instr = this->getProg(m_pc);
17         if(instr == NULL) {
18                 throw string("Out of Instructions!");
19         }
20         if(this->conditionMet(instr->getCondition())) {
21                 instr->execInstr();
22         }
23 }
24
25 bool CCpu::conditionMet(short cond)
26 {
27         switch(cond) {
28                 case NOT_EQUAL:
29                         return !this->m_Z;
30                         break;
31                 case EQUAL:
32                         return this->m_Z;
33                         break;
34                 case NOT_OVERFLOW:
35                         return !this->m_O;
36                         break;
37                 case OVER_FLOW:
38                         return this->m_O;
39                         break;
40                 case NOT_CARRY:
41                         return !this->m_C;
42                         break;
43                 case CARRY:
44                         return this->m_C;
45                         break;
46                 case NOT_SIGNED:
47                         return !this->m_S;
48                         break;
49                 case SIGNED:
50                         return this->m_S;
51                         break;
52                 case ABOVE:
53                         return (!this->m_C && !this->m_Z);
54                         break;
55                 case BELOW_EQ:
56                         return (this->m_C || this->m_Z);
57                         break;
58                 case GREATER_EQ:
59                         return (this->m_S == this->m_O);
60                         break;
61                 case LESS:
62                         return (this->m_S != this->m_O);
63                         break;
64                 case GREATER:
65                         return (!this->m_Z && (this->m_S == this->m_O));
66                         break;
67                 case LESS_EQ:
68                         return (!this->m_Z || (this->m_S != this->m_O));
69                         break;
70                 case ALWAYS:
71                         return true;
72                         break;
73                 case NEVER:
74                         return false;
75                         break;
76                 default:
77                         cerr << "What did you do? more than 16 values in 5 bits?!" << endl;
78                         return false;
79         }
80
81 }
82
83 CDat CCpu::getCurPC() const
84 {
85         return m_pc;
86 }
87
88 void CCpu::setNextPC(CDat val)
89 {
90         m_pc_next = val;
91 }
92
93 void CCpu::updateFlags(CDat val) {
94         this->m_Z = (val == 0);
95         this->m_S = ((val >> (BIT_LEN-1)) & 0x1);
96         this->m_C = false;
97         this->m_O = false;
98 }
99
100 void CCpu::updateFlags(bool z, bool o, bool c, bool s)
101 {
102         this->m_Z = z;
103         this->m_O = o;
104         this->m_C = c;
105         this->m_S = s;
106 }
107
108 CDat CCpu::getRegister(const int addr) const
109 {
110         return m_reg.get(addr);
111 }
112
113 void CCpu::setRegister(const int addr, CDat data)
114 {
115         m_reg.set(addr, data);
116 }
117
118 CDat CCpu::getRAM(const int addr) const
119 {
120         return m_ram.get(addr);
121 }
122 void CCpu::setRAM(const int addr, CDat data)
123 {
124         m_ram.set(addr, data);
125 }
126
127 void CCpu::setProg(int addr, Iinstr* instr)
128 {
129         m_prog.set(addr, instr);
130 }
131
132 Iinstr* CCpu::getProg(const int addr) const
133 {
134         return m_prog.get(addr);
135 }
136
137 int CCpu::getStack() const
138 {
139         return this->m_stack;
140 }
141
142 void CCpu::setStack(const int val)
143 {
144         this->m_stack = val;
145 }
146
147 CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_pc(0), m_pc_next(0), m_reg(regs), m_ram(ram), m_prog(prog), m_stack(0)
148 {
149 }
150
151