Stronger assembler constraints for cmpxchg on i386/x86_64.

* src/vm/jit/i386/md-atomic.hpp, src/vm/jit/x86_64/md-atomic.hpp: Said changes.

diff --git a/src/vm/jit/i386/md-atomic.hpp b/src/vm/jit/i386/md-atomic.hpp
index d6ea3d777f5b89451be85d0e76ac7980d84cd4c1..37944004cca43ead30f4dc1f0e3fe6474310c6d0 100644 (file)
--- a/src/vm/jit/i386/md-atomic.hpp
+++ b/src/vm/jit/i386/md-atomic.hpp
@@ -48,7 +48,8 @@ inline uint32_t Atomic::compare_and_swap(volatile uint32_t *p, uint32_t oldval,
 
        __asm__ __volatile__ ("lock; cmpxchgl %2, %1"
                                                  : "=a" (result), "=m" (*p)
-                                                 : "r" (newval), "m" (*p), "0" (oldval));
+                                                 : "r" (newval), "m" (*p), "0" (oldval)
+                                                 : "cc");
 
        return result;
 }
@@ -108,7 +109,9 @@ inline void Atomic::write_memory_barrier(void)
  */
 inline void Atomic::instruction_barrier(void)
 {
-       // Nothing.
+       // We need the "memory" constraint here because compare_and_swap does not
+       // have it.
+       __asm__ __volatile__ ("" : : : "memory");
 }
 
 #endif // _MD_ATOMIC_HPP

diff --git a/src/vm/jit/x86_64/md-atomic.hpp b/src/vm/jit/x86_64/md-atomic.hpp
index accef01af052a3cf426f335c05b12df494923042..74e6b707abca71151001a83e867fc67dbd75d337 100644 (file)
--- a/src/vm/jit/x86_64/md-atomic.hpp
+++ b/src/vm/jit/x86_64/md-atomic.hpp
@@ -48,7 +48,8 @@ inline uint32_t Atomic::compare_and_swap(volatile uint32_t *p, uint32_t oldval,
 
        __asm__ __volatile__ ("lock; cmpxchgl %2, %1"
                                                  : "=a" (result), "=m" (*p)
-                                                 : "r" (newval), "m" (*p), "0" (oldval));
+                                                 : "r" (newval), "m" (*p), "0" (oldval)
+                                                 : "cc");
 
        return result;
 }
@@ -69,7 +70,8 @@ inline uint64_t Atomic::compare_and_swap(volatile uint64_t *p, uint64_t oldval,
 
        __asm__ __volatile__ ("lock; cmpxchgq %2, %1"
                                                  : "=a" (result), "=m" (*p)
-                                                 : "r" (newval), "m" (*p), "0" (oldval));
+                                                 : "r" (newval), "m" (*p), "0" (oldval)
+                                                 : "cc");
 
        return result;
 }
@@ -113,7 +115,9 @@ inline void Atomic::write_memory_barrier(void)
  */
 inline void Atomic::instruction_barrier(void)
 {
-       // Nothing.
+       // We need the "memory" constraint here because compare_and_swap does not
+       // have it.
+       __asm__ __volatile__ ("" : : : "memory");
 }
 
 #endif // _MD_ATOMIC_HPP