* src/vm/jit/arm/emit.c (emit_verbosecall_enter): Keep stack 8-byte

aligned.
(emit_verbosecall_exit): Added comment.
* src/vm/jit/arm/asmpart.S (asm_call_jit_compiler): Keep stack 8-byte
aligned.

diff --git a/src/vm/jit/arm/asmpart.S b/src/vm/jit/arm/asmpart.S
index 13f15a9f6f16bf72617c62e69af337ff2c39b90f..a866859b2b2dd485e45deb04b2b78c220ce4ac48 100644 (file)
--- a/src/vm/jit/arm/asmpart.S
+++ b/src/vm/jit/arm/asmpart.S
@@ -22,7 +22,7 @@
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    02110-1301, USA.
 
-   $Id: asmpart.S 7259 2007-01-30 13:58:35Z twisti $
+   $Id: asmpart.S 7325 2007-02-11 20:10:35Z twisti $
 
 */
 
@@ -216,10 +216,11 @@ asm_vm_call_method_double:
 *                                                                              *
 *******************************************************************************/
 
-#define MYSTACKSIZE (5*4)
+#define MYSTACKSIZE (6*4)
 
 asm_call_jit_compiler:
        SAVE_ARGUMENT_REGISTERS             /* save our argument registers & LR   */
+       sub   sp, sp, #4                    /* keep stack 8-byte aligned          */
 
        mov   a0, itmp1                     /* pass methodinfo pointer            */
        mov   a1, mptr                      /* pass method pointer                */
@@ -231,6 +232,7 @@ asm_call_jit_compiler:
        tst   itmp1,itmp1                   /* check for exeption                 */
        beq   L_asm_call_jit_compiler_exception
 
+       add   sp, sp, #4                    /* keep stack 8-byte aligned          */
        RESTORE_ARGUMENT_REGISTERS          /* load our argument registers & LR   */
 
        mov   ip, itmp1
@@ -240,6 +242,7 @@ L_asm_call_jit_compiler_exception:
        bl    exceptions_get_and_clear_exception
        mov   xptr, res1                    /* get exception                      */
 
+       add   sp, sp, #4                    /* keep stack 8-byte aligned          */
        RESTORE_ARGUMENT_REGISTERS          /* load LR                            */
 
        sub   xpc, lr, #4                   /* xpc = instruction that called us   */

diff --git a/src/vm/jit/arm/emit.c b/src/vm/jit/arm/emit.c
index 0a1b471f3d8293398995159135d37188ea1be6f7..c5ab738d8c1429d95b25f54ce507d1abf626d7c0 100644 (file)
--- a/src/vm/jit/arm/emit.c
+++ b/src/vm/jit/arm/emit.c
@@ -658,11 +658,13 @@ void emit_verbosecall_enter(jitdata *jd)
 
        M_NOP;
 
-       /* save argument registers to stack (including LR and PV) */
+       /* Save argument registers to stack (including LR and PV).  Keep
+          stack 8-byte aligned. */
+
        M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
-       M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4);     /* space for a3, a4 and m */
+       M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
 
-       stackframesize += 6 + 2 + 2 + 1;
+       stackframesize += 6 + 2 + 2 + 1 + 1;
 
        /* prepare args for tracer */
 
@@ -723,9 +725,10 @@ void emit_verbosecall_enter(jitdata *jd)
 
        M_LONGBRANCH(builtin_verbosecall_enter);
 
-       /* restore argument registers from stack */
+       /* Restore argument registers from stack.  Keep stack 8-byte
+          aligned. */
 
-       M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4);        /* free argument stack */
+       M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4);    /* free argument stack */
        M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 
        /* mark trace code */
@@ -764,6 +767,8 @@ void emit_verbosecall_exit(jitdata *jd)
 
        M_NOP;
 
+       /* Keep stack 8-byte aligned. */
+
        M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
        M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4);              /* space for f and m */
 
@@ -792,6 +797,8 @@ void emit_verbosecall_exit(jitdata *jd)
        M_AST(REG_ITMP1, REG_SP, 1 * 4);
        M_LONGBRANCH(builtin_verbosecall_exit);
 
+       /* Keep stack 8-byte aligned. */
+
        M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4);            /* free argument stack */
        M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);