* src/vm/jit/alpha/disass.c (regs): Removed.

* src/vm/jit/alpha/md-abi.c (regs): Added.

diff --git a/src/vm/jit/alpha/disass.c b/src/vm/jit/alpha/disass.c
index 966bc5976a735c010e7ac2406efffecfcb5d5c97..593debfaeea91ce3162d79963d43641a9e85bf6e 100644 (file)
--- a/src/vm/jit/alpha/disass.c
+++ b/src/vm/jit/alpha/disass.c
@@ -26,18 +26,22 @@
 
    Authors: Andreas Krall
             Reinhard Grafl
+            Christian Thalinger
 
-   Changes: Christian Thalinger
-
-   $Id: disass.c 4357 2006-01-22 23:33:38Z twisti $
+   $Id: disass.c 6261 2006-12-28 21:21:08Z twisti $
 
 */
 
 
+#include "config.h"
+
 #include <stdio.h>
 
 #include "vm/types.h"
 
+#include "vm/global.h"
+#include "vm/jit/disass.h"
+
 
 /*  The disassembler uses two tables for decoding the instructions. The first
        table (ops) is used to classify the instructions based on the op code and
@@ -243,47 +247,6 @@ static struct { u2 op, fun; char *name; }  op3s[] = {
 };
 
 
-/* name table for 32 integer registers                                        */
-
-char *regs[] = {
-       /* 0x00 */  "v0",   /*  "$0", */
-       /* 0x01 */  "t0",   /*  "$1", */
-       /* 0x02 */  "t1",   /*  "$2", */
-       /* 0x03 */  "t2",   /*  "$3", */
-       /* 0x04 */  "t3",   /*  "$4", */
-       /* 0x05 */  "t4",   /*  "$5", */
-       /* 0x06 */  "t5",   /*  "$6", */
-       /* 0x07 */  "t6",   /*  "$7", */
-
-       /* 0x08 */  "t7",   /*  "$8", */
-       /* 0x09 */  "s0",   /*  "$9", */
-       /* 0x0a */  "s1",   /* "$10", */
-       /* 0x0b */  "s2",   /* "$11", */
-       /* 0x0c */  "s3",   /* "$12", */
-       /* 0x0d */  "s4",   /* "$13", */
-       /* 0x0e */  "s5",   /* "$14", */
-       /* 0x0f */  "s6",   /* "$15", */
-
-       /* 0x10 */  "a0",   /* "$16", */
-       /* 0x11 */  "a1",   /* "$17", */
-       /* 0x12 */  "a2",   /* "$18", */
-       /* 0x13 */  "a3",   /* "$19", */
-       /* 0x14 */  "a4",   /* "$20", */
-       /* 0x15 */  "a5",   /* "$21", */
-       /* 0x16 */  "t8",   /* "$22", */
-       /* 0x17 */  "t9",   /* "$23", */
-
-       /* 0x18 */  "t10",  /* "$24", */
-       /* 0x19 */  "t11",  /* "$25", */
-       /* 0x1a */  "ra",   /* "$26", */
-       /* 0x1b */  "pv",   /* "$27", */
-       /* 0x1c */  "at",   /* "$28", */
-       /* 0x1d */  "gp",   /* "$29", */
-       /* 0x1e */  "sp",   /* "$30", */
-       /* 0x1f */  "zero"  /* "$31"  */
-};
-
-
 /* disassinstr *****************************************************************
 
    Outputs a disassembler listing of one machine code instruction on

diff --git a/src/vm/jit/alpha/md-abi.c b/src/vm/jit/alpha/md-abi.c
index c3608422ea0a6d0107034933d4227cc48cb289c1..2ff0f6c1634a319388c85050d1413ccea004d37e 100644 (file)
--- a/src/vm/jit/alpha/md-abi.c
+++ b/src/vm/jit/alpha/md-abi.c
@@ -25,10 +25,9 @@
    Contact: cacao@cacaojvm.org
 
    Authors: Christian Thalinger
+            Christian Ullrich
 
-   Changes: Christian Ullrich
-
-   $Id: md-abi.c 5635 2006-10-02 16:36:54Z christian $
+   $Id: md-abi.c 6261 2006-12-28 21:21:08Z twisti $
 
 */
 
@@ -61,6 +60,14 @@ s4 nregdescint[] = {
        REG_END
 };
 
+char *regs[] = {
+       "v0",  "t0",  "t1",  "t2",  "t3",  "t4",  "t5",  "t6",
+       "t7",  "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",
+       "a0",  "a1",  "a2",  "a3",  "a4",  "a5",  "t8",  "t9",
+       "t10", "t11", "ra",  "pv",  "at",  "gp",  "sp",  "zero"
+};
+
+
 s4 nregdescfloat[] = {
        REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
        REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,