1 /* src/vm/jit/x86_64/codegen.h - code generation macros for x86_64
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Andreas Krall
32 $Id: codegen.h 4941 2006-05-23 08:25:14Z twisti $
46 #include "vm/jit/jit.h"
49 /* some defines ***************************************************************/
51 #define PATCHER_CALL_SIZE 5 /* size in bytes of a patcher call */
54 /* additional functions and macros to generate code ***************************/
56 #define CALCOFFSETBYTES(var, reg, val) \
57 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
58 else if ((s4) (val) != 0) (var) += 1; \
59 else if ((reg) == RBP || (reg) == RSP || (reg) == R12 || (reg) == R13) (var) += 1;
62 #define CALCIMMEDIATEBYTES(var, val) \
63 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
67 /* gen_nullptr_check(objreg) */
69 #define gen_nullptr_check(objreg) \
73 codegen_add_nullpointerexception_ref(cd); \
77 #define gen_bound_check \
79 M_ICMP_MEMBASE(s1, OFFSET(java_arrayheader, size), s2); \
81 codegen_add_arrayindexoutofboundsexception_ref(cd, s2); \
85 #define gen_div_check(v) \
87 if ((v)->flags & INMEMORY) { \
88 M_CMP_IMM_MEMBASE(0, REG_SP, src->regoff * 8); \
90 M_TEST(src->regoff); \
93 codegen_add_arithmeticexception_ref(cd); \
97 /* MCODECHECK(icnt) */
99 #define MCODECHECK(icnt) \
101 if ((cd->mcodeptr + (icnt)) > cd->mcodeend) \
102 codegen_increase(cd); \
106 #define ALIGNCODENOP \
107 if ((s4) (((ptrint) cd->mcodeptr) & 7)) { \
113 generates an integer-move from register a to b.
114 if a and b are the same int-register, no code will be generated.
117 #define M_INTMOVE(reg,dreg) \
119 if ((reg) != (dreg)) { \
126 generates a floating-point-move from register a to b.
127 if a and b are the same float-register, no code will be generated
130 #define M_FLTMOVE(reg,dreg) \
132 if ((reg) != (dreg)) { \
138 #define M_COPY(s,d) emit_copy(jd, iptr, (s), (d))
140 #define ICONST(r,c) \
142 if (iptr->val.i == 0) \
145 M_IMOV_IMM(iptr->val.i, d); \
148 /* M_IMOV_IMM(iptr->val.i, d); \ */
152 #define LCONST(r,c) \
154 if (iptr->val.l == 0) \
157 M_MOV_IMM(iptr->val.l, d); \
161 /* macros to create code ******************************************************/
163 #define M_MOV(a,b) emit_mov_reg_reg(cd, (a), (b))
164 #define M_MOV_IMM(a,b) emit_mov_imm_reg(cd, (u8) (a), (b))
166 #define M_IMOV(a,b) emit_movl_reg_reg(cd, (a), (b))
167 #define M_IMOV_IMM(a,b) emit_movl_imm_reg(cd, (u4) (a), (b))
169 #define M_FMOV(a,b) emit_movq_reg_reg(cd, (a), (b))
171 #define M_ILD(a,b,disp) emit_movl_membase_reg(cd, (b), (disp), (a))
172 #define M_LLD(a,b,disp) emit_mov_membase_reg(cd, (b), (disp), (a))
174 #define M_ILD32(a,b,disp) emit_movl_membase32_reg(cd, (b), (disp), (a))
175 #define M_LLD32(a,b,disp) emit_mov_membase32_reg(cd, (b), (disp), (a))
177 #define M_IST(a,b,disp) emit_movl_reg_membase(cd, (a), (b), (disp))
178 #define M_LST(a,b,disp) emit_mov_reg_membase(cd, (a), (b), (disp))
180 #define M_IST_IMM(a,b,disp) emit_movl_imm_membase(cd, (a), (b), (disp))
181 #define M_LST_IMM32(a,b,disp) emit_mov_imm_membase(cd, (a), (b), (disp))
183 #define M_IST32(a,b,disp) emit_movl_reg_membase32(cd, (a), (b), (disp))
184 #define M_LST32(a,b,disp) emit_mov_reg_membase32(cd, (a), (b), (disp))
186 #define M_IST32_IMM(a,b,disp) emit_movl_imm_membase32(cd, (a), (b), (disp))
187 #define M_LST32_IMM32(a,b,disp) emit_mov_imm_membase32(cd, (a), (b), (disp))
189 #define M_IADD(a,b) emit_alul_reg_reg(cd, ALU_ADD, (a), (b))
190 #define M_IADD_IMM(a,b) emit_alul_reg_reg(cd, ALU_ADD, (a), (b))
192 #define M_LADD(a,b) emit_alu_reg_reg(cd, ALU_ADD, (a), (b))
193 #define M_LADD_IMM(a,b) emit_alu_imm_reg(cd, ALU_ADD, (a), (b))
194 #define M_LSUB(a,b) emit_alu_reg_reg(cd, ALU_SUB, (a), (b))
195 #define M_LSUB_IMM(a,b) emit_alu_imm_reg(cd, ALU_SUB, (a), (b))
197 #define M_IINC_MEMBASE(a,b) emit_incl_membase(cd, (a), (b))
199 #define M_IADD_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADD, (a), (b), (c))
200 #define M_IADC_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADC, (a), (b), (c))
201 #define M_ISUB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SUB, (a), (b), (c))
202 #define M_ISBB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SBB, (a), (b), (c))
204 #define M_ALD(a,b,disp) M_LLD(a,b,disp)
205 #define M_ALD32(a,b,disp) M_LLD32(a,b,disp)
207 #define M_AST(a,b,c) M_LST(a,b,c)
208 #define M_AST_IMM32(a,b,c) M_LST_IMM32(a,b,c)
210 #define M_AADD(a,b) M_LADD(a,b)
211 #define M_AADD_IMM(a,b) M_LADD_IMM(a,b)
212 #define M_ASUB_IMM(a,b) M_LSUB_IMM(a,b)
214 #define M_LADD_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_ADD, (a), (b))
215 #define M_AADD_IMM32(a,b) M_LADD_IMM32(a,b)
216 #define M_LSUB_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_SUB, (a), (b))
218 #define M_ILEA(a,b,c) emit_leal_membase_reg(cd, (a), (b), (c))
219 #define M_LLEA(a,b,c) emit_lea_membase_reg(cd, (a), (b), (c))
220 #define M_ALEA(a,b,c) M_LLEA(a,b,c)
222 #define M_INEG(a) emit_negl_reg(cd, (a))
223 #define M_LNEG(a) emit_neg_reg(cd, (a))
225 #define M_INEG_MEMBASE(a,b) emit_negl_membase(cd, (a), (b))
226 #define M_LNEG_MEMBASE(a,b) emit_neg_membase(cd, (a), (b))
228 #define M_AND(a,b) emit_alu_reg_reg(cd, ALU_AND, (a), (b))
229 #define M_XOR(a,b) emit_alu_reg_reg(cd, ALU_XOR, (a), (b))
231 #define M_IAND(a,b) emit_alul_reg_reg(cd, ALU_AND, (a), (b))
232 #define M_IAND_IMM(a,b) emit_alul_imm_reg(cd, ALU_AND, (a), (b))
233 #define M_IXOR(a,b) emit_alul_reg_reg(cd, ALU_XOR, (a), (b))
235 #define M_BSEXT(a,b) emit_movsbq_reg_reg(cd, (a), (b))
236 #define M_SSEXT(a,b) emit_movswq_reg_reg(cd, (a), (b))
237 #define M_ISEXT(a,b) emit_movslq_reg_reg(cd, (a), (b))
239 #define M_CZEXT(a,b) emit_movzwq_reg_reg(cd, (a), (b))
241 #define M_BSEXT_MEMBASE(a,disp,b) emit_movsbq_membase_reg(cd, (a), (disp), (b))
242 #define M_SSEXT_MEMBASE(a,disp,b) emit_movswq_membase_reg(cd, (a), (disp), (b))
243 #define M_ISEXT_MEMBASE(a,disp,b) emit_movslq_membase_reg(cd, (a), (disp), (b))
245 #define M_CZEXT_MEMBASE(a,disp,b) emit_movzwq_membase_reg(cd, (a), (disp), (b))
247 #define M_TEST(a) emit_test_reg_reg(cd, (a), (a))
248 #define M_ITEST(a) emit_testl_reg_reg(cd, (a), (a))
250 #define M_CMP(a,b) emit_alu_reg_reg(cd, ALU_CMP, (a), (b))
251 #define M_CMP_IMM(a,b) emit_alu_imm_reg(cd, ALU_CMP, (a), (b))
252 #define M_CMP_IMM_MEMBASE(a,b,c) emit_alu_imm_membase(cd, ALU_CMP, (a), (b), (c))
253 #define M_CMP_MEMBASE(a,b,c) emit_alu_membase_reg(cd, ALU_CMP, (a), (b), (c))
255 #define M_ICMP(a,b) emit_alul_reg_reg(cd, ALU_CMP, (a), (b))
256 #define M_ICMP_IMM(a,b) emit_alul_imm_reg(cd, ALU_CMP, (a), (b))
257 #define M_ICMP_IMM_MEMBASE(a,b,c) emit_alul_imm_membase(cd, ALU_CMP, (a), (b), (c))
258 #define M_ICMP_MEMBASE(a,b,c) emit_alul_membase_reg(cd, ALU_CMP, (a), (b), (c))
260 #define M_BEQ(disp) emit_jcc(cd, CC_E, (disp))
261 #define M_BNE(disp) emit_jcc(cd, CC_NE, (disp))
262 #define M_BLT(disp) emit_jcc(cd, CC_L, (disp))
263 #define M_BLE(disp) emit_jcc(cd, CC_LE, (disp))
264 #define M_BAE(disp) emit_jcc(cd, CC_AE, (disp))
265 #define M_BA(disp) emit_jcc(cd, CC_A, (disp))
267 #define M_CMOVEQ(a,b) emit_cmovcc_reg_reg(cd, CC_E, (a), (b))
268 #define M_CMOVNE(a,b) emit_cmovcc_reg_reg(cd, CC_NE, (a), (b))
269 #define M_CMOVLT(a,b) emit_cmovcc_reg_reg(cd, CC_L, (a), (b))
270 #define M_CMOVLE(a,b) emit_cmovcc_reg_reg(cd, CC_LE, (a), (b))
271 #define M_CMOVGE(a,b) emit_cmovcc_reg_reg(cd, CC_GE, (a), (b))
272 #define M_CMOVGT(a,b) emit_cmovcc_reg_reg(cd, CC_G, (a), (b))
274 #define M_CMOVEQ_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_E, (a), (b))
275 #define M_CMOVNE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_NE, (a), (b))
276 #define M_CMOVLT_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_L, (a), (b))
277 #define M_CMOVLE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_LE, (a), (b))
278 #define M_CMOVGE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_GE, (a), (b))
279 #define M_CMOVGT_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_G, (a), (b))
281 #define M_CMOVB(a,b) emit_cmovcc_reg_reg(cd, CC_B, (a), (b))
282 #define M_CMOVA(a,b) emit_cmovcc_reg_reg(cd, CC_A, (a), (b))
283 #define M_CMOVP(a,b) emit_cmovcc_reg_reg(cd, CC_P, (a), (b))
285 #define M_PUSH(a) emit_push_reg(cd, (a))
286 #define M_PUSH_IMM(a) emit_push_imm(cd, (a))
287 #define M_POP(a) emit_pop_reg(cd, (a))
289 #define M_JMP(a) emit_jmp_reg(cd, (a))
290 #define M_JMP_IMM(a) emit_jmp_imm(cd, (a))
291 #define M_CALL(a) emit_call_reg(cd, (a))
292 #define M_CALL_IMM(a) emit_call_imm(cd, (a))
293 #define M_RET emit_ret(cd)
295 #define M_NOP emit_nop(cd)
297 #define M_CLR(a) M_XOR(a,a)
301 #define M_FLD(a,b,c) emit_movlps_membase_reg(cd, (a), (b), (c))
302 #define M_DLD(a,b,c) emit_movlpd_membase_reg(cd, (a), (b), (c))
304 #define M_FST(a,b,c) emit_movlps_reg_membase(cd, (a), (b), (c))
305 #define M_DST(a,b,c) emit_movlpd_reg_membase(cd, (a), (b), (c))
308 #define M_DLD(a,b,disp) emit_movq_membase_reg(cd, (b), (disp), (a))
309 #define M_DST(a,b,disp) emit_movq_reg_membase(cd, (a), (b), (disp))
312 /* system instructions ********************************************************/
314 #define M_RDTSC emit_rdtsc(cd)
316 #define PROFILE_CYCLE_START \
322 M_MOV_IMM((ptrint) m, REG_ITMP3); \
324 M_ISUB_MEMBASE(RAX, REG_ITMP3, OFFSET(methodinfo, cycles)); \
325 M_ISBB_MEMBASE(RDX, REG_ITMP3, OFFSET(methodinfo, cycles) + 4); \
332 #define PROFILE_CYCLE_STOP \
338 M_MOV_IMM((ptrint) m, REG_ITMP3); \
340 M_IADD_MEMBASE(RAX, REG_ITMP3, OFFSET(methodinfo, cycles)); \
341 M_IADC_MEMBASE(RDX, REG_ITMP3, OFFSET(methodinfo, cycles) + 4); \
349 /* function gen_resolvebranch **************************************************
351 backpatches a branch instruction
353 parameters: ip ... pointer to instruction after branch (void*)
354 so ... offset of instruction after branch (s8)
355 to ... offset of branch target (s8)
357 *******************************************************************************/
359 #define gen_resolvebranch(ip,so,to) \
360 *((s4*) ((ip) - 4)) = (s4) ((to) - (so));
362 #endif /* _CODEGEN_H */
366 * These are local overrides for various environment variables in Emacs.
367 * Please do not remove this and leave it at the end of the file, where
368 * Emacs will automagically detect them.
369 * ---------------------------------------------------------------------
372 * indent-tabs-mode: t