1 /* src/vm/jit/x86_64/codegen.h - code generation macros for x86_64
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/x86_64/emit.h"
37 #include "vm/jit/jit.h"
40 /* additional functions and macros to generate code ***************************/
42 /* MCODECHECK(icnt) */
44 #define MCODECHECK(icnt) \
46 if ((cd->mcodeptr + (icnt)) > cd->mcodeend) \
47 codegen_increase(cd); \
51 #define ALIGNCODENOP \
53 for (s1 = 0; s1 < (s4) (((ptrint) cd->mcodeptr) & 7); s1++) \
59 generates an integer-move from register a to b.
60 if a and b are the same int-register, no code will be generated.
63 #define M_INTMOVE(reg,dreg) \
65 if ((reg) != (dreg)) { \
72 generates a floating-point-move from register a to b.
73 if a and b are the same float-register, no code will be generated
76 #define M_FLTMOVE(reg,dreg) \
78 if ((reg) != (dreg)) { \
89 M_IMOV_IMM((c), (d)); \
92 /* M_IMOV_IMM((c), (d)); \ */
101 M_MOV_IMM((c), (d)); \
105 /* branch defines *************************************************************/
107 #define BRANCH_UNCONDITIONAL_SIZE 5 /* size in bytes of a branch */
108 #define BRANCH_CONDITIONAL_SIZE 6 /* size in bytes of a branch */
110 #define BRANCH_NOPS \
121 /* patcher defines ************************************************************/
123 #define PATCHER_CALL_SIZE 2 /* size in bytes of a patcher call */
125 #define PATCHER_NOPS \
132 /* macros to create code ******************************************************/
136 *(cd->mcodeptr) = (a); \
141 #define M_BYTE2(a, b) \
148 #define M_MOV(a,b) emit_mov_reg_reg(cd, (a), (b))
149 #define M_MOV_IMM(a,b) emit_mov_imm_reg(cd, (u8) (a), (b))
151 #define M_IMOV(a,b) emit_movl_reg_reg(cd, (a), (b))
152 #define M_IMOV_IMM(a,b) emit_movl_imm_reg(cd, (u4) (a), (b))
154 #define M_FMOV(a,b) emit_movq_reg_reg(cd, (a), (b))
156 #define M_ILD(a,b,disp) emit_movl_membase_reg(cd, (b), (disp), (a))
157 #define M_LLD(a,b,disp) emit_mov_membase_reg(cd, (b), (disp), (a))
159 #define M_ILD32(a,b,disp) emit_movl_membase32_reg(cd, (b), (disp), (a))
160 #define M_LLD32(a,b,disp) emit_mov_membase32_reg(cd, (b), (disp), (a))
162 #define M_IST(a,b,disp) emit_movl_reg_membase(cd, (a), (b), (disp))
163 #define M_LST(a,b,disp) emit_mov_reg_membase(cd, (a), (b), (disp))
165 #define M_IST_IMM(a,b,disp) emit_movl_imm_membase(cd, (a), (b), (disp))
166 #define M_LST_IMM32(a,b,disp) emit_mov_imm_membase(cd, (a), (b), (disp))
168 #define M_IST32(a,b,disp) emit_movl_reg_membase32(cd, (a), (b), (disp))
169 #define M_LST32(a,b,disp) emit_mov_reg_membase32(cd, (a), (b), (disp))
171 #define M_IST32_IMM(a,b,disp) emit_movl_imm_membase32(cd, (a), (b), (disp))
172 #define M_LST32_IMM32(a,b,disp) emit_mov_imm_membase32(cd, (a), (b), (disp))
174 #define M_IADD(a,b) emit_alul_reg_reg(cd, ALU_ADD, (a), (b))
175 #define M_ISUB(a,b) emit_alul_reg_reg(cd, ALU_SUB, (a), (b))
176 #define M_IMUL(a,b) emit_imull_reg_reg(cd, (a), (b))
178 #define M_IADD_IMM(a,b) emit_alul_imm_reg(cd, ALU_ADD, (a), (b))
179 #define M_ISUB_IMM(a,b) emit_alul_imm_reg(cd, ALU_SUB, (a), (b))
180 #define M_IMUL_IMM(a,b,c) emit_imull_imm_reg_reg(cd, (b), (a), (c))
182 #define M_LADD(a,b) emit_alu_reg_reg(cd, ALU_ADD, (a), (b))
183 #define M_LSUB(a,b) emit_alu_reg_reg(cd, ALU_SUB, (a), (b))
184 #define M_LMUL(a,b) emit_imul_reg_reg(cd, (a), (b))
186 #define M_LADD_IMM(a,b) emit_alu_imm_reg(cd, ALU_ADD, (a), (b))
187 #define M_LSUB_IMM(a,b) emit_alu_imm_reg(cd, ALU_SUB, (a), (b))
188 #define M_LMUL_IMM(a,b,c) emit_imul_imm_reg_reg(cd, (b), (a), (c))
190 #define M_IINC(a) emit_incl_reg(cd, (a))
191 #define M_IDEC(a) emit_decl_reg(cd, (a))
193 #define M_ALD(a,b,disp) \
196 M_LLD(a, b, disp + -((cd->mcodeptr + 7) - cd->mcodebase)); \
201 #define M_ALD32(a,b,disp) M_LLD32(a,b,disp)
203 #define M_ALD_MEM(a,disp) emit_mov_mem_reg(cd, (disp), (a))
205 #define M_ALD_MEM_GET_OPC(p) ( *( (p) + 1))
206 #define M_ALD_MEM_GET_MOD(p) (((*( (p) + 2)) >> 6) & 0x03)
207 #define M_ALD_MEM_GET_REG(p) ((((*( (p) + 2)) >> 3) & 0x07) + (((*(p) >> 2) & 0x01) << 3))
208 #define M_ALD_MEM_GET_RM(p) (((*( (p) + 2)) ) & 0x07)
209 #define M_ALD_MEM_GET_DISP(p) ( *((u4 *) ((p) + 4)))
211 #define M_AST(a,b,c) M_LST(a,b,c)
212 #define M_AST_IMM32(a,b,c) M_LST_IMM32(a,b,c)
214 #define M_AADD(a,b) M_LADD(a,b)
215 #define M_AADD_IMM(a,b) M_LADD_IMM(a,b)
216 #define M_ASUB_IMM(a,b) M_LSUB_IMM(a,b)
218 #define M_ISUB_IMM32(a,b) emit_alul_imm32_reg(cd, ALU_SUB, (a), (b))
220 #define M_LADD_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_ADD, (a), (b))
221 #define M_LSUB_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_SUB, (a), (b))
223 #define M_AADD_IMM32(a,b) M_LADD_IMM32(a,b)
225 #define M_ILEA(a,b,c) emit_leal_membase_reg(cd, (a), (b), (c))
226 #define M_LLEA(a,b,c) emit_lea_membase_reg(cd, (a), (b), (c))
227 #define M_ALEA(a,b,c) M_LLEA(a,b,c)
229 #define M_INEG(a) emit_negl_reg(cd, (a))
230 #define M_LNEG(a) emit_neg_reg(cd, (a))
232 #define M_IAND(a,b) emit_alul_reg_reg(cd, ALU_AND, (a), (b))
233 #define M_IOR(a,b) emit_alul_reg_reg(cd, ALU_OR, (a), (b))
234 #define M_IXOR(a,b) emit_alul_reg_reg(cd, ALU_XOR, (a), (b))
236 #define M_IAND_IMM(a,b) emit_alul_imm_reg(cd, ALU_AND, (a), (b))
237 #define M_IOR_IMM(a,b) emit_alul_imm_reg(cd, ALU_OR, (a), (b))
238 #define M_IXOR_IMM(a,b) emit_alul_imm_reg(cd, ALU_XOR, (a), (b))
240 #define M_LAND(a,b) emit_alu_reg_reg(cd, ALU_AND, (a), (b))
241 #define M_LOR(a,b) emit_alu_reg_reg(cd, ALU_OR, (a), (b))
242 #define M_LXOR(a,b) emit_alu_reg_reg(cd, ALU_XOR, (a), (b))
244 #define M_LAND_IMM(a,b) emit_alu_imm_reg(cd, ALU_AND, (a), (b))
245 #define M_LOR_IMM(a,b) emit_alu_imm_reg(cd, ALU_OR, (a), (b))
246 #define M_LXOR_IMM(a,b) emit_alu_imm_reg(cd, ALU_XOR, (a), (b))
248 #define M_BSEXT(a,b) emit_movsbq_reg_reg(cd, (a), (b))
249 #define M_SSEXT(a,b) emit_movswq_reg_reg(cd, (a), (b))
250 #define M_ISEXT(a,b) emit_movslq_reg_reg(cd, (a), (b))
252 #define M_BZEXT(a,b) emit_movzbq_reg_reg(cd, (a), (b))
253 #define M_CZEXT(a,b) emit_movzwq_reg_reg(cd, (a), (b))
255 #define M_ISLL_IMM(a,b) emit_shiftl_imm_reg(cd, SHIFT_SHL, (a), (b))
256 #define M_ISRA_IMM(a,b) emit_shiftl_imm_reg(cd, SHIFT_SAR, (a), (b))
257 #define M_ISRL_IMM(a,b) emit_shiftl_imm_reg(cd, SHIFT_SHR, (a), (b))
259 #define M_LSLL_IMM(a,b) emit_shift_imm_reg(cd, SHIFT_SHL, (a), (b))
260 #define M_LSRA_IMM(a,b) emit_shift_imm_reg(cd, SHIFT_SAR, (a), (b))
261 #define M_LSRL_IMM(a,b) emit_shift_imm_reg(cd, SHIFT_SHR, (a), (b))
263 #define M_TEST(a) emit_test_reg_reg(cd, (a), (a))
264 #define M_ITEST(a) emit_testl_reg_reg(cd, (a), (a))
266 #define M_LCMP(a,b) emit_alu_reg_reg(cd, ALU_CMP, (a), (b))
267 #define M_LCMP_IMM(a,b) emit_alu_imm_reg(cd, ALU_CMP, (a), (b))
268 #define M_LCMP_IMM_MEMBASE(a,b,c) emit_alu_imm_membase(cd, ALU_CMP, (a), (b), (c))
269 #define M_LCMP_MEMBASE(a,b,c) emit_alu_membase_reg(cd, ALU_CMP, (a), (b), (c))
271 #define M_ICMP(a,b) emit_alul_reg_reg(cd, ALU_CMP, (a), (b))
272 #define M_ICMP_IMM(a,b) emit_alul_imm_reg(cd, ALU_CMP, (a), (b))
273 #define M_ICMP_IMM32(a,b) emit_alul_imm32_reg(cd, ALU_CMP, (a), (b))
274 #define M_ICMP_IMM_MEMBASE(a,b,c) emit_alul_imm_membase(cd, ALU_CMP, (a), (b), (c))
275 #define M_ICMP_MEMBASE(a,b,c) emit_alul_membase_reg(cd, ALU_CMP, (a), (b), (c))
277 #define M_BEQ(disp) emit_jcc(cd, CC_E, (disp))
278 #define M_BNE(disp) emit_jcc(cd, CC_NE, (disp))
279 #define M_BLT(disp) emit_jcc(cd, CC_L, (disp))
280 #define M_BLE(disp) emit_jcc(cd, CC_LE, (disp))
281 #define M_BGE(disp) emit_jcc(cd, CC_GE, (disp))
282 #define M_BGT(disp) emit_jcc(cd, CC_G, (disp))
284 #define M_BULT(disp) emit_jcc(cd, CC_B, (disp))
285 #define M_BULE(disp) emit_jcc(cd, CC_BE, (disp))
286 #define M_BUGE(disp) emit_jcc(cd, CC_AE, (disp))
287 #define M_BUGT(disp) emit_jcc(cd, CC_A, (disp))
289 #define M_SETNE(a) emit_setcc_reg(cd, CC_NE, (a))
290 #define M_SETULE(a) emit_setcc_reg(cd, CC_BE, (a))
292 #define M_CMOVEQ(a,b) emit_cmovcc_reg_reg(cd, CC_E, (a), (b))
293 #define M_CMOVNE(a,b) emit_cmovcc_reg_reg(cd, CC_NE, (a), (b))
294 #define M_CMOVLT(a,b) emit_cmovcc_reg_reg(cd, CC_L, (a), (b))
295 #define M_CMOVLE(a,b) emit_cmovcc_reg_reg(cd, CC_LE, (a), (b))
296 #define M_CMOVGE(a,b) emit_cmovcc_reg_reg(cd, CC_GE, (a), (b))
297 #define M_CMOVGT(a,b) emit_cmovcc_reg_reg(cd, CC_G, (a), (b))
299 #define M_CMOVULT(a,b) emit_cmovcc_reg_reg(cd, CC_B, (a), (b))
300 #define M_CMOVUGT(a,b) emit_cmovcc_reg_reg(cd, CC_A, (a), (b))
301 #define M_CMOVP(a,b) emit_cmovcc_reg_reg(cd, CC_P, (a), (b))
303 #define M_PUSH(a) emit_push_reg(cd, (a))
304 #define M_PUSH_IMM(a) emit_push_imm(cd, (a))
305 #define M_POP(a) emit_pop_reg(cd, (a))
307 #define M_JMP(a) emit_jmp_reg(cd, (a))
308 #define M_JMP_IMM(a) emit_jmp_imm(cd, (a))
309 #define M_CALL(a) emit_call_reg(cd, (a))
310 #define M_CALL_IMM(a) emit_call_imm(cd, (a))
311 #define M_RET M_BYTE1(0xc3)
313 #define M_NOP M_BYTE1(0x90)
314 #define M_UD2 M_BYTE2(0x0f, 0x0b)
316 #define M_CLR(a) M_LXOR(a,a)
319 #define M_FLD(a,b,disp) emit_movss_membase_reg(cd, (b), (disp), (a))
320 #define M_DLD(a,b,disp) emit_movsd_membase_reg(cd, (b), (disp), (a))
322 #define M_FLD32(a,b,disp) emit_movss_membase32_reg(cd, (b), (disp), (a))
323 #define M_DLD32(a,b,disp) emit_movsd_membase32_reg(cd, (b), (disp), (a))
325 #define M_FST(a,b,disp) emit_movss_reg_membase(cd, (a), (b), (disp))
326 #define M_DST(a,b,disp) emit_movsd_reg_membase(cd, (a), (b), (disp))
328 #define M_FST32(a,b,disp) emit_movss_reg_membase32(cd, (a), (b), (disp))
329 #define M_DST32(a,b,disp) emit_movsd_reg_membase32(cd, (a), (b), (disp))
331 #define M_FADD(a,b) emit_addss_reg_reg(cd, (a), (b))
332 #define M_DADD(a,b) emit_addsd_reg_reg(cd, (a), (b))
333 #define M_FSUB(a,b) emit_subss_reg_reg(cd, (a), (b))
334 #define M_DSUB(a,b) emit_subsd_reg_reg(cd, (a), (b))
335 #define M_FMUL(a,b) emit_mulss_reg_reg(cd, (a), (b))
336 #define M_DMUL(a,b) emit_mulsd_reg_reg(cd, (a), (b))
337 #define M_FDIV(a,b) emit_divss_reg_reg(cd, (a), (b))
338 #define M_DDIV(a,b) emit_divsd_reg_reg(cd, (a), (b))
340 #define M_CVTIF(a,b) emit_cvtsi2ss_reg_reg(cd, (a), (b))
341 #define M_CVTID(a,b) emit_cvtsi2sd_reg_reg(cd, (a), (b))
342 #define M_CVTLF(a,b) emit_cvtsi2ssq_reg_reg(cd, (a), (b))
343 #define M_CVTLD(a,b) emit_cvtsi2sdq_reg_reg(cd, (a), (b))
344 #define M_CVTFI(a,b) emit_cvttss2si_reg_reg(cd, (a), (b))
345 #define M_CVTDI(a,b) emit_cvttsd2si_reg_reg(cd, (a), (b))
346 #define M_CVTFL(a,b) emit_cvttss2siq_reg_reg(cd, (a), (b))
347 #define M_CVTDL(a,b) emit_cvttsd2siq_reg_reg(cd, (a), (b))
349 #define M_CVTFD(a,b) emit_cvtss2sd_reg_reg(cd, (a), (b))
350 #define M_CVTDF(a,b) emit_cvtsd2ss_reg_reg(cd, (a), (b))
353 /* system instructions ********************************************************/
355 #define M_RDTSC emit_rdtsc(cd)
357 #define M_IINC_MEMBASE(a,b) emit_incl_membase(cd, (a), (b))
359 #define M_IADD_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADD, (a), (b), (c))
360 #define M_IADC_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADC, (a), (b), (c))
361 #define M_ISUB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SUB, (a), (b), (c))
362 #define M_ISBB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SBB, (a), (b), (c))
365 #if defined(ENABLE_PROFILING)
367 #define PROFILE_CYCLE_START \
369 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) { \
373 M_MOV_IMM(code, REG_ITMP3); \
375 M_ISUB_MEMBASE(RAX, REG_ITMP3, OFFSET(codeinfo, cycles)); \
376 M_ISBB_MEMBASE(RDX, REG_ITMP3, OFFSET(codeinfo, cycles) + 4); \
383 #define PROFILE_CYCLE_STOP \
385 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) { \
389 M_MOV_IMM(code, REG_ITMP3); \
391 M_IADD_MEMBASE(RAX, REG_ITMP3, OFFSET(codeinfo, cycles)); \
392 M_IADC_MEMBASE(RDX, REG_ITMP3, OFFSET(codeinfo, cycles) + 4); \
401 #define PROFILE_CYCLE_START
402 #define PROFILE_CYCLE_STOP
406 #endif /* _CODEGEN_H */
410 * These are local overrides for various environment variables in Emacs.
411 * Please do not remove this and leave it at the end of the file, where
412 * Emacs will automagically detect them.
413 * ---------------------------------------------------------------------
416 * indent-tabs-mode: t