1 /* src/vm/jit/alpha/md.c - machine dependent SPARC functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: md.c 6265 2007-01-02 20:40:57Z edwin $
37 #include "vm/jit/sparc64/md-abi.h"
39 #include "vm/exceptions.h"
40 #include "vm/stringlocal.h"
41 #include "vm/jit/asmpart.h"
42 #include "vm/jit/stacktrace.h"
44 /* assembler function prototypes **********************************************/
45 void asm_store_fp_state_reg(u8 *mem);
46 void asm_load_fp_state_reg(u8 *mem);
50 /* shift away 13-bit immediate, mask rd and rs1 */
51 #define SHIFT_AND_MASK(instr) \
52 ((instr >> 13) & 0x60fc1)
54 /* NOP is defined as a SETHI instruction with rd and imm. set to zero */
55 /* therefore we check if the 22-bit immediate is zero */
56 #define IS_SETHI(instr) \
57 (((instr & 0xc1c00000) == 0x01000000) \
58 && ((instr & 0x3fffff) != 0x0))
60 #define IS_LDX_IMM(instr) \
61 (((instr >> 13) & 0x60fc1) == 0x602c1)
63 #define IS_SUB(instr) \
64 (((instr >> 13) & 0x60fc0) == 0x40100)
66 inline s2 decode_13bit_imm(u4 instr) {
69 /* mask everything else in the instruction */
70 imm = instr & 0x00001fff;
72 /* sign extend 13-bit to 16-bit */
79 /* md_init *********************************************************************
81 Do some machine dependent initialization.
83 *******************************************************************************/
91 /* md_stacktrace_get_returnaddress *********************************************
93 Returns the return address of the current stackframe, specified by
94 the passed stack pointer and the stack frame size.
96 *******************************************************************************/
98 u1 *md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
101 /* flush register windows to the stack */
104 /* the return address resides in register i7, the last register in the
105 * 16-extended-word save area
107 ra = *((u1 **) (sp + 120 + BIAS));
109 /* NOTE: on SPARC ra is the address of the call instruction */
114 u1 *md_get_framepointer(u1 *sp)
117 /* flush register windows to the stack */
120 fp = *((u1 **) (sp + 112 + BIAS));
125 u1 *md_get_pv_from_stackframe(u1 *sp)
128 /* flush register windows to the stack */
131 pv = *((u1 **) (sp + 104 + BIAS));
136 /* md_codegen_get_pv_from_pc ***************************************************
138 This reconstructs and returns the PV of a method given a return address
139 pointer. (basically, same was as the generated code following the jump does)
145 277afffe ldah pv,-2(ra)
146 237ba61c lda pv,-23012(pv)
148 *******************************************************************************/
150 u1 *md_codegen_get_pv_from_pc(u1 *ra)
159 /* get the instruction word after jump and nop */
160 mcode = *((u4 *) (ra+8) );
162 /* check if we have a sethi insruction */
163 if (IS_SETHI(mcode)) {
166 /* get 22-bit immediate of sethi instruction */
167 offset = (s4) (mcode & 0x3fffff);
168 offset = offset << 10;
171 mcode = *((u4 *) (ra+12) );
172 xor_imm = decode_13bit_imm(mcode);
179 mcode_masked = SHIFT_AND_MASK(mcode);
181 assert(mcode_masked == 0x40001);
183 /* mask and extend the negative sign for the 13 bit immediate */
184 offset = decode_13bit_imm(mcode);
192 /* md_get_method_patch_address *************************************************
194 Gets the patch address of the currently compiled method. The offset
195 is extracted from the load instruction(s) before the jump and added
196 to the right base address (PV or REG_METHODPTR).
198 INVOKESTATIC/SPECIAL:
200 dfdeffb8 ldx [i5 - 72],o5
207 df3e0000 ld [g2 + 0],o5
214 df39ff90 ld [g2 - 112],g2
215 df3e0018 ld [g2 + 24],o5
219 *******************************************************************************/
221 u1 *md_get_method_patch_address(u1 *ra, stackframeinfo *sfi, u1 *mptr)
223 u4 mcode, mcode_masked;
227 /* go back to the location of a possible sethi (3 instruction before jump) */
228 /* note: ra is the address of the jump instruction on SPARC */
231 /* get first instruction word on current PC */
233 mcode = *((u4 *) iptr);
235 /* check for sethi instruction */
237 if (IS_SETHI(mcode)) {
238 /* XXX write a regression for this */
240 /* get 22-bit immediate of sethi instruction */
242 offset = (s4) (mcode & 0x3fffff);
243 offset = offset << 10;
245 /* goto next instruction */
247 mcode = *((u4 *) iptr);
249 /* make sure it's a sub instruction (pv - big_disp) */
250 assert(IS_SUB(mcode));
253 /* get displacement of load instruction */
255 mcode = *((u4 *) (ra - 1 * 4));
256 assert(IS_LDX_IMM(mcode));
258 offset += decode_13bit_imm(mcode);
260 pa = sfi->pv + offset;
266 /* simple (one-instruction) load */
268 mcode = *((u4 *) iptr);
270 /* shift and mask rd */
272 mcode_masked = (mcode >> 13) & 0x060fff;
274 /* get the offset from the instruction */
276 offset = decode_13bit_imm(mcode);
278 /* check for call with rs1 == REG_METHODPTR: ldx [g2+x],pv_caller */
280 if (mcode_masked == 0x0602c5) {
281 /* in this case we use the passed method pointer */
283 /* return NULL if no mptr was specified (used for replacement) */
291 /* in the normal case we check for a `ldx [i5+x],pv_caller' instruction */
293 assert(mcode_masked == 0x0602fb);
295 /* and get the final data segment address */
297 pa = sfi->pv + offset;
305 /* md_cacheflush ***************************************************************
307 Calls the system's function to flush the instruction and data
310 *******************************************************************************/
312 void md_cacheflush(u1 *addr, s4 nbytes)
318 /* md_dcacheflush **************************************************************
320 Calls the system's function to flush the data cache.
322 *******************************************************************************/
324 void md_dcacheflush(u1 *addr, s4 nbytes)
326 /* XXX don't know yet */
330 /* md_patch_replacement_point **************************************************
332 Patch the given replacement point.
334 *******************************************************************************/
336 #if defined(ENABLE_REPLACEMENT)
337 void md_patch_replacement_point(codeinfo *code, s4 index, rplpoint *rp, u1 *savedmcode)
345 /* restore the patched-over instruction */
346 *(u4*)(rp->pc) = *(u4*)(savedmcode);
349 /* save the current machine code */
350 *(u4*)(savedmcode) = *(u4*)(rp->pc);
352 /* build the machine code for the patch */
353 disp = ((u4*)code->replacementstubs - (u4*)rp->pc)
354 + index * REPLACEMENT_STUB_SIZE
357 mcode = (((s4)(0x00))<<30) | ((0)<<29) | ((0x8)<<25) | (0x1<<22) | (0<<20)
358 | (1 << 19 ) | ((disp) & 0x007ffff);
360 /* write the new machine code */
361 *(u4*)(rp->pc) = (u4) mcode;
364 #if !defined(NDEBUG) && defined(ENABLE_DISASSEMBLER)
372 /* flush instruction cache */
373 /* md_icacheflush(rp->pc,4); */
375 #endif /* defined(ENABLE_REPLACEMENT) */
378 * These are local overrides for various environment variables in Emacs.
379 * Please do not remove this and leave it at the end of the file, where
380 * Emacs will automagically detect them.
381 * ---------------------------------------------------------------------
384 * indent-tabs-mode: t
388 * vim:noexpandtab:sw=4:ts=4: