src/vm/jit/sparc64/emit.c

   1 /* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29
  30 #include "vm/types.h"
  31
  32 #include "vm/jit/sparc64/codegen.h"
  33 #include "vm/jit/sparc64/md-abi.h"
  34 #include "vm/jit/sparc64/emit.h"
  35
  36 #include "mm/memory.hpp"
  37
  38 #include "vm/jit/builtin.hpp"
  39 #include "vm/options.h"
  40
  41 #include "vm/jit/abi.h"
  42 #include "vm/jit/abi-asm.h"
  43 #include "vm/jit/asmpart.h"
  44 #include "vm/jit/dseg.h"
  45 #include "vm/jit/emit-common.hpp"
  46 #include "vm/jit/jit.hpp"
  47 #include "vm/jit/replace.hpp"
  48
  49 #include "vm/jit/sparc64/solaris/macro_rename.h"
  50
  51 /* how to leaf optimization in the emitted stubs?? */
  52 #define REG_PV REG_PV_CALLEE
  53
  54
  55 /* emit_load *******************************************************************
  56
  57    Emits a possible load of an operand.
  58
  59 *******************************************************************************/
  60
  61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  62 {
  63         codegendata  *cd;
  64         s4            disp;
  65         s4            reg;
  66
  67         /* get required compiler data */
  68
  69         cd = jd->cd;
  70
  71         if (src->flags & INMEMORY) {
  72                 COUNT_READ_SPILLS(src)
  73
  74                 disp = JITSTACK + src->vv.regoff;
  75
  76                 switch(src->type)
  77                 {
  78                 case TYPE_INT:
  79                 case TYPE_LNG:
  80                 case TYPE_ADR:
  81                         M_LDX(tempreg, REG_SP, disp);
  82                         break;
  83                 case TYPE_FLT:
  84                 case TYPE_DBL:
  85                         M_DLD(tempreg, REG_SP, disp);
  86                         break;
  87                 default:
  88                         vm_abort("emit_load: unknown type %d", src->type);
  89                         break;
  90                 }
  91
  92                 reg = tempreg;
  93         }
  94         else
  95                 reg = src->vv.regoff;
  96
  97         return reg;
  98 }
  99
 100
 101 /* emit_store ******************************************************************
 102
 103    Emits a possible store to variable.
 104
 105 *******************************************************************************/
 106
 107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 108 {
 109         codegendata  *cd;
 110         s4            disp;
 111
 112         /* get required compiler data */
 113
 114         cd = jd->cd;
 115
 116         if (dst->flags & INMEMORY) {
 117                 COUNT_WRITE_SPILLS(dst)
 118
 119                 disp = JITSTACK + dst->vv.regoff;
 120
 121                 switch(dst->type)
 122                 {
 123                 case TYPE_INT:
 124                 case TYPE_LNG:
 125                 case TYPE_ADR:
 126                         M_STX(d, REG_SP, disp);
 127                         break;
 128                 case TYPE_FLT:
 129                 case TYPE_DBL:
 130                         M_DST(d, REG_SP, disp);
 131                         break;
 132                 default:
 133                         vm_abort("emit_store: unknown type %d", dst->type);
 134                         break;
 135                 }
 136         }
 137 }
 138
 139
 140 /* emit_copy *******************************************************************
 141
 142    Generates a register/memory to register/memory copy.
 143
 144 *******************************************************************************/
 145
 146 void emit_copy(jitdata *jd, instruction *iptr)
 147 {
 148         codegendata *cd;
 149         varinfo     *src;
 150         varinfo     *dst;
 151         s4           s1, d;
 152
 153         /* get required compiler data */
 154
 155         cd = jd->cd;
 156
 157         /* get source and destination variables */
 158
 159         src = VAROP(iptr->s1);
 160         dst = VAROP(iptr->dst);
 161
 162         if ((src->vv.regoff != dst->vv.regoff) ||
 163                 ((src->flags ^ dst->flags) & INMEMORY)) {
 164
 165                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 166                         /* emit nothing, as the value won't be used anyway */
 167                         return;
 168                 }
 169
 170                 /* If one of the variables resides in memory, we can eliminate
 171                    the register move from/to the temporary register with the
 172                    order of getting the destination register and the load. */
 173
 174                 if (IS_INMEMORY(src->flags)) {
 175                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 176                         s1 = emit_load(jd, iptr, src, d);
 177                 }
 178                 else {
 179                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 180                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
 181                 }
 182
 183                 if (s1 != d) {
 184                         switch(src->type) {
 185                         case TYPE_INT:
 186                         case TYPE_LNG:
 187                         case TYPE_ADR:
 188                                 M_MOV(s1, d);
 189                                 break;
 190                         case TYPE_FLT:
 191                         case TYPE_DBL:
 192                                 M_DMOV(s1, d);
 193                                 break;
 194                         default:
 195                                 vm_abort("emit_copy: unknown type %d", src->type);
 196                                 break;
 197                         }
 198                 }
 199
 200                 emit_store(jd, iptr, dst, d);
 201         }
 202 }
 203
 204
 205 /* emit_iconst *****************************************************************
 206
 207    XXX
 208
 209 *******************************************************************************/
 210
 211 void emit_iconst(codegendata *cd, s4 d, s4 value)
 212 {
 213         s4 disp;
 214
 215         if ((value >= -4096) && (value <= 4095)) {
 216                 M_XOR_IMM(REG_ZERO, value, d);
 217         } else {
 218                 disp = dseg_add_s4(cd, value);
 219                 M_ILD(d, REG_PV_CALLEE, disp);
 220         }
 221 }
 222
 223
 224 /* emit_lconst *****************************************************************
 225
 226    XXX
 227
 228 *******************************************************************************/
 229
 230 void emit_lconst(codegendata *cd, s4 d, s8 value)
 231 {
 232         s4 disp;
 233
 234         if ((value >= -4096) && (value <= 4095)) {
 235                 M_XOR_IMM(REG_ZERO, value, d);
 236         } else {
 237                 disp = dseg_add_s8(cd, value);
 238                 M_LDX(d, REG_PV_CALLEE, disp);
 239         }
 240 }
 241
 242
 243 /**
 244  * Emits code updating the condition register by comparing one integer
 245  * register to an immediate integer value.
 246  */
 247 void emit_icmp_imm(codegendata* cd, int reg, int32_t value)
 248 {
 249         if ((value >= -4096) && (value <= 4095)) {
 250                 M_CMP_IMM(reg, value);
 251         } else {
 252                 assert(reg != REG_ITMP2);
 253                 ICONST(REG_ITMP2, value);
 254                 M_CMP(reg, REG_ITMP2);
 255         }
 256 }
 257
 258
 259 /* emit_branch *****************************************************************
 260
 261    Emits the code for conditional and unconditional branchs.
 262
 263 *******************************************************************************/
 264
 265 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 266 {
 267         s4 branchdisp;
 268
 269         /* calculate the different displacements */
 270
 271         branchdisp = disp >> 2;
 272
 273         /* check which branch to generate */
 274
 275         if (condition == BRANCH_UNCONDITIONAL) {
 276                 /* check displacement for overflow (19-bit)*/
 277
 278                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 279                         /* if the long-branches flag isn't set yet, do it */
 280
 281                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 282                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 283                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 284                         }
 285
 286                         vm_abort("emit_branch: emit unconditional long-branch code");
 287                 }
 288                 else {
 289                         M_BR(branchdisp);
 290                         M_NOP;
 291                 }
 292         }
 293         else if (reg == -1) {
 294                 /* branch on condition codes */
 295
 296                 /* check displacement for overflow (19-bit)*/
 297
 298                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 299                         /* if the long-branches flag isn't set yet, do it */
 300
 301                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 302                                 log_println("setting error");
 303                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 304                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 305                         }
 306
 307                         vm_abort("emit_branch: emit long-branch on cc code");
 308                 }
 309                 else {
 310                         /* check whether to branch on 64-bit condition code */
 311                         if (BRANCH_CHECKS_XCC(opt)) {
 312                                 switch (condition) {
 313                                 case BRANCH_EQ:
 314                                         M_XBEQ(branchdisp);
 315                                         break;
 316                                 case BRANCH_NE:
 317                                         M_XBNE(branchdisp);
 318                                         break;
 319                                 case BRANCH_LT:
 320                                         M_XBLT(branchdisp);
 321                                         break;
 322                                 case BRANCH_GE:
 323                                         M_XBGE(branchdisp);
 324                                         break;
 325                                 case BRANCH_GT:
 326                                         M_XBGT(branchdisp);
 327                                         break;
 328                                 case BRANCH_LE:
 329                                         M_XBLE(branchdisp);
 330                                         break;
 331                                 case BRANCH_UGT:
 332                                         M_XBUGT(branchdisp);
 333                                         break;
 334                                 case BRANCH_ULT:
 335                                         M_XBULT(branchdisp);
 336                                         break;
 337                                 default:
 338                                         vm_abort("emit_branch: unknown condition %d", condition);
 339                                 }
 340
 341                                 /* branch delay */
 342                                 M_NOP;
 343                         }
 344                         else {
 345                                 switch (condition) {
 346                                 case BRANCH_EQ:
 347                                         M_BEQ(branchdisp);
 348                                         break;
 349                                 case BRANCH_NE:
 350                                         M_BNE(branchdisp);
 351                                         break;
 352                                 case BRANCH_LT:
 353                                         M_BLT(branchdisp);
 354                                         break;
 355                                 case BRANCH_GE:
 356                                         M_BGE(branchdisp);
 357                                         break;
 358                                 case BRANCH_GT:
 359                                         M_BGT(branchdisp);
 360                                         break;
 361                                 case BRANCH_LE:
 362                                         M_BLE(branchdisp);
 363                                         break;
 364                                 case BRANCH_UGT:
 365                                         M_BUGT(branchdisp);
 366                                         break;
 367                                 case BRANCH_ULT:
 368                                         M_BULT(branchdisp);
 369                                         break;
 370                                 default:
 371                                         vm_abort("emit_branch: unknown condition %d", condition);
 372                                 }
 373
 374                                 /* branch delay */
 375                                 M_NOP;
 376                         }
 377                 }
 378         }
 379         else {
 380                 /* branch on register */
 381
 382                 /* check displacement for overflow (16-bit) */
 383
 384                 if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
 385                         /* if the long-branches flag isn't set yet, do it */
 386
 387                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 388                                 log_println("setting error");
 389                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 390                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 391                         }
 392
 393                         vm_abort("emit_branch: emit long-branch on reg code");
 394                 }
 395                 else {
 396                         switch (condition) {
 397                         case BRANCH_EQ:
 398                                 M_BEQZ(reg, branchdisp);
 399                                 break;
 400                         case BRANCH_NE:
 401                                 M_BNEZ(reg, branchdisp);
 402                                 break;
 403                         case BRANCH_LT:
 404                                 M_BLTZ(reg, branchdisp);
 405                                 break;
 406                         case BRANCH_GE:
 407                                 M_BGEZ(reg, branchdisp);
 408                                 break;
 409                         case BRANCH_GT:
 410                                 M_BGTZ(reg, branchdisp);
 411                                 break;
 412                         case BRANCH_LE:
 413                                 M_BLEZ(reg, branchdisp);
 414                                 break;
 415                         default:
 416                                 vm_abort("emit_branch: unknown condition %d", condition);
 417                         }
 418
 419                         /* branch delay */
 420                         M_NOP;
 421                 }
 422         }
 423 }
 424
 425
 426 /* emit_bxx_xcc*****************************************************************
 427
 428    Wrappers for branches on 64-bit condition codes (SPARC specific).
 429
 430 *******************************************************************************/
 431
 432 void emit_beq_xcc(codegendata *cd, basicblock *target)
 433 {
 434         emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
 435 }
 436
 437 void emit_bne_xcc(codegendata *cd, basicblock *target)
 438 {
 439         emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
 440 }
 441
 442 void emit_blt_xcc(codegendata *cd, basicblock *target)
 443 {
 444         emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
 445 }
 446
 447 void emit_bge_xcc(codegendata *cd, basicblock *target)
 448 {
 449         emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
 450 }
 451
 452 void emit_bgt_xcc(codegendata *cd, basicblock *target)
 453 {
 454         emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
 455 }
 456
 457 void emit_ble_xcc(codegendata *cd, basicblock *target)
 458 {
 459         emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
 460 }
 461
 462
 463
 464
 465
 466 /* emit_arithmetic_check *******************************************************
 467
 468    Emit an ArithmeticException check.
 469
 470 *******************************************************************************/
 471
 472 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 473 {
 474         if (INSTRUCTION_MUST_CHECK(iptr)) {
 475                 M_BNEZ(reg, 3);
 476                 M_NOP;
 477                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 478         }
 479 }
 480
 481
 482 /* emit_arrayindexoutofbounds_check ********************************************
 483
 484    Emit an ArrayIndexOutOfBoundsException check.
 485
 486 *******************************************************************************/
 487
 488 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 489 {
 490         if (INSTRUCTION_MUST_CHECK(iptr)) {
 491                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 492                 M_CMP(s2, REG_ITMP3);
 493                 M_XBULT(3);
 494                 M_NOP;
 495                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 496         }
 497 }
 498
 499
 500 /* emit_arraystore_check *******************************************************
 501
 502    Emit an ArrayStoreException check.
 503
 504 *******************************************************************************/
 505
 506 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 507 {
 508         if (INSTRUCTION_MUST_CHECK(iptr)) {
 509                 M_BNEZ(REG_RESULT_CALLER, 3);
 510                 M_NOP;
 511                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_ArrayStoreException);
 512         }
 513 }
 514
 515
 516 /* emit_classcast_check ********************************************************
 517
 518    Emit a ClassCastException check.
 519
 520 *******************************************************************************/
 521
 522 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 523 {
 524 /* XXX: use 64-bit or 32-bit compares??? */
 525
 526         if (INSTRUCTION_MUST_CHECK(iptr)) {
 527                 switch (condition) {
 528                 case ICMD_IFEQ:
 529                         M_BNEZ(reg, 3);
 530                         break;
 531
 532                 case ICMD_IFLE:
 533                         M_BGTZ(reg, 3);
 534                         break;
 535
 536                 case BRANCH_ULT:
 537                         M_XBUGE(3);
 538                         break;
 539
 540                 default:
 541                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 542                 }
 543
 544                 M_NOP;
 545                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
 546         }
 547 }
 548
 549
 550 /* emit_nullpointer_check ******************************************************
 551
 552    Emit a NullPointerException check.
 553
 554 *******************************************************************************/
 555
 556 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 557 {
 558         if (INSTRUCTION_MUST_CHECK(iptr)) {
 559                 M_BNEZ(reg, 3);
 560                 M_NOP;
 561                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 562         }
 563 }
 564
 565
 566 /* emit_exception_check ********************************************************
 567
 568    Emit an Exception check.
 569
 570 *******************************************************************************/
 571
 572 void emit_exception_check(codegendata *cd, instruction *iptr)
 573 {
 574         if (INSTRUCTION_MUST_CHECK(iptr)) {
 575                 M_BNEZ(REG_RESULT_CALLER, 3);
 576                 M_NOP;
 577                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_CHECK_EXCEPTION);
 578         }
 579 }
 580
 581
 582 /* emit_trap *******************************************************************
 583
 584    Emit a trap instruction and return the original machine code.
 585
 586 *******************************************************************************/
 587
 588 uint32_t emit_trap(codegendata *cd)
 589 {
 590         uint32_t mcode;
 591
 592         /* Get machine code which is patched back in later. The
 593            trap is 1 instruction word long. */
 594
 595         mcode = *((uint32_t *) cd->mcodeptr);
 596
 597         M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_PATCHER);
 598
 599         return mcode;
 600 }
 601
 602
 603 /**
 604  * Emit code to recompute the procedure vector.
 605  */
 606 void emit_recompute_pv(codegendata *cd)
 607 {
 608         int32_t disp = (int32_t) (cd->mcodeptr - cd->mcodebase);
 609
 610         /* REG_RA holds the value of the jmp instruction, therefore +8 */
 611         M_LDA(REG_ZERO, REG_RA_CALLER, -disp + 8);
 612 }
 613
 614
 615 /**
 616  * Generates synchronization code to enter a monitor.
 617  */
 618 #if defined(ENABLE_THREADS)
 619 void emit_monitor_enter(jitdata* jd, int32_t syncslot_offset)
 620 {
 621         int32_t i, slots;
 622         int32_t disp;
 623
 624         // Get required compiler data.
 625         methodinfo*  m  = jd->m;
 626         codegendata* cd = jd->cd;
 627
 628 # if !defined(NDEBUG)
 629         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 630                 /* save float argument registers */
 631
 632                 /* XXX jit-c-call */
 633                 slots = FLT_ARG_CNT;
 634                 ALIGN_STACK_SLOTS(slots);
 635
 636                 M_LDA(REG_SP, REG_SP, -(slots * 8));
 637                 for (i = 0; i < FLT_ARG_CNT; i++)
 638                         M_DST(abi_registers_float_argument[i], REG_SP, CSTACK +  i * 8);
 639
 640                 syncslot_offset += slots * 8;
 641         }
 642 # endif
 643
 644         /* get correct lock object */
 645
 646         if (m->flags & ACC_STATIC) {
 647                 disp = dseg_add_address(cd, &m->clazz->object.header);
 648                 M_ALD(REG_OUT0, REG_PV, disp);
 649                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
 650                 M_ALD(REG_ITMP3, REG_PV, disp);
 651         }
 652         else {
 653                 /* copy class pointer: $i0 -> $o0 */
 654                 M_MOV(REG_RESULT_CALLEE, REG_OUT0);
 655                 M_BNEZ(REG_OUT0, 3);
 656                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
 657                 M_ALD(REG_ITMP3, REG_PV, disp);                       /* branch delay */
 658                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 659         }
 660
 661         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 662         M_AST(REG_OUT0, REG_SP, CSTACK + syncslot_offset);        /* branch delay */
 663
 664 # if !defined(NDEBUG)
 665         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 666                 /* restore float argument registers */
 667
 668                 for (i = 0; i < FLT_ARG_CNT; i++)
 669                         M_DLD(abi_registers_float_argument[i], REG_SP, CSTACK + i * 8);
 670
 671                 M_LDA(REG_SP, REG_SP, slots * 8);
 672         }
 673 # endif
 674 }
 675 #endif
 676
 677
 678 /**
 679  * Generates synchronization code to leave a monitor.
 680  */
 681 #if defined(ENABLE_THREADS)
 682 void emit_monitor_exit(jitdata* jd, int32_t syncslot_offset)
 683 {
 684         int32_t disp;
 685
 686         // Get required compiler data.
 687         methodinfo*  m  = jd->m;
 688         codegendata* cd = jd->cd;
 689
 690         /* XXX jit-c-call */
 691         disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
 692         M_ALD(REG_ITMP3, REG_PV, disp);
 693
 694         /* we need to save fp return value (int saved by window) */
 695
 696         methoddesc* md = m->parseddesc;
 697
 698         switch (md->returntype.type) {
 699         case TYPE_FLT:
 700         case TYPE_DBL:
 701                 M_ALD(REG_OUT0, REG_SP, CSTACK + syncslot_offset);
 702                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 703                 M_DST(REG_FRESULT, REG_SP, CSTACK + syncslot_offset); /* delay */
 704
 705                 /* restore the fp return value */
 706
 707                 M_DLD(REG_FRESULT, REG_SP, CSTACK + syncslot_offset);
 708                 break;
 709         case TYPE_INT:
 710         case TYPE_LNG:
 711         case TYPE_DBL:
 712         default:
 713                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 714                 M_ALD(REG_OUT0, REG_SP, CSTACK + syncslot_offset); /* delay */
 715                 break;
 716         }
 717 }
 718 #endif
 719
 720
 721 /* emit_patcher_stubs **********************************************************
 722
 723    Generates the code for the patcher stubs.
 724
 725 *******************************************************************************/
 726
 727 void emit_patcher_stubs(jitdata *jd)
 728 {
 729         codegendata *cd;
 730         patchref    *pref;
 731         u4           mcode[2];
 732         u1          *savedmcodeptr;
 733         u1          *tmpmcodeptr;
 734         s4           targetdisp;
 735         s4           disp;
 736
 737         /* get required compiler data */
 738
 739         cd = jd->cd;
 740
 741         /* generate code patching stub call code */
 742
 743         targetdisp = 0;
 744
 745         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 746                 /* check code segment size */
 747
 748                 MCODECHECK(100);
 749
 750                 /* Get machine code which is patched back in later. The
 751                    call is 2 instruction words long. */
 752
 753                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 754
 755                 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
 756                    SPARC causes a SIGSEGV */
 757
 758                 mcode[0] = ((u4 *) tmpmcodeptr)[0];
 759                 mcode[1] = ((u4 *) tmpmcodeptr)[1];
 760
 761                 /* Patch in the call to call the following code (done at
 762                    compile time). */
 763
 764                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
 765                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
 766
 767                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) );
 768
 769                 if ((disp < (s4) 0xfffc0000) || (disp > (s4) 0x003ffff)) {
 770                         vm_abort("Jump offset is out of range: %d > +/-%d",
 771                                          disp, 0x003ffff);
 772                         return;
 773                 }
 774
 775                 M_BR(disp);
 776                 M_NOP;
 777
 778                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
 779
 780                 /* extend stack frame for wrapper data */
 781
 782                 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
 783
 784                 /* calculate return address and move it onto the stack */
 785
 786                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
 787                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 5 * 8);
 788
 789                 /* move pointer to java_objectheader onto stack */
 790
 791 #if defined(ENABLE_THREADS)
 792                 /* create a virtual java_objectheader */
 793
 794                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
 795                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 796                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
 797
 798                 M_LDA(REG_ITMP3, REG_PV, disp);
 799                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 4 * 8);
 800 #else
 801                 /* do nothing */
 802 #endif
 803
 804                 /* move machine code onto stack */
 805
 806                 disp = dseg_add_s4(cd, mcode[0]);
 807                 M_ILD(REG_ITMP3, REG_PV, disp);
 808                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8);
 809
 810                 disp = dseg_add_s4(cd, mcode[1]);
 811                 M_ILD(REG_ITMP3, REG_PV, disp);
 812                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8 + 4);
 813
 814                 /* move class/method/field reference onto stack */
 815
 816                 disp = dseg_add_address(cd, pref->ref);
 817                 M_ALD(REG_ITMP3, REG_PV, disp);
 818                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 2 * 8);
 819
 820         /* move data segment displacement onto stack */
 821
 822                 disp = dseg_add_s4(cd, pref->disp);
 823                 M_ILD(REG_ITMP3, REG_PV, disp);
 824                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 1 * 8);
 825
 826                 /* move patcher function pointer onto stack */
 827
 828                 disp = dseg_add_functionptr(cd, pref->patcher);
 829                 M_ALD(REG_ITMP3, REG_PV, disp);
 830                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 0 * 8);
 831
 832                 if (targetdisp == 0) {
 833                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 834
 835                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 836                         M_ALD(REG_ITMP3, REG_PV, disp);
 837                         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);
 838                         M_NOP;
 839                 }
 840                 else {
 841                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 842                                 (((u4 *) cd->mcodeptr));
 843
 844                         M_BR(disp);
 845                         M_NOP;
 846                 }
 847         }
 848 }
 849
 850
 851 /* emit_verbosecall_enter ******************************************************
 852
 853    Generates the code for the call trace.
 854
 855 *******************************************************************************/
 856
 857 #if !defined(NDEBUG)
 858 void emit_verbosecall_enter(jitdata *jd)
 859 {
 860         methodinfo   *m;
 861         codegendata  *cd;
 862         registerdata *rd;
 863         methoddesc   *md;
 864         s4            disp;
 865         s4            i, t;
 866         s4            stackslots;
 867
 868         /* get required compiler data */
 869
 870         m  = jd->m;
 871         cd = jd->cd;
 872         rd = jd->rd;
 873
 874         md = m->parseddesc;
 875
 876         /* mark trace code */
 877
 878         M_NOP;
 879
 880         /* XXX jit-c-call */
 881         stackslots = 1 + FLT_ARG_CNT;
 882         ALIGN_STACK_SLOTS(stackslots);
 883
 884         M_LDA(REG_SP, REG_SP, -(stackslots * 8));
 885
 886         /* save float argument registers */
 887
 888         for (i = 0; i < FLT_ARG_CNT; i++)
 889                 M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 890
 891         /* save temporary registers for leaf methods */
 892 /* XXX no leaf optimization yet
 893         if (code_is_leafmethod(code)) {
 894                 for (i = 0; i < INT_TMP_CNT; i++)
 895                         M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 896
 897                 for (i = 0; i < FLT_TMP_CNT; i++)
 898                         M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 899         }
 900 */
 901         /* load int/float arguments into integer argument registers */
 902
 903         for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
 904                 t = md->paramtypes[i].type;
 905
 906                 /* all available argument registers used, which adds a little complexity */
 907
 908                 if (IS_INT_LNG_TYPE(t)) {
 909                         if (i < INT_ARG_CNT) {
 910                                 M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]),
 911                                         abi_registers_integer_argument[i]);
 912                         }
 913                         else {
 914                                 assert(i == 5);
 915                                 M_LDX(REG_OUT5, REG_FP, JITSTACK);
 916                         }
 917                 }
 918                 else {
 919                         if (i < FLT_ARG_CNT) {
 920
 921                                 /* reg -> mem -> reg */
 922
 923                                 if (IS_2_WORD_TYPE(t)) {
 924                                         M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 925                                         M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 926                                 }
 927                                 else {
 928                                         M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 929                                         M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 930                                 }
 931                         }
 932                         else {
 933
 934                                 /* mem -> reg */
 935
 936                                 assert(i == 5);
 937                                 if (IS_2_WORD_TYPE(t)) {
 938                                         M_LDX(REG_OUT5, REG_FP, JITSTACK);
 939                                 }
 940                                 else {
 941                                         M_ILD(REG_OUT5, REG_FP, JITSTACK);
 942                                 }
 943                         }
 944                 }
 945         }
 946
 947
 948         /* method info pointer is passed via stack */
 949         disp = dseg_add_address(cd, m);
 950         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 951         M_AST(REG_ITMP1, REG_SP, CSTACK);
 952         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 953         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 954         M_JMP(REG_RA_CALLER, REG_ITMP1, REG_ZERO);
 955         M_NOP;
 956
 957         /* restore float argument registers */
 958
 959         for (i = 0; i < FLT_ARG_CNT; i++)
 960                 M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 961
 962         /* restore temporary registers for leaf methods */
 963 /* XXX no leaf optimization yet
 964         if (code_is_leafmethod(code)) {
 965                 for (i = 0; i < INT_TMP_CNT; i++)
 966                         M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 967
 968                 for (i = 0; i < FLT_TMP_CNT; i++)
 969                         M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 970         }
 971 */
 972         M_LDA(REG_SP, REG_SP, stackslots * 8);
 973
 974         /* mark trace code */
 975
 976         M_NOP;
 977 }
 978 #endif /* !defined(NDEBUG) */
 979
 980
 981 /* emit_verbosecall_exit *******************************************************
 982
 983    Generates the code for the call trace.
 984
 985 *******************************************************************************/
 986
 987 #if !defined(NDEBUG)
 988 void emit_verbosecall_exit(jitdata *jd)
 989 {
 990         methodinfo   *m;
 991         codegendata  *cd;
 992         registerdata *rd;
 993         s4            disp;
 994
 995         /* get required compiler data */
 996
 997         m  = jd->m;
 998         cd = jd->cd;
 999         rd = jd->rd;
1000
1001         /* mark trace code */
1002
1003         M_NOP;
1004
1005         /* XXX jit-c-call (keep stack aligned)*/
1006         M_LDA(REG_SP, REG_SP, -(2 * 8));
1007
1008         M_DST(REG_FRESULT, REG_SP, JITSTACK);
1009
1010         M_MOV(REG_RESULT_CALLEE, REG_OUT0);
1011         M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
1012         M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
1013
1014         disp = dseg_add_functionptr(cd, m);
1015         M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
1016
1017         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
1018         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
1019         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
1020         M_NOP;
1021
1022         M_DLD(REG_FRESULT, REG_SP, JITSTACK);
1023
1024         M_LDA(REG_SP, REG_SP, 2 * 8);
1025
1026         /* mark trace code */
1027
1028         M_NOP;
1029 }
1030 #endif /* !defined(NDEBUG) */
1031
1032
1033 /*
1034  * These are local overrides for various environment variables in Emacs.
1035  * Please do not remove this and leave it at the end of the file, where
1036  * Emacs will automagically detect them.
1037  * ---------------------------------------------------------------------
1038  * Local variables:
1039  * mode: c
1040  * indent-tabs-mode: t
1041  * c-basic-offset: 4
1042  * tab-width: 4
1043  * End:
1044  * vim:noexpandtab:sw=4:ts=4:
1045  */