src/vm/jit/sparc64/emit.c

   1 /* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33
  34 #include "vm/types.h"
  35
  36 #include "vm/jit/sparc64/codegen.h"
  37 #include "vm/jit/sparc64/md-abi.h"
  38 #include "vm/jit/sparc64/emit.h"
  39
  40 #include "mm/memory.h"
  41
  42 #include "vm/exceptions.h"
  43 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
  44 #include "vm/jit/abi.h"
  45 #include "vm/jit/abi-asm.h"
  46 #include "vm/jit/asmpart.h"
  47 #include "vm/builtin.h"
  48 #include "vm/jit/dseg.h"
  49 #include "vm/jit/emit-common.h"
  50 #include "vm/jit/jit.h"
  51 #include "vm/jit/replace.h"
  52
  53 #include "vmcore/options.h"
  54
  55 #include "vm/jit/sparc64/solaris/macro_rename.h"
  56
  57 /* how to leaf optimization in the emitted stubs?? */
  58 #define REG_PV REG_PV_CALLEE
  59
  60
  61 /* emit_load *******************************************************************
  62
  63    Emits a possible load of an operand.
  64
  65 *******************************************************************************/
  66
  67 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  68 {
  69         codegendata  *cd;
  70         s4            disp;
  71         s4            reg;
  72
  73         /* get required compiler data */
  74
  75         cd = jd->cd;
  76
  77         if (src->flags & INMEMORY) {
  78                 COUNT_READ_SPILLS(src)
  79
  80                 disp = JITSTACK + src->vv.regoff;
  81
  82                 switch(src->type)
  83                 {
  84                 case TYPE_INT:
  85                 case TYPE_LNG:
  86                 case TYPE_ADR:
  87                         M_LDX(tempreg, REG_SP, disp);
  88                         break;
  89                 case TYPE_FLT:
  90                 case TYPE_DBL:
  91                         M_DLD(tempreg, REG_SP, disp);
  92                         break;
  93                 default:
  94                         vm_abort("emit_load: unknown type %d", src->type);
  95                         break;
  96                 }
  97
  98                 reg = tempreg;
  99         }
 100         else
 101                 reg = src->vv.regoff;
 102
 103         return reg;
 104 }
 105
 106
 107 /* emit_store ******************************************************************
 108
 109    Emits a possible store to variable.
 110
 111 *******************************************************************************/
 112
 113 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 114 {
 115         codegendata  *cd;
 116         s4            disp;
 117
 118         /* get required compiler data */
 119
 120         cd = jd->cd;
 121
 122         if (dst->flags & INMEMORY) {
 123                 COUNT_WRITE_SPILLS(dst)
 124
 125                 disp = JITSTACK + dst->vv.regoff;
 126
 127                 switch(dst->type)
 128                 {
 129                 case TYPE_INT:
 130                 case TYPE_LNG:
 131                 case TYPE_ADR:
 132                         M_STX(d, REG_SP, disp);
 133                         break;
 134                 case TYPE_FLT:
 135                 case TYPE_DBL:
 136                         M_DST(d, REG_SP, disp);
 137                         break;
 138                 default:
 139                         vm_abort("emit_store: unknown type %d", dst->type);
 140                         break;
 141                 }
 142         }
 143 }
 144
 145
 146 /* emit_copy *******************************************************************
 147
 148    Generates a register/memory to register/memory copy.
 149
 150 *******************************************************************************/
 151
 152 void emit_copy(jitdata *jd, instruction *iptr)
 153 {
 154         codegendata *cd;
 155         varinfo     *src;
 156         varinfo     *dst;
 157         s4           s1, d;
 158
 159         /* get required compiler data */
 160
 161         cd = jd->cd;
 162
 163         /* get source and destination variables */
 164
 165         src = VAROP(iptr->s1);
 166         dst = VAROP(iptr->dst);
 167
 168         if ((src->vv.regoff != dst->vv.regoff) ||
 169                 ((src->flags ^ dst->flags) & INMEMORY)) {
 170
 171                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 172                         /* emit nothing, as the value won't be used anyway */
 173                         return;
 174                 }
 175
 176                 /* If one of the variables resides in memory, we can eliminate
 177                    the register move from/to the temporary register with the
 178                    order of getting the destination register and the load. */
 179
 180                 if (IS_INMEMORY(src->flags)) {
 181                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 182                         s1 = emit_load(jd, iptr, src, d);
 183                 }
 184                 else {
 185                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 186                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
 187                 }
 188
 189                 if (s1 != d) {
 190                         switch(src->type) {
 191                         case TYPE_INT:
 192                         case TYPE_LNG:
 193                         case TYPE_ADR:
 194                                 M_MOV(s1, d);
 195                                 break;
 196                         case TYPE_FLT:
 197                         case TYPE_DBL:
 198                                 M_DMOV(s1, d);
 199                                 break;
 200                         default:
 201                                 vm_abort("emit_copy: unknown type %d", src->type);
 202                                 break;
 203                         }
 204                 }
 205
 206                 emit_store(jd, iptr, dst, d);
 207         }
 208 }
 209
 210
 211 /* emit_iconst *****************************************************************
 212
 213    XXX
 214
 215 *******************************************************************************/
 216
 217 void emit_iconst(codegendata *cd, s4 d, s4 value)
 218 {
 219         s4 disp;
 220
 221         if ((value >= -4096) && (value <= 4095)) {
 222                 M_XOR_IMM(REG_ZERO, value, d);
 223         } else {
 224                 disp = dseg_add_s4(cd, value);
 225                 M_ILD(d, REG_PV_CALLEE, disp);
 226         }
 227 }
 228
 229
 230 /* emit_lconst *****************************************************************
 231
 232    XXX
 233
 234 *******************************************************************************/
 235
 236 void emit_lconst(codegendata *cd, s4 d, s8 value)
 237 {
 238         s4 disp;
 239
 240         if ((value >= -4096) && (value <= 4095)) {
 241                 M_XOR_IMM(REG_ZERO, value, d);
 242         } else {
 243                 disp = dseg_add_s8(cd, value);
 244                 M_LDX(d, REG_PV_CALLEE, disp);
 245         }
 246 }
 247
 248 /* emit_branch *****************************************************************
 249
 250    Emits the code for conditional and unconditional branchs.
 251
 252 *******************************************************************************/
 253
 254 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 255 {
 256         s4 branchdisp;
 257
 258         /* calculate the different displacements */
 259
 260         branchdisp = disp >> 2;
 261
 262         /* check which branch to generate */
 263
 264         if (condition == BRANCH_UNCONDITIONAL) {
 265                 /* check displacement for overflow (19-bit)*/
 266
 267                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 268                         /* if the long-branches flag isn't set yet, do it */
 269
 270                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 271                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 272                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 273                         }
 274
 275                         vm_abort("emit_branch: emit unconditional long-branch code");
 276                 }
 277                 else {
 278                         M_BR(branchdisp);
 279                         M_NOP;
 280                 }
 281         }
 282         else if (reg == -1) {
 283                 /* branch on condition codes */
 284
 285                 /* check displacement for overflow (19-bit)*/
 286
 287                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
 288                         /* if the long-branches flag isn't set yet, do it */
 289
 290                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 291                                 log_println("setting error");
 292                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 293                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 294                         }
 295
 296                         vm_abort("emit_branch: emit long-branch on cc code");
 297                 }
 298                 else {
 299                         /* check whether to branch on 64-bit condition code */
 300                         if (BRANCH_CHECKS_XCC(opt)) {
 301                                 switch (condition) {
 302                                 case BRANCH_EQ:
 303                                         M_XBEQ(branchdisp);
 304                                         break;
 305                                 case BRANCH_NE:
 306                                         M_XBNE(branchdisp);
 307                                         break;
 308                                 case BRANCH_LT:
 309                                         M_XBLT(branchdisp);
 310                                         break;
 311                                 case BRANCH_GE:
 312                                         M_XBGE(branchdisp);
 313                                         break;
 314                                 case BRANCH_GT:
 315                                         M_XBGT(branchdisp);
 316                                         break;
 317                                 case BRANCH_LE:
 318                                         M_XBLE(branchdisp);
 319                                         break;
 320                                 case BRANCH_UGT:
 321                                         M_XBUGT(branchdisp);
 322                                         break;
 323                                 case BRANCH_ULT:
 324                                         M_XBULT(branchdisp);
 325                                         break;
 326                                 default:
 327                                         vm_abort("emit_branch: unknown condition %d", condition);
 328                                 }
 329
 330                                 /* branch delay */
 331                                 M_NOP;
 332                         }
 333                         else {
 334                                 switch (condition) {
 335                                 case BRANCH_EQ:
 336                                         M_BEQ(branchdisp);
 337                                         break;
 338                                 case BRANCH_NE:
 339                                         M_BNE(branchdisp);
 340                                         break;
 341                                 case BRANCH_LT:
 342                                         M_BLT(branchdisp);
 343                                         break;
 344                                 case BRANCH_GE:
 345                                         M_BGE(branchdisp);
 346                                         break;
 347                                 case BRANCH_GT:
 348                                         M_BGT(branchdisp);
 349                                         break;
 350                                 case BRANCH_LE:
 351                                         M_BLE(branchdisp);
 352                                         break;
 353                                 case BRANCH_UGT:
 354                                         M_BUGT(branchdisp);
 355                                         break;
 356                                 case BRANCH_ULT:
 357                                         M_BULT(branchdisp);
 358                                         break;
 359                                 default:
 360                                         vm_abort("emit_branch: unknown condition %d", condition);
 361                                 }
 362
 363                                 /* branch delay */
 364                                 M_NOP;
 365                         }
 366                 }
 367         }
 368         else {
 369                 /* branch on register */
 370
 371                 /* check displacement for overflow (16-bit) */
 372
 373                 if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
 374                         /* if the long-branches flag isn't set yet, do it */
 375
 376                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 377                                 log_println("setting error");
 378                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 379                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 380                         }
 381
 382                         vm_abort("emit_branch: emit long-branch on reg code");
 383                 }
 384                 else {
 385                         switch (condition) {
 386                         case BRANCH_EQ:
 387                                 M_BEQZ(reg, branchdisp);
 388                                 break;
 389                         case BRANCH_NE:
 390                                 M_BNEZ(reg, branchdisp);
 391                                 break;
 392                         case BRANCH_LT:
 393                                 M_BLTZ(reg, branchdisp);
 394                                 break;
 395                         case BRANCH_GE:
 396                                 M_BGEZ(reg, branchdisp);
 397                                 break;
 398                         case BRANCH_GT:
 399                                 M_BGTZ(reg, branchdisp);
 400                                 break;
 401                         case BRANCH_LE:
 402                                 M_BLEZ(reg, branchdisp);
 403                                 break;
 404                         default:
 405                                 vm_abort("emit_branch: unknown condition %d", condition);
 406                         }
 407
 408                         /* branch delay */
 409                         M_NOP;
 410                 }
 411         }
 412 }
 413
 414
 415 /* emit_bxx_xcc*****************************************************************
 416
 417    Wrappers for branches on 64-bit condition codes (SPARC specific).
 418
 419 *******************************************************************************/
 420
 421 void emit_beq_xcc(codegendata *cd, basicblock *target)
 422 {
 423         emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
 424 }
 425
 426 void emit_bne_xcc(codegendata *cd, basicblock *target)
 427 {
 428         emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
 429 }
 430
 431 void emit_blt_xcc(codegendata *cd, basicblock *target)
 432 {
 433         emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
 434 }
 435
 436 void emit_bge_xcc(codegendata *cd, basicblock *target)
 437 {
 438         emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
 439 }
 440
 441 void emit_bgt_xcc(codegendata *cd, basicblock *target)
 442 {
 443         emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
 444 }
 445
 446 void emit_ble_xcc(codegendata *cd, basicblock *target)
 447 {
 448         emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
 449 }
 450
 451
 452
 453
 454
 455 /* emit_arithmetic_check *******************************************************
 456
 457    Emit an ArithmeticException check.
 458
 459 *******************************************************************************/
 460
 461 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 462 {
 463         if (INSTRUCTION_MUST_CHECK(iptr)) {
 464                 M_BNEZ(reg, 3);
 465                 M_NOP;
 466                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
 467         }
 468 }
 469
 470
 471 /* emit_arrayindexoutofbounds_check ********************************************
 472
 473    Emit an ArrayIndexOutOfBoundsException check.
 474
 475 *******************************************************************************/
 476
 477 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 478 {
 479         if (INSTRUCTION_MUST_CHECK(iptr)) {
 480                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 481                 M_CMP(s2, REG_ITMP3);
 482                 M_XBULT(3);
 483                 M_NOP;
 484                 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
 485         }
 486 }
 487
 488
 489 /* emit_classcast_check ********************************************************
 490
 491    Emit a ClassCastException check.
 492
 493 *******************************************************************************/
 494
 495 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 496 {
 497 /* XXX: use 64-bit or 32-bit compares??? */
 498
 499         if (INSTRUCTION_MUST_CHECK(iptr)) {
 500                 switch (condition) {
 501                 case ICMD_IFEQ:
 502                         M_BNEZ(reg, 3);
 503                         break;
 504
 505                 case ICMD_IFLE:
 506                         M_BGTZ(reg, 3);
 507                         break;
 508
 509                 case BRANCH_ULT:
 510                         M_XBUGE(3);
 511                         break;
 512
 513                 default:
 514                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 515                 }
 516
 517                 M_NOP;
 518                 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
 519         }
 520 }
 521
 522
 523 /* emit_nullpointer_check ******************************************************
 524
 525    Emit a NullPointerException check.
 526
 527 *******************************************************************************/
 528
 529 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 530 {
 531         if (INSTRUCTION_MUST_CHECK(iptr)) {
 532                 M_BNEZ(reg, 3);
 533                 M_NOP;
 534                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
 535         }
 536 }
 537
 538
 539 /* emit_exception_check ********************************************************
 540
 541    Emit an Exception check.
 542
 543 *******************************************************************************/
 544
 545 void emit_exception_check(codegendata *cd, instruction *iptr)
 546 {
 547         if (INSTRUCTION_MUST_CHECK(iptr)) {
 548                 M_BNEZ(REG_RESULT_CALLER, 3);
 549                 M_NOP;
 550                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
 551         }
 552 }
 553
 554
 555 /* emit_trap *******************************************************************
 556
 557    Emit a trap instruction and return the original machine code.
 558
 559 *******************************************************************************/
 560
 561 uint32_t emit_trap(codegendata *cd)
 562 {
 563         uint32_t mcode;
 564
 565         /* Get machine code which is patched back in later. The
 566            trap is 1 instruction word long. */
 567
 568         mcode = *((u4 *) cd->mcodeptr);
 569
 570         M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
 571
 572         return mcode;
 573 }
 574
 575
 576 /* emit_patcher_stubs **********************************************************
 577
 578    Generates the code for the patcher stubs.
 579
 580 *******************************************************************************/
 581
 582 void emit_patcher_stubs(jitdata *jd)
 583 {
 584         codegendata *cd;
 585         patchref    *pref;
 586         u4           mcode[2];
 587         u1          *savedmcodeptr;
 588         u1          *tmpmcodeptr;
 589         s4           targetdisp;
 590         s4           disp;
 591
 592         /* get required compiler data */
 593
 594         cd = jd->cd;
 595
 596         /* generate code patching stub call code */
 597
 598         targetdisp = 0;
 599
 600         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 601                 /* check code segment size */
 602
 603                 MCODECHECK(100);
 604
 605                 /* Get machine code which is patched back in later. The
 606                    call is 2 instruction words long. */
 607
 608                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 609
 610                 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
 611                    SPARC causes a SIGSEGV */
 612
 613                 mcode[0] = ((u4 *) tmpmcodeptr)[0];
 614                 mcode[1] = ((u4 *) tmpmcodeptr)[1];
 615
 616                 /* Patch in the call to call the following code (done at
 617                    compile time). */
 618
 619                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
 620                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
 621
 622                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) );
 623
 624                 if ((disp < (s4) 0xfffc0000) || (disp > (s4) 0x003ffff)) {
 625                         vm_abort("Jump offset is out of range: %d > +/-%d",
 626                                          disp, 0x003ffff);
 627                         return;
 628                 }
 629
 630                 M_BR(disp);
 631                 M_NOP;
 632
 633                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
 634
 635                 /* extend stack frame for wrapper data */
 636
 637                 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
 638
 639                 /* calculate return address and move it onto the stack */
 640
 641                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
 642                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 5 * 8);
 643
 644                 /* move pointer to java_objectheader onto stack */
 645
 646 #if defined(ENABLE_THREADS)
 647                 /* create a virtual java_objectheader */
 648
 649                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
 650                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 651                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
 652
 653                 M_LDA(REG_ITMP3, REG_PV, disp);
 654                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 4 * 8);
 655 #else
 656                 /* do nothing */
 657 #endif
 658
 659                 /* move machine code onto stack */
 660
 661                 disp = dseg_add_s4(cd, mcode[0]);
 662                 M_ILD(REG_ITMP3, REG_PV, disp);
 663                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8);
 664
 665                 disp = dseg_add_s4(cd, mcode[1]);
 666                 M_ILD(REG_ITMP3, REG_PV, disp);
 667                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8 + 4);
 668
 669                 /* move class/method/field reference onto stack */
 670
 671                 disp = dseg_add_address(cd, pref->ref);
 672                 M_ALD(REG_ITMP3, REG_PV, disp);
 673                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 2 * 8);
 674
 675         /* move data segment displacement onto stack */
 676
 677                 disp = dseg_add_s4(cd, pref->disp);
 678                 M_ILD(REG_ITMP3, REG_PV, disp);
 679                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 1 * 8);
 680
 681                 /* move patcher function pointer onto stack */
 682
 683                 disp = dseg_add_functionptr(cd, pref->patcher);
 684                 M_ALD(REG_ITMP3, REG_PV, disp);
 685                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 0 * 8);
 686
 687                 if (targetdisp == 0) {
 688                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 689
 690                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 691                         M_ALD(REG_ITMP3, REG_PV, disp);
 692                         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);
 693                         M_NOP;
 694                 }
 695                 else {
 696                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 697                                 (((u4 *) cd->mcodeptr));
 698
 699                         M_BR(disp);
 700                         M_NOP;
 701                 }
 702         }
 703 }
 704
 705
 706 /* emit_verbosecall_enter ******************************************************
 707
 708    Generates the code for the call trace.
 709
 710 *******************************************************************************/
 711
 712 #if !defined(NDEBUG)
 713 void emit_verbosecall_enter(jitdata *jd)
 714 {
 715         methodinfo   *m;
 716         codegendata  *cd;
 717         registerdata *rd;
 718         methoddesc   *md;
 719         s4            disp;
 720         s4            i, t;
 721         s4            stackslots;
 722
 723         /* get required compiler data */
 724
 725         m  = jd->m;
 726         cd = jd->cd;
 727         rd = jd->rd;
 728
 729         md = m->parseddesc;
 730
 731         /* mark trace code */
 732
 733         M_NOP;
 734
 735         /* XXX jit-c-call */
 736         stackslots = 1 + FLT_ARG_CNT;
 737         ALIGN_STACK_SLOTS(stackslots);
 738
 739         M_LDA(REG_SP, REG_SP, -(stackslots * 8));
 740
 741         /* save float argument registers */
 742
 743         for (i = 0; i < FLT_ARG_CNT; i++)
 744                 M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 745
 746         /* save temporary registers for leaf methods */
 747 /* XXX no leaf optimization yet
 748         if (jd->isleafmethod) {
 749                 for (i = 0; i < INT_TMP_CNT; i++)
 750                         M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 751
 752                 for (i = 0; i < FLT_TMP_CNT; i++)
 753                         M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 754         }
 755 */
 756         /* load int/float arguments into integer argument registers */
 757
 758         for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
 759                 t = md->paramtypes[i].type;
 760
 761                 /* all available argument registers used, which adds a little complexity */
 762
 763                 if (IS_INT_LNG_TYPE(t)) {
 764                         if (i < INT_ARG_CNT) {
 765                                 M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]),
 766                                         abi_registers_integer_argument[i]);
 767                         }
 768                         else {
 769                                 assert(i == 5);
 770                                 M_LDX(REG_OUT5, REG_FP, JITSTACK);
 771                         }
 772                 }
 773                 else {
 774                         if (i < FLT_ARG_CNT) {
 775
 776                                 /* reg -> mem -> reg */
 777
 778                                 if (IS_2_WORD_TYPE(t)) {
 779                                         M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 780                                         M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 781                                 }
 782                                 else {
 783                                         M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
 784                                         M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
 785                                 }
 786                         }
 787                         else {
 788
 789                                 /* mem -> reg */
 790
 791                                 assert(i == 5);
 792                                 if (IS_2_WORD_TYPE(t)) {
 793                                         M_LDX(REG_OUT5, REG_FP, JITSTACK);
 794                                 }
 795                                 else {
 796                                         M_ILD(REG_OUT5, REG_FP, JITSTACK);
 797                                 }
 798                         }
 799                 }
 800         }
 801
 802
 803         /* method info pointer is passed via stack */
 804         disp = dseg_add_address(cd, m);
 805         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 806         M_AST(REG_ITMP1, REG_SP, CSTACK);
 807         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 808         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
 809         M_JMP(REG_RA_CALLER, REG_ITMP1, REG_ZERO);
 810         M_NOP;
 811
 812         /* restore float argument registers */
 813
 814         for (i = 0; i < FLT_ARG_CNT; i++)
 815                 M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
 816
 817         /* restore temporary registers for leaf methods */
 818 /* XXX no leaf optimization yet
 819         if (jd->isleafmethod) {
 820                 for (i = 0; i < INT_TMP_CNT; i++)
 821                         M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
 822
 823                 for (i = 0; i < FLT_TMP_CNT; i++)
 824                         M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 825         }
 826 */
 827         M_LDA(REG_SP, REG_SP, stackslots * 8);
 828
 829         /* mark trace code */
 830
 831         M_NOP;
 832 }
 833 #endif /* !defined(NDEBUG) */
 834
 835
 836 /* emit_verbosecall_exit *******************************************************
 837
 838    Generates the code for the call trace.
 839
 840 *******************************************************************************/
 841
 842 #if !defined(NDEBUG)
 843 void emit_verbosecall_exit(jitdata *jd)
 844 {
 845         methodinfo   *m;
 846         codegendata  *cd;
 847         registerdata *rd;
 848         s4            disp;
 849
 850         /* get required compiler data */
 851
 852         m  = jd->m;
 853         cd = jd->cd;
 854         rd = jd->rd;
 855
 856         /* mark trace code */
 857
 858         M_NOP;
 859
 860         /* XXX jit-c-call (keep stack aligned)*/
 861         M_LDA(REG_SP, REG_SP, -(2 * 8));
 862
 863         M_DST(REG_FRESULT, REG_SP, JITSTACK);
 864
 865         M_MOV(REG_RESULT_CALLEE, REG_OUT0);
 866         M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
 867         M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
 868
 869         disp = dseg_add_functionptr(cd, m);
 870         M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
 871
 872         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 873         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
 874         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
 875         M_NOP;
 876
 877         M_DLD(REG_FRESULT, REG_SP, JITSTACK);
 878
 879         M_LDA(REG_SP, REG_SP, 2 * 8);
 880
 881         /* mark trace code */
 882
 883         M_NOP;
 884 }
 885 #endif /* !defined(NDEBUG) */
 886
 887
 888 /*
 889  * These are local overrides for various environment variables in Emacs.
 890  * Please do not remove this and leave it at the end of the file, where
 891  * Emacs will automagically detect them.
 892  * ---------------------------------------------------------------------
 893  * Local variables:
 894  * mode: c
 895  * indent-tabs-mode: t
 896  * c-basic-offset: 4
 897  * tab-width: 4
 898  * End:
 899  * vim:noexpandtab:sw=4:ts=4:
 900  */