0c71d11a786dad601fb80cc9fea719a3fc1f54f4
[cacao.git] / src / vm / jit / sparc64 / emit.c
1 /* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
2
3    Copyright (C) 1996-2005, 2006, 2007, 2008
4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
5
6    This file is part of CACAO.
7
8    This program is free software; you can redistribute it and/or
9    modify it under the terms of the GNU General Public License as
10    published by the Free Software Foundation; either version 2, or (at
11    your option) any later version.
12
13    This program is distributed in the hope that it will be useful, but
14    WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16    General Public License for more details.
17
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21    02110-1301, USA.
22
23 */
24
25
26 #include "config.h"
27
28 #include <assert.h>
29
30 #include "vm/types.h"
31
32 #include "vm/jit/sparc64/codegen.h"
33 #include "vm/jit/sparc64/md-abi.h"
34 #include "vm/jit/sparc64/emit.h"
35
36 #include "mm/memory.hpp"
37
38 #include "vm/jit/builtin.hpp"
39 #include "vm/options.h"
40
41 #include "vm/jit/abi.h"
42 #include "vm/jit/abi-asm.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/dseg.h"
45 #include "vm/jit/emit-common.hpp"
46 #include "vm/jit/jit.hpp"
47 #include "vm/jit/replace.hpp"
48
49 #include "vm/jit/sparc64/solaris/macro_rename.h"
50
51 /* how to leaf optimization in the emitted stubs?? */
52 #define REG_PV REG_PV_CALLEE
53
54
55 /* emit_load *******************************************************************
56
57    Emits a possible load of an operand.
58
59 *******************************************************************************/
60
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
62 {
63         codegendata  *cd;
64         s4            disp;
65         s4            reg;
66
67         /* get required compiler data */
68
69         cd = jd->cd;
70
71         if (src->flags & INMEMORY) {
72                 COUNT_READ_SPILLS(src)
73
74                 disp = JITSTACK + src->vv.regoff;
75
76                 switch(src->type)
77                 {
78                 case TYPE_INT:
79                 case TYPE_LNG:
80                 case TYPE_ADR:
81                         M_LDX(tempreg, REG_SP, disp);
82                         break;
83                 case TYPE_FLT:
84                 case TYPE_DBL:
85                         M_DLD(tempreg, REG_SP, disp);
86                         break;
87                 default:
88                         vm_abort("emit_load: unknown type %d", src->type);
89                         break;
90                 }
91
92                 reg = tempreg;
93         }
94         else
95                 reg = src->vv.regoff;
96
97         return reg;
98 }
99
100
101 /* emit_store ******************************************************************
102
103    Emits a possible store to variable.
104
105 *******************************************************************************/
106
107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
108 {
109         codegendata  *cd;
110         s4            disp;
111
112         /* get required compiler data */
113
114         cd = jd->cd;
115
116         if (dst->flags & INMEMORY) {
117                 COUNT_WRITE_SPILLS(dst)
118
119                 disp = JITSTACK + dst->vv.regoff;
120         
121                 switch(dst->type)
122                 {
123                 case TYPE_INT:
124                 case TYPE_LNG:
125                 case TYPE_ADR:
126                         M_STX(d, REG_SP, disp);
127                         break;
128                 case TYPE_FLT:
129                 case TYPE_DBL:
130                         M_DST(d, REG_SP, disp);
131                         break;
132                 default:
133                         vm_abort("emit_store: unknown type %d", dst->type);
134                         break;
135                 }
136         }
137 }
138
139
140 /* emit_copy *******************************************************************
141
142    Generates a register/memory to register/memory copy.
143
144 *******************************************************************************/
145
146 void emit_copy(jitdata *jd, instruction *iptr)
147 {
148         codegendata *cd;
149         varinfo     *src;
150         varinfo     *dst;
151         s4           s1, d;
152
153         /* get required compiler data */
154
155         cd = jd->cd;
156
157         /* get source and destination variables */
158
159         src = VAROP(iptr->s1);
160         dst = VAROP(iptr->dst);
161
162         if ((src->vv.regoff != dst->vv.regoff) ||
163                 ((src->flags ^ dst->flags) & INMEMORY)) {
164
165                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
166                         /* emit nothing, as the value won't be used anyway */
167                         return;
168                 }
169
170                 /* If one of the variables resides in memory, we can eliminate
171                    the register move from/to the temporary register with the
172                    order of getting the destination register and the load. */
173
174                 if (IS_INMEMORY(src->flags)) {
175                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
176                         s1 = emit_load(jd, iptr, src, d);
177                 }
178                 else {
179                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
180                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
181                 }
182
183                 if (s1 != d) {          
184                         switch(src->type) {
185                         case TYPE_INT:
186                         case TYPE_LNG:
187                         case TYPE_ADR:
188                                 M_MOV(s1, d);
189                                 break;
190                         case TYPE_FLT:
191                         case TYPE_DBL:
192                                 M_DMOV(s1, d);
193                                 break;
194                         default:
195                                 vm_abort("emit_copy: unknown type %d", src->type);
196                                 break;
197                         }
198                 }
199
200                 emit_store(jd, iptr, dst, d);
201         }
202 }
203
204
205 /* emit_iconst *****************************************************************
206
207    XXX
208
209 *******************************************************************************/
210
211 void emit_iconst(codegendata *cd, s4 d, s4 value)
212 {
213         s4 disp;
214
215         if ((value >= -4096) && (value <= 4095)) {
216                 M_XOR_IMM(REG_ZERO, value, d);
217         } else {
218                 disp = dseg_add_s4(cd, value);
219                 M_ILD(d, REG_PV_CALLEE, disp);
220         }
221 }
222
223
224 /* emit_lconst *****************************************************************
225
226    XXX
227
228 *******************************************************************************/
229
230 void emit_lconst(codegendata *cd, s4 d, s8 value)
231 {
232         s4 disp;
233
234         if ((value >= -4096) && (value <= 4095)) {
235                 M_XOR_IMM(REG_ZERO, value, d);  
236         } else {
237                 disp = dseg_add_s8(cd, value);
238                 M_LDX(d, REG_PV_CALLEE, disp);
239         }
240 }
241
242 /* emit_branch *****************************************************************
243
244    Emits the code for conditional and unconditional branchs.
245
246 *******************************************************************************/
247
248 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
249 {
250         s4 branchdisp;
251
252         /* calculate the different displacements */
253
254         branchdisp = disp >> 2;
255
256         /* check which branch to generate */
257
258         if (condition == BRANCH_UNCONDITIONAL) {
259                 /* check displacement for overflow (19-bit)*/
260
261                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
262                         /* if the long-branches flag isn't set yet, do it */
263
264                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
265                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
266                                                           CODEGENDATA_FLAG_LONGBRANCHES);
267                         }
268
269                         vm_abort("emit_branch: emit unconditional long-branch code");
270                 }
271                 else {
272                         M_BR(branchdisp);
273                         M_NOP;
274                 }
275         }
276         else if (reg == -1) {
277                 /* branch on condition codes */
278
279                 /* check displacement for overflow (19-bit)*/
280
281                 if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
282                         /* if the long-branches flag isn't set yet, do it */
283
284                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
285                                 log_println("setting error");
286                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
287                                                           CODEGENDATA_FLAG_LONGBRANCHES);
288                         }
289
290                         vm_abort("emit_branch: emit long-branch on cc code");
291                 }
292                 else {
293                         /* check whether to branch on 64-bit condition code */
294                         if (BRANCH_CHECKS_XCC(opt)) {
295                                 switch (condition) {
296                                 case BRANCH_EQ:
297                                         M_XBEQ(branchdisp);
298                                         break;
299                                 case BRANCH_NE:
300                                         M_XBNE(branchdisp);
301                                         break;
302                                 case BRANCH_LT:
303                                         M_XBLT(branchdisp);
304                                         break;
305                                 case BRANCH_GE:
306                                         M_XBGE(branchdisp);
307                                         break;
308                                 case BRANCH_GT:
309                                         M_XBGT(branchdisp);
310                                         break;
311                                 case BRANCH_LE:
312                                         M_XBLE(branchdisp);
313                                         break;
314                                 case BRANCH_UGT:
315                                         M_XBUGT(branchdisp);
316                                         break;
317                                 case BRANCH_ULT:
318                                         M_XBULT(branchdisp);
319                                         break;
320                                 default:
321                                         vm_abort("emit_branch: unknown condition %d", condition);
322                                 }
323                                 
324                                 /* branch delay */
325                                 M_NOP;
326                         }
327                         else {
328                                 switch (condition) {
329                                 case BRANCH_EQ:
330                                         M_BEQ(branchdisp);
331                                         break;
332                                 case BRANCH_NE:
333                                         M_BNE(branchdisp);
334                                         break;
335                                 case BRANCH_LT:
336                                         M_BLT(branchdisp);
337                                         break;
338                                 case BRANCH_GE:
339                                         M_BGE(branchdisp);
340                                         break;
341                                 case BRANCH_GT:
342                                         M_BGT(branchdisp);
343                                         break;
344                                 case BRANCH_LE:
345                                         M_BLE(branchdisp);
346                                         break;
347                                 case BRANCH_UGT:
348                                         M_BUGT(branchdisp);
349                                         break;
350                                 case BRANCH_ULT:
351                                         M_BULT(branchdisp);
352                                         break;
353                                 default:
354                                         vm_abort("emit_branch: unknown condition %d", condition);
355                                 }
356
357                                 /* branch delay */
358                                 M_NOP;
359                         }
360                 }
361         }
362         else {
363                 /* branch on register */
364
365                 /* check displacement for overflow (16-bit) */
366
367                 if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
368                         /* if the long-branches flag isn't set yet, do it */
369
370                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
371                                 log_println("setting error");
372                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
373                                                           CODEGENDATA_FLAG_LONGBRANCHES);
374                         }
375
376                         vm_abort("emit_branch: emit long-branch on reg code");
377                 }
378                 else {
379                         switch (condition) {
380                         case BRANCH_EQ:
381                                 M_BEQZ(reg, branchdisp);
382                                 break;
383                         case BRANCH_NE:
384                                 M_BNEZ(reg, branchdisp);
385                                 break;
386                         case BRANCH_LT:
387                                 M_BLTZ(reg, branchdisp);
388                                 break;
389                         case BRANCH_GE:
390                                 M_BGEZ(reg, branchdisp);
391                                 break;
392                         case BRANCH_GT:
393                                 M_BGTZ(reg, branchdisp);
394                                 break;
395                         case BRANCH_LE:
396                                 M_BLEZ(reg, branchdisp);
397                                 break;
398                         default:
399                                 vm_abort("emit_branch: unknown condition %d", condition);
400                         }
401
402                         /* branch delay */
403                         M_NOP;
404                 }
405         }
406 }
407
408
409 /* emit_bxx_xcc*****************************************************************
410
411    Wrappers for branches on 64-bit condition codes (SPARC specific).
412
413 *******************************************************************************/
414
415 void emit_beq_xcc(codegendata *cd, basicblock *target)
416 {
417         emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
418 }
419
420 void emit_bne_xcc(codegendata *cd, basicblock *target)
421 {
422         emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
423 }
424
425 void emit_blt_xcc(codegendata *cd, basicblock *target)
426 {
427         emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
428 }
429
430 void emit_bge_xcc(codegendata *cd, basicblock *target)
431 {
432         emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
433 }
434
435 void emit_bgt_xcc(codegendata *cd, basicblock *target)
436 {
437         emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
438 }
439
440 void emit_ble_xcc(codegendata *cd, basicblock *target)
441 {
442         emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
443 }
444
445
446
447
448
449 /* emit_arithmetic_check *******************************************************
450
451    Emit an ArithmeticException check.
452
453 *******************************************************************************/
454
455 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
456 {
457         if (INSTRUCTION_MUST_CHECK(iptr)) {
458                 M_BNEZ(reg, 3);
459                 M_NOP;
460                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
461         }
462 }
463
464
465 /* emit_arrayindexoutofbounds_check ********************************************
466
467    Emit an ArrayIndexOutOfBoundsException check.
468
469 *******************************************************************************/
470
471 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
472 {
473         if (INSTRUCTION_MUST_CHECK(iptr)) {
474                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
475                 M_CMP(s2, REG_ITMP3);
476                 M_XBULT(3);
477                 M_NOP;
478                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
479         }
480 }
481
482
483 /* emit_arraystore_check *******************************************************
484
485    Emit an ArrayStoreException check.
486
487 *******************************************************************************/
488
489 void emit_arraystore_check(codegendata *cd, instruction *iptr)
490 {
491         if (INSTRUCTION_MUST_CHECK(iptr)) {
492                 M_BNEZ(REG_RESULT_CALLER, 3);
493                 M_NOP;
494                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_ArrayStoreException);
495         }
496 }
497
498
499 /* emit_classcast_check ********************************************************
500
501    Emit a ClassCastException check.
502
503 *******************************************************************************/
504
505 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
506 {
507 /* XXX: use 64-bit or 32-bit compares??? */
508
509         if (INSTRUCTION_MUST_CHECK(iptr)) {
510                 switch (condition) {
511                 case ICMD_IFEQ:
512                         M_BNEZ(reg, 3);
513                         break;
514
515                 case ICMD_IFLE:
516                         M_BGTZ(reg, 3);
517                         break;
518
519                 case BRANCH_ULT:
520                         M_XBUGE(3);
521                         break;
522
523                 default:
524                         vm_abort("emit_classcast_check: unknown condition %d", condition);
525                 }
526
527                 M_NOP;
528                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
529         }
530 }
531
532
533 /* emit_nullpointer_check ******************************************************
534
535    Emit a NullPointerException check.
536
537 *******************************************************************************/
538
539 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
540 {
541         if (INSTRUCTION_MUST_CHECK(iptr)) {
542                 M_BNEZ(reg, 3);
543                 M_NOP;
544                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
545         }
546 }
547
548
549 /* emit_exception_check ********************************************************
550
551    Emit an Exception check.
552
553 *******************************************************************************/
554
555 void emit_exception_check(codegendata *cd, instruction *iptr)
556 {
557         if (INSTRUCTION_MUST_CHECK(iptr)) {
558                 M_BNEZ(REG_RESULT_CALLER, 3);
559                 M_NOP;
560                 M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, TRAP_CHECK_EXCEPTION);
561         }
562 }
563
564
565 /* emit_trap *******************************************************************
566
567    Emit a trap instruction and return the original machine code.
568
569 *******************************************************************************/
570
571 uint32_t emit_trap(codegendata *cd)
572 {
573         uint32_t mcode;
574
575         /* Get machine code which is patched back in later. The
576            trap is 1 instruction word long. */
577
578         mcode = *((uint32_t *) cd->mcodeptr);
579
580         M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_PATCHER);
581
582         return mcode;
583 }
584
585
586 /* emit_patcher_stubs **********************************************************
587
588    Generates the code for the patcher stubs.
589
590 *******************************************************************************/
591
592 void emit_patcher_stubs(jitdata *jd)
593 {
594         codegendata *cd;
595         patchref    *pref;
596         u4           mcode[2];
597         u1          *savedmcodeptr;
598         u1          *tmpmcodeptr;
599         s4           targetdisp;
600         s4           disp;
601
602         /* get required compiler data */
603
604         cd = jd->cd;
605
606         /* generate code patching stub call code */
607
608         targetdisp = 0;
609
610         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
611                 /* check code segment size */
612
613                 MCODECHECK(100);
614
615                 /* Get machine code which is patched back in later. The
616                    call is 2 instruction words long. */
617
618                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
619
620                 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
621                    SPARC causes a SIGSEGV */
622
623                 mcode[0] = ((u4 *) tmpmcodeptr)[0];
624                 mcode[1] = ((u4 *) tmpmcodeptr)[1];
625
626                 /* Patch in the call to call the following code (done at
627                    compile time). */
628
629                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
630                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
631
632                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) );
633
634                 if ((disp < (s4) 0xfffc0000) || (disp > (s4) 0x003ffff)) {
635                         vm_abort("Jump offset is out of range: %d > +/-%d",
636                                          disp, 0x003ffff);
637                         return;
638                 }
639
640                 M_BR(disp);
641                 M_NOP;
642
643                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
644
645                 /* extend stack frame for wrapper data */
646
647                 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
648
649                 /* calculate return address and move it onto the stack */
650
651                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
652                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 5 * 8);
653
654                 /* move pointer to java_objectheader onto stack */
655
656 #if defined(ENABLE_THREADS)
657                 /* create a virtual java_objectheader */
658
659                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
660                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
661                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
662
663                 M_LDA(REG_ITMP3, REG_PV, disp);
664                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 4 * 8);
665 #else
666                 /* do nothing */
667 #endif
668
669                 /* move machine code onto stack */
670
671                 disp = dseg_add_s4(cd, mcode[0]);
672                 M_ILD(REG_ITMP3, REG_PV, disp);
673                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8);
674
675                 disp = dseg_add_s4(cd, mcode[1]);
676                 M_ILD(REG_ITMP3, REG_PV, disp);
677                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 3 * 8 + 4);
678
679                 /* move class/method/field reference onto stack */
680
681                 disp = dseg_add_address(cd, pref->ref);
682                 M_ALD(REG_ITMP3, REG_PV, disp);
683                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 2 * 8);
684
685         /* move data segment displacement onto stack */
686
687                 disp = dseg_add_s4(cd, pref->disp);
688                 M_ILD(REG_ITMP3, REG_PV, disp);
689                 M_IST(REG_ITMP3, REG_SP, JITSTACK + 1 * 8);
690
691                 /* move patcher function pointer onto stack */
692
693                 disp = dseg_add_functionptr(cd, pref->patcher);
694                 M_ALD(REG_ITMP3, REG_PV, disp);
695                 M_AST(REG_ITMP3, REG_SP, JITSTACK + 0 * 8);
696
697                 if (targetdisp == 0) {
698                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
699
700                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
701                         M_ALD(REG_ITMP3, REG_PV, disp);
702                         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);
703                         M_NOP;
704                 }
705                 else {
706                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
707                                 (((u4 *) cd->mcodeptr));
708
709                         M_BR(disp);
710                         M_NOP;
711                 }
712         }
713 }
714
715
716 /* emit_verbosecall_enter ******************************************************
717
718    Generates the code for the call trace.
719
720 *******************************************************************************/
721
722 #if !defined(NDEBUG)
723 void emit_verbosecall_enter(jitdata *jd)
724 {
725         methodinfo   *m;
726         codegendata  *cd;
727         registerdata *rd;
728         methoddesc   *md;
729         s4            disp;
730         s4            i, t;
731         s4            stackslots;
732
733         /* get required compiler data */
734
735         m  = jd->m;
736         cd = jd->cd;
737         rd = jd->rd;
738
739         md = m->parseddesc;
740
741         /* mark trace code */
742
743         M_NOP;
744
745         /* XXX jit-c-call */
746         stackslots = 1 + FLT_ARG_CNT;
747         ALIGN_STACK_SLOTS(stackslots);
748
749         M_LDA(REG_SP, REG_SP, -(stackslots * 8));
750
751         /* save float argument registers */
752
753         for (i = 0; i < FLT_ARG_CNT; i++)
754                 M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
755
756         /* save temporary registers for leaf methods */
757 /* XXX no leaf optimization yet
758         if (code_is_leafmethod(code)) {
759                 for (i = 0; i < INT_TMP_CNT; i++)
760                         M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
761
762                 for (i = 0; i < FLT_TMP_CNT; i++)
763                         M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
764         }
765 */
766         /* load int/float arguments into integer argument registers */
767
768         for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
769                 t = md->paramtypes[i].type;
770
771                 /* all available argument registers used, which adds a little complexity */
772                 
773                 if (IS_INT_LNG_TYPE(t)) {
774                         if (i < INT_ARG_CNT) {
775                                 M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]), 
776                                         abi_registers_integer_argument[i]);
777                         }
778                         else {
779                                 assert(i == 5);
780                                 M_LDX(REG_OUT5, REG_FP, JITSTACK);
781                         }
782                 }
783                 else {
784                         if (i < FLT_ARG_CNT) {
785                                 
786                                 /* reg -> mem -> reg */
787                                 
788                                 if (IS_2_WORD_TYPE(t)) {
789                                         M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
790                                         M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
791                                 }
792                                 else {
793                                         M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
794                                         M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
795                                 }
796                         }
797                         else {
798                                 
799                                 /* mem -> reg */
800                                 
801                                 assert(i == 5);
802                                 if (IS_2_WORD_TYPE(t)) {
803                                         M_LDX(REG_OUT5, REG_FP, JITSTACK);
804                                 }
805                                 else {
806                                         M_ILD(REG_OUT5, REG_FP, JITSTACK);
807                                 }
808                         }
809                 }
810         }
811         
812         
813         /* method info pointer is passed via stack */
814         disp = dseg_add_address(cd, m);
815         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
816         M_AST(REG_ITMP1, REG_SP, CSTACK);
817         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
818         M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
819         M_JMP(REG_RA_CALLER, REG_ITMP1, REG_ZERO);
820         M_NOP;
821
822         /* restore float argument registers */
823
824         for (i = 0; i < FLT_ARG_CNT; i++)
825                 M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
826
827         /* restore temporary registers for leaf methods */
828 /* XXX no leaf optimization yet
829         if (code_is_leafmethod(code)) {
830                 for (i = 0; i < INT_TMP_CNT; i++)
831                         M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
832
833                 for (i = 0; i < FLT_TMP_CNT; i++)
834                         M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
835         }
836 */
837         M_LDA(REG_SP, REG_SP, stackslots * 8);
838
839         /* mark trace code */
840
841         M_NOP;
842 }
843 #endif /* !defined(NDEBUG) */
844
845
846 /* emit_verbosecall_exit *******************************************************
847
848    Generates the code for the call trace.
849
850 *******************************************************************************/
851
852 #if !defined(NDEBUG)
853 void emit_verbosecall_exit(jitdata *jd)
854 {
855         methodinfo   *m;
856         codegendata  *cd;
857         registerdata *rd;
858         s4            disp;
859
860         /* get required compiler data */
861
862         m  = jd->m;
863         cd = jd->cd;
864         rd = jd->rd;
865
866         /* mark trace code */
867
868         M_NOP;
869         
870         /* XXX jit-c-call (keep stack aligned)*/
871         M_LDA(REG_SP, REG_SP, -(2 * 8));
872
873         M_DST(REG_FRESULT, REG_SP, JITSTACK);
874
875         M_MOV(REG_RESULT_CALLEE, REG_OUT0);
876         M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
877         M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
878
879         disp = dseg_add_functionptr(cd, m);
880         M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
881
882         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
883         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
884         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
885         M_NOP;
886
887         M_DLD(REG_FRESULT, REG_SP, JITSTACK);
888
889         M_LDA(REG_SP, REG_SP, 2 * 8);
890
891         /* mark trace code */
892
893         M_NOP;
894 }
895 #endif /* !defined(NDEBUG) */
896
897
898 /*
899  * These are local overrides for various environment variables in Emacs.
900  * Please do not remove this and leave it at the end of the file, where
901  * Emacs will automagically detect them.
902  * ---------------------------------------------------------------------
903  * Local variables:
904  * mode: c
905  * indent-tabs-mode: t
906  * c-basic-offset: 4
907  * tab-width: 4
908  * End:
909  * vim:noexpandtab:sw=4:ts=4:
910  */