src/vm/jit/sparc64/codegen.c

   1 /* src/vm/jit/sparc64/codegen.c - machine code generator for Sparc
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: codegen.c 4644 2006-03-16 18:44:46Z edwin $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <stdio.h>
  33 #include <assert.h>
  34
  35
  36 #include "vm/types.h"
  37
  38 #include "md-abi.h"
  39
  40 /* #include "vm/jit/sparc64/arch.h" */
  41 #include "vm/jit/sparc64/codegen.h"
  42
  43 #include "mm/memory.h"
  44
  45 #include "native/jni.h"
  46 #include "native/native.h"
  47 #include "vm/builtin.h"
  48 #include "vm/exceptions.h"
  49 #include "vm/global.h"
  50
  51 #include "vm/jit/asmpart.h"
  52 #include "vm/jit/codegen-common.h"
  53 #include "vm/jit/dseg.h"
  54 #include "vm/jit/emit-common.h"
  55 #include "vm/jit/jit.h"
  56 #include "vm/jit/parse.h"
  57 #include "vm/jit/patcher.h"
  58 #include "vm/jit/reg.h"
  59 #include "vm/jit/replace.h"
  60 #include "vm/jit/stacktrace.h"
  61 #include "vmcore/loader.h"
  62 #include "vmcore/options.h"
  63
  64 /* XXX use something like this for window control ?
  65  * #define REG_PV (own_window?REG_PV_CALLEE:REG_PV_CALLER)
  66  */
  67 #define REG_PV REG_PV_CALLEE
  68
  69 bool fits_13(s4 disp)
  70 {
  71         /*  printf("fits disp %d?\n", disp); */
  72
  73         return (disp >= -4096) && (disp <= 4095);
  74 }
  75
  76 /* codegen *********************************************************************
  77
  78    Generates machine code.
  79
  80 *******************************************************************************/
  81
  82 bool codegen(jitdata *jd)
  83 {
  84         methodinfo         *m;
  85         codeinfo           *code;
  86         codegendata        *cd;
  87         registerdata       *rd;
  88         s4                  len, s1, s2, s3, d, disp;
  89         varinfo            *var;
  90         basicblock         *bptr;
  91         instruction        *iptr;
  92         exception_entry    *ex;
  93         u2                  currentline;
  94         constant_classref  *cr;
  95         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  96         unresolved_method  *um;
  97         builtintable_entry *bte;
  98         methoddesc         *md;
  99         fieldinfo          *fi;
 100         unresolved_field   *uf;
 101         s4                  fieldtype;
 102         s4                  varindex;
 103
 104         /* get required compiler data */
 105
 106         m  = jd->m;
 107         code = jd->code;
 108         cd = jd->cd;
 109         rd = jd->rd;
 110
 111         /* prevent compiler warnings */
 112
 113         d = 0;
 114         currentline = 0;
 115         lm = NULL;
 116         bte = NULL;
 117
 118         {
 119         s4 i, p, t, l;
 120         s4 savedregs_num, localbase;
 121
 122 #if 0 /* no leaf optimization yet */
 123         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the RA */
 124 #endif
 125         savedregs_num = WINSAVE_CNT + ABIPARAMS_CNT; /* register-window save area */
 126
 127
 128         /* space to save used callee saved registers */
 129
 130         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 131         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 132
 133         cd->stackframesize = rd->memuse + savedregs_num;
 134
 135 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
 136         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 137                 cd->stackframesize++;
 138 #endif
 139
 140         /* keep stack 16-byte aligned (ABI requirement) */
 141
 142         if (cd->stackframesize & 1)
 143                 cd->stackframesize++;
 144
 145         /* create method header */
 146
 147         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
 148         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
 149
 150 #if defined(ENABLE_THREADS)
 151         /* IsSync contains the offset relative to the stack pointer for the
 152            argument of monitor_exit used in the exception handler. Since the
 153            offset could be zero and give a wrong meaning of the flag it is
 154            offset by one.
 155         */
 156
 157         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 158                 (void) dseg_add_unique_s4(cd, (rd->memuse + 1) * 8); /* IsSync        */
 159         else
 160 #endif
 161                 (void) dseg_add_unique_s4(cd, 0);                  /* IsSync          */
 162
 163         (void) dseg_add_unique_s4(cd, jd->isleafmethod);       /* IsLeaf          */
 164         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
 165         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
 166         dseg_addlinenumbertablesize(cd);
 167         (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize   */
 168
 169         /* create exception table */
 170
 171         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
 172                 dseg_add_target(cd, ex->start);
 173                 dseg_add_target(cd, ex->end);
 174                 dseg_add_target(cd, ex->handler);
 175                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
 176         }
 177
 178         /* save register window and create stack frame (if necessary) */
 179
 180         if (cd->stackframesize)
 181                 M_SAVE(REG_SP, -cd->stackframesize * 8, REG_SP);
 182
 183
 184         /* save callee saved float registers (none right now) */
 185 #if 0
 186         p = cd->stackframesize;
 187         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 188                 p--; M_DST(rd->savfltregs[i], REG_SP, USESTACK + (p * 8));
 189         }
 190 #endif
 191
 192 #if !defined(NDEBUG)
 193         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 194                 emit_verbosecall_enter(jd);
 195 #endif
 196
 197
 198
 199         /* take arguments out of register or stack frame */
 200
 201         md = m->parseddesc;
 202
 203         /* when storing locals, use this as base */
 204         localbase = JITSTACK;
 205
 206         /* since the register allocator does not know about the shifting window
 207          * arg regs need to be copied via the stack
 208          */
 209         if (md->argintreguse > 0) {
 210                 /* allocate scratch space for copying in to save(i&l) regs */
 211                 M_SUB_IMM(REG_SP, INT_ARG_CNT * 8, REG_SP);
 212
 213                 localbase += INT_ARG_CNT * 8;
 214
 215                 /* XXX could use the param slots on the stack for this! */
 216                 for (p = 0; p < INT_ARG_CNT; p++)
 217                         M_STX(REG_WINDOW_TRANSPOSE(rd->argintregs[p]), REG_SP, JITSTACK + (p * 8));
 218         }
 219
 220
 221         for (p = 0, l = 0; p < md->paramcount; p++) {
 222                 t = md->paramtypes[p].type;
 223
 224                 varindex = jd->local_map[l * 5 + t];
 225
 226                 l++;
 227                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 228                         l++;
 229
 230                 if (varindex == UNUSED)
 231                         continue;
 232
 233                 var = VAR(varindex);
 234
 235                 s1 = md->params[p].regoff;
 236                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 237                         if (!md->params[p].inmemory) {           /* register arguments    */
 238                                 /*s2 = rd->argintregs[s1];*/
 239                                 /*s2 = REG_WINDOW_TRANSPOSE(s2);*/
 240                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 241                                         /*M_INTMOVE(s2, var->vv.regoff);*/
 242                                         M_LDX(var->vv.regoff, REG_SP, JITSTACK + (s1 * 8));
 243
 244                                 } else {                             /* reg arg -> spilled    */
 245                                         /*M_STX(s2, REG_SP, (WINSAVE_CNT + var->vv.regoff) * 8);*/
 246
 247                                         M_LDX(REG_ITMP1, REG_SP, JITSTACK + (s1 * 8));
 248                                         M_STX(REG_ITMP1, REG_SP, localbase + (var->vv.regoff * 8));
 249                                 }
 250
 251                         } else {                                 /* stack arguments       */
 252                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 253                                         M_LDX(var->vv.regoff, REG_FP, JITSTACK + (s1 * 8));
 254
 255                                 } else {                             /* stack arg -> spilled  */
 256                                         /* add the callers window save registers */
 257                                         var->vv.regoff = cd->stackframesize + JITSTACK_CNT + s1;
 258                                 }
 259                         }
 260
 261                 } else {                                     /* floating args         */
 262                         if (!md->params[p].inmemory) {           /* register arguments    */
 263                                 s2 = rd->argfltregs[s1];
 264                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 265                                         M_FLTMOVE(s2, var->vv.regoff);
 266
 267                                 } else {                                         /* reg arg -> spilled    */
 268                                         M_DST(s2, REG_SP, localbase + (var->vv.regoff) * 8);
 269                                 }
 270
 271                         } else {                                 /* stack arguments       */
 272                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 273                                         M_DLD(var->vv.regoff, REG_FP, JITSTACK + (s1 * 8));
 274
 275                                 } else {                             /* stack-arg -> spilled  */
 276                                         var->vv.regoff = cd->stackframesize + JITSTACK_CNT + s1;
 277                                 }
 278                         }
 279                 }
 280         } /* end for */
 281
 282         if (md->argintreguse > 0) {
 283                 /* release scratch space */
 284                 M_ADD_IMM(REG_SP, INT_ARG_CNT * 8, REG_SP);
 285         }
 286
 287
 288         /* XXX monitor enter */
 289
 290
 291
 292
 293         }
 294
 295         /* end of header generation */
 296
 297         /* create replacement points */
 298
 299         REPLACEMENT_POINTS_INIT(cd, jd);
 300
 301         /* walk through all basic blocks */
 302
 303         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 304
 305                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 306
 307                 if (bptr->flags >= BBREACHED) {
 308
 309                 /* branch resolving */
 310
 311                 codegen_resolve_branchrefs(cd, bptr);
 312
 313                 /* handle replacement points */
 314
 315 #if 0
 316                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 317                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 318
 319                         replacementpoint++;
 320                 }
 321 #endif
 322
 323                 /* copy interface registers to their destination */
 324
 325                 len = bptr->indepth;
 326                 MCODECHECK(64+len);
 327
 328 #if defined(ENABLE_LSRA)
 329 #error XXX LSRA not tested yet
 330                 if (opt_lsra) {
 331                 while (len) {
 332                         len--;
 333                         src = bptr->invars[len];
 334                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 335                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 336                                         if (!(src->flags & INMEMORY))
 337                                                 d = src->vv.regoff;
 338                                         else
 339                                                 d = REG_ITMP1;
 340                                         M_INTMOVE(REG_ITMP1, d);
 341                                         emit_store(jd, NULL, src, d);
 342                                 }
 343                         }
 344                 } else {
 345 #endif
 346                 while (len) {
 347                         len--;
 348                         var = VAR(bptr->invars[len]);
 349                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 350                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
 351                                 M_INTMOVE(REG_ITMP2_XPTR, d);
 352                                 emit_store(jd, NULL, var, d);
 353                         }
 354                         else {
 355                                 assert((var->flags & INOUT));
 356                         }
 357                 }
 358 #if defined(ENABLE_LSRA)
 359                 }
 360 #endif
 361                 /* walk through all instructions */
 362
 363                 len = bptr->icount;
 364
 365                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
 366                         if (iptr->line != currentline) {
 367                                 dseg_addlinenumber(cd, iptr->line);
 368                                 currentline = iptr->line;
 369                         }
 370
 371                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 372
 373                 switch (iptr->opc) {
 374
 375                 case ICMD_INLINE_START:
 376                 case ICMD_INLINE_END:
 377                         break;
 378
 379                 case ICMD_NOP:        /* ...  ==> ...                                 */
 380                         break;
 381
 382                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 383
 384                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 385                         emit_nullpointer_check(cd, iptr, s1);
 386                         break;
 387
 388                 /* constant operations ************************************************/
 389
 390                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 391
 392                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 393                         ICONST(d, iptr->sx.val.i);
 394                         emit_store_dst(jd, iptr, d);
 395                         break;
 396
 397                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 398
 399                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 400                         LCONST(d, iptr->sx.val.l);
 401                         emit_store_dst(jd, iptr, d);
 402                         break;
 403
 404                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 405
 406                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 407                         disp = dseg_add_float(cd, iptr->sx.val.f);
 408                         M_FLD(d, REG_PV, disp);
 409                         emit_store_dst(jd, iptr, d);
 410                         break;
 411
 412                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 413
 414                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 415                         disp = dseg_add_double(cd, iptr->sx.val.d);
 416                         M_DLD(d, REG_PV, disp);
 417                         emit_store_dst(jd, iptr, d);
 418                         break;
 419
 420                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 421
 422                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 423
 424                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 425                                 cr   = iptr->sx.val.c.ref;
 426                                 disp = dseg_add_unique_address(cd, cr);
 427
 428                                 codegen_add_patch_ref(cd, PATCHER_aconst, cr, disp);
 429
 430                                 M_ALD(d, REG_PV, disp);
 431
 432                         }
 433                         else {
 434                                 if (iptr->sx.val.anyptr == NULL) {
 435                                         M_INTMOVE(REG_ZERO, d);
 436                                 }
 437                                 else {
 438                                         disp = dseg_add_address(cd, iptr->sx.val.anyptr);
 439                                         M_ALD(d, REG_PV, disp);
 440                                 }
 441                         }
 442                         emit_store_dst(jd, iptr, d);
 443                         break;
 444
 445
 446                 /* load/store/copy/move operations ************************************/
 447
 448                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 449                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 450                 case ICMD_ALOAD:      /* ...  ==> ..., content of local variable      */
 451                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 452                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 453                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 454                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 455                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 456                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
 457                 case ICMD_COPY:
 458                 case ICMD_MOVE:
 459
 460                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 461                         break;
 462
 463                 case ICMD_ASTORE:
 464                         if (!(iptr->flags.bits & INS_FLAG_RETADDR))
 465                                 emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 466                         break;
 467
 468
 469                 /* pop/dup/swap operations ********************************************/
 470
 471                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 472
 473                 case ICMD_POP:        /* ..., value  ==> ...                          */
 474                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 475                         break;
 476
 477
 478                 /* integer operations *************************************************/
 479
 480                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 481                 case ICMD_LNEG:
 482
 483                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 484                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 485                         M_SUB(REG_ZERO, s1, d);
 486                         emit_store_dst(jd, iptr, d);
 487                         break;
 488
 489                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 490
 491                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 492                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 493                         M_INTMOVE(s1, d);
 494                         emit_store_dst(jd, iptr, d);
 495                         break;
 496
 497                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 498
 499                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 500                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 501                         M_SRA_IMM(s1, 0, d); /* sign extend upper 32 bits */
 502                         emit_store_dst(jd, iptr, d);
 503                         break;
 504
 505                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 506
 507                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 508                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 509                         M_SLLX_IMM(s1, 56, d);
 510                         M_SRAX_IMM( d, 56, d);
 511                         emit_store_dst(jd, iptr, d);
 512                         break;
 513
 514                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 515
 516                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 517                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 518                         M_SLLX_IMM(s1, 48, d);
 519                         M_SRLX_IMM( d, 48, d);
 520                         emit_store_dst(jd, iptr, d);
 521                         break;
 522
 523                 case ICMD_INT2SHORT:   /* ..., value  ==> ..., value                   */
 524
 525                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 526                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 527                         M_SLLX_IMM(s1, 48, d);
 528                         M_SRAX_IMM( d, 48, d);
 529                         emit_store_dst(jd, iptr, d);
 530                         break;
 531
 532                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 533                 case ICMD_LADD:
 534
 535                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 536                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 537                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 538                         M_ADD(s1, s2, d);
 539                         emit_store_dst(jd, iptr, d);
 540                         break;
 541
 542                 case ICMD_IINC:
 543                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 544                                       /* sx.val.i = constant                             */
 545
 546                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 547                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 548                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 549                                 M_ADD_IMM(s1, iptr->sx.val.i, d);
 550                         } else {
 551                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 552                                 M_ADD(s1, REG_ITMP2, d);
 553                         }
 554                         emit_store_dst(jd, iptr, d);
 555                         break;
 556
 557                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 558                                       /* sx.val.l = constant                             */
 559
 560                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 561                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 562                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 563                                 M_ADD_IMM(s1, iptr->sx.val.l, d);
 564                         } else {
 565                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 566                                 M_ADD(s1, REG_ITMP2, d);
 567                         }
 568                         emit_store_dst(jd, iptr, d);
 569                         break;
 570
 571                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 572                 case ICMD_LSUB:
 573
 574                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 575                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 576                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 577                         M_SUB(s1, s2, d);
 578                         emit_store_dst(jd, iptr, d);
 579                         break;
 580
 581                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 582                                       /* sx.val.i = constant                             */
 583
 584                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 585                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 586                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 587                                 M_SUB_IMM(s1, iptr->sx.val.i, d);
 588                         } else {
 589                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 590                                 M_SUB(s1, REG_ITMP2, d);
 591                         }
 592                         emit_store_dst(jd, iptr, d);
 593                         break;
 594
 595                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 596                                       /* sx.val.l = constant                             */
 597
 598                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 599                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 600                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 601                                 M_SUB_IMM(s1, iptr->sx.val.l, d);
 602                         } else {
 603                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 604                                 M_SUB(s1, REG_ITMP2, d);
 605                         }
 606                         emit_store_dst(jd, iptr, d);
 607                         break;
 608
 609                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 610                 case ICMD_LMUL:
 611
 612                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 613                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 614                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 615                         M_MULX(s1, s2, d);
 616                         emit_store_dst(jd, iptr, d);
 617                         break;
 618
 619                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 620                                       /* sx.val.i = constant                             */
 621
 622                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 623                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 624                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 625                                 M_MULX_IMM(s1, iptr->sx.val.i, d);
 626                         } else {
 627                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 628                                 M_MULX(s1, REG_ITMP2, d);
 629                         }
 630                         emit_store_dst(jd, iptr, d);
 631                         break;
 632
 633                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 634                                       /* sx.val.l = constant                             */
 635
 636                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 637                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 638                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 639                                 M_MULX_IMM(s1, iptr->sx.val.l, d);
 640                         } else {
 641                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 642                                 M_MULX(s1, REG_ITMP2, d);
 643                         }
 644                         emit_store_dst(jd, iptr, d);
 645                         break;
 646
 647                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 648 /* XXX could also clear Y and use 32bit div */
 649                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 650                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 651                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 652                         emit_arithmetic_check(cd, iptr, s2);
 653                         M_ISEXT(s1, s1);
 654                         /* XXX trim s2 like s1 ? */
 655                         M_DIVX(s1, s2, d);
 656                         emit_store_dst(jd, iptr, d);
 657                         break;
 658
 659                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 660
 661                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 662                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 663                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 664                         emit_arithmetic_check(cd, iptr, s2);
 665                         M_DIVX(s1, s2, d);
 666                         emit_store_dst(jd, iptr, d);
 667                         break;
 668
 669                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 670
 671                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 672                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 673                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 674                         emit_arithmetic_check(cd, iptr, s2);
 675                         M_ISEXT(s1, s1);
 676                         /* XXX trim s2 like s1 ? */
 677                         M_DIVX(s1, s2, d);
 678                         M_MULX(s2, d, d);
 679                         M_SUB(s1, d, d);
 680                         emit_store_dst(jd, iptr, d);
 681                         break;
 682
 683                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 684
 685                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 686                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 687                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 688                         emit_arithmetic_check(cd, iptr, s2);
 689                         M_DIVX(s1, s2, d);
 690                         M_MULX(s2, d, d);
 691                         M_SUB(s1, d, d);
 692                         emit_store_dst(jd, iptr, d);
 693                         break;
 694
 695                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 696                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 697
 698                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 699                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 700                         M_SRAX_IMM(s1, 63, REG_ITMP2);
 701                         M_SRLX_IMM(REG_ITMP2, 64 - iptr->sx.val.i, REG_ITMP2);
 702                         M_ADD(s1, REG_ITMP2, REG_ITMP2);
 703                         M_SRAX_IMM(REG_ITMP2, iptr->sx.val.i, d);
 704                         emit_store_dst(jd, iptr, d);
 705                         break;
 706
 707                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 708                 case ICMD_LSHL:
 709
 710                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 711                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 712                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 713                         M_SLLX(s1, s2, d);
 714                         emit_store_dst(jd, iptr, d);
 715                         break;
 716
 717                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 718                 case ICMD_LSHLCONST:  /* val.i = constant                             */
 719
 720                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 721                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 722                         M_SLLX_IMM(s1, iptr->sx.val.i, d);
 723                         emit_store_dst(jd, iptr, d);
 724                         break;
 725
 726                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 727
 728                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 729                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 730                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 731                         M_SRA(s1, s2, d);
 732                         emit_store_dst(jd, iptr, d);
 733                         break;
 734
 735                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 736                                       /* sx.val.i = constant                             */
 737
 738                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 739                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 740                         M_SRA_IMM(s1, iptr->sx.val.i, d);
 741                         emit_store_dst(jd, iptr, d);
 742                         break;
 743
 744                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 745
 746                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 747                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 748                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 749                         M_SRL(s1, s2, d);
 750                         emit_store_dst(jd, iptr, d);
 751                         break;
 752
 753                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 754                                       /* sx.val.i = constant                             */
 755
 756                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 757                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 758                         M_SRL_IMM(s1, iptr->sx.val.i, d);
 759                         emit_store_dst(jd, iptr, d);
 760                         break;
 761
 762                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 763
 764                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 765                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 766                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 767                         M_SRAX(s1, s2, d);
 768                         emit_store_dst(jd, iptr, d);
 769                         break;
 770
 771                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
 772                                       /* sx.val.i = constant                             */
 773
 774                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 775                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 776                         M_SRAX_IMM(s1, iptr->sx.val.i, d);
 777                         emit_store_dst(jd, iptr, d);
 778                         break;
 779
 780                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 781
 782                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 783                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 784                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 785                         M_SRLX(s1, s2, d);
 786                         emit_store_dst(jd, iptr, d);
 787                         break;
 788
 789                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 790                                       /* sx.val.i = constant                             */
 791
 792                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 793                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 794                         M_SRLX_IMM(s1, iptr->sx.val.i, d);
 795                         emit_store_dst(jd, iptr, d);
 796                         break;
 797
 798                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 799                 case ICMD_LAND:
 800
 801                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 802                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 803                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 804                         M_AND(s1, s2, d);
 805                         emit_store_dst(jd, iptr, d);
 806                         break;
 807
 808                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
 809                                       /* sx.val.i = constant                             */
 810
 811                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 812                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 813                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 814                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 815                         } else {
 816                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 817                                 M_AND(s1, REG_ITMP2, d);
 818                         }
 819                         emit_store_dst(jd, iptr, d);
 820                         break;
 821
 822                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
 823                                       /* sx.val.i = constant                             */
 824
 825                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 826                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 827                         M_ISEXT(s1, s1); /* trim for 32-bit compare (BGEZ) */
 828                         if (s1 == d) {
 829                                 M_MOV(s1, REG_ITMP1);
 830                                 s1 = REG_ITMP1;
 831                         }
 832                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 0xffff)) {
 833                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 834                                 M_BGEZ(s1, 4);
 835                                 M_NOP;
 836                                 M_SUB(REG_ZERO, s1, d);
 837                                 M_AND_IMM(d, iptr->sx.val.i, d);
 838                         } else {
 839                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 840                                 M_AND(s1, REG_ITMP2, d);
 841                                 M_BGEZ(s1, 4);
 842                                 M_NOP;
 843                                 M_SUB(REG_ZERO, s1, d);
 844                                 M_AND(d, REG_ITMP2, d);
 845                         }
 846                         M_SUB(REG_ZERO, d, d);
 847                         emit_store_dst(jd, iptr, d);
 848                         break;
 849
 850                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
 851                                       /* sx.val.l = constant                             */
 852
 853                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 854                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 855                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 856                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 857                         } else {
 858                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 859                                 M_AND(s1, REG_ITMP2, d);
 860                         }
 861                         emit_store_dst(jd, iptr, d);
 862                         break;
 863
 864                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
 865                                       /* sx.val.l = constant                             */
 866
 867                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 868                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 869                         if (s1 == d) {
 870                                 M_MOV(s1, REG_ITMP1);
 871                                 s1 = REG_ITMP1;
 872                         }
 873                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 874                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 875                                 M_BGEZ(s1, 4);
 876                                 M_NOP;
 877                                 M_SUB(REG_ZERO, s1, d);
 878                                 M_AND_IMM(d, iptr->sx.val.l, d);
 879                         } else {
 880                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 881                                 M_AND(s1, REG_ITMP2, d);
 882                                 M_BGEZ(s1, 4);
 883                                 M_NOP;
 884                                 M_SUB(REG_ZERO, s1, d);
 885                                 M_AND(d, REG_ITMP2, d);
 886                         }
 887                         M_SUB(REG_ZERO, d, d);
 888                         emit_store_dst(jd, iptr, d);
 889                         break;
 890
 891                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
 892                 case ICMD_LOR:
 893
 894                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 895                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 896                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 897                         M_OR(s1,s2, d);
 898                         emit_store_dst(jd, iptr, d);
 899                         break;
 900
 901                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
 902                                       /* sx.val.i = constant                             */
 903
 904                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 905                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 906                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 907                                 M_OR_IMM(s1, iptr->sx.val.i, d);
 908                         } else {
 909                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 910                                 M_OR(s1, REG_ITMP2, d);
 911                         }
 912                         emit_store_dst(jd, iptr, d);
 913                         break;
 914
 915                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
 916                                       /* sx.val.l = constant                             */
 917
 918                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 919                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 920                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 921                                 M_OR_IMM(s1, iptr->sx.val.l, d);
 922                         } else {
 923                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 924                                 M_OR(s1, REG_ITMP2, d);
 925                         }
 926                         emit_store_dst(jd, iptr, d);
 927                         break;
 928
 929                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
 930                 case ICMD_LXOR:
 931
 932                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 933                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 934                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 935                         M_XOR(s1, s2, d);
 936                         emit_store_dst(jd, iptr, d);
 937                         break;
 938
 939                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 940                                       /* sx.val.i = constant                             */
 941
 942                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 943                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 944                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 945                                 M_XOR_IMM(s1, iptr->sx.val.i, d);
 946                         } else {
 947                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 948                                 M_XOR(s1, REG_ITMP2, d);
 949                         }
 950                         emit_store_dst(jd, iptr, d);
 951                         break;
 952
 953                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 954                                       /* sx.val.l = constant                             */
 955
 956                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 957                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 958                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 959                                 M_XOR_IMM(s1, iptr->sx.val.l, d);
 960                         } else {
 961                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 962                                 M_XOR(s1, REG_ITMP2, d);
 963                         }
 964                         emit_store_dst(jd, iptr, d);
 965                         break;
 966
 967
 968                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
 969
 970                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 971                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 972                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 973                         M_CMP(s1, s2);
 974                         M_MOV(REG_ZERO, d);
 975                         M_XCMOVLT_IMM(-1, d);
 976                         M_XCMOVGT_IMM(1, d);
 977                         emit_store_dst(jd, iptr, d);
 978                         break;
 979
 980
 981                 /* floating operations ************************************************/
 982
 983                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
 984
 985                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 986                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
 987                         M_FNEG(s1, d);
 988                         emit_store_dst(jd, iptr, d);
 989                         break;
 990
 991                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
 992
 993                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 994                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
 995                         M_DNEG(s1, d);
 996                         emit_store_dst(jd, iptr, d);
 997                         break;
 998
 999                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1000
1001                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1002                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1003                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1004                         M_FADD(s1, s2, d);
1005                         emit_store_dst(jd, iptr, d);
1006                         break;
1007
1008                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1009
1010                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1011                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1012                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1013                         M_DADD(s1, s2, d);
1014                         emit_store_dst(jd, iptr, d);
1015                         break;
1016
1017                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1018
1019                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1020                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1021                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1022                         M_FSUB(s1, s2, d);
1023                         emit_store_dst(jd, iptr, d);
1024                         break;
1025
1026                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1027
1028                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1029                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1030                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1031                         M_DSUB(s1, s2, d);
1032                         emit_store_dst(jd, iptr, d);
1033                         break;
1034
1035                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1036
1037                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1038                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1039                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1040                         M_FMUL(s1, s2, d);
1041                         emit_store_dst(jd, iptr, d);
1042                         break;
1043
1044                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1045
1046                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1047                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1048                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1049                         M_DMUL(s1, s2, d);
1050                         emit_store_dst(jd, iptr, d);
1051                         break;
1052
1053                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1054
1055                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1056                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1057                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1058                         M_FDIV(s1, s2, d);
1059                         emit_store_dst(jd, iptr, d);
1060                         break;
1061
1062                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1063
1064                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1065                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1066                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1067                         M_DDIV(s1, s2, d);
1068                         emit_store_dst(jd, iptr, d);
1069                         break;
1070
1071                 case ICMD_I2F:
1072                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1073                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1074                         disp = dseg_add_float(cd, 0.0);
1075                         M_IST (s1, REG_PV_CALLEE, disp);
1076                         M_FLD (d, REG_PV_CALLEE, disp);
1077                         M_CVTIF (d, d); /* rd gets translated to double target register */
1078                         emit_store_dst(jd, iptr, d);
1079                         break;
1080
1081                 case ICMD_I2D:
1082                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1083                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1084                         disp = dseg_add_float(cd, 0.0);
1085                         M_IST (s1, REG_PV_CALLEE, disp);
1086                         M_FLD (REG_FTMP2, REG_PV_CALLEE, disp); /* REG_FTMP2 needs to be a double temp */
1087                         M_CVTID (REG_FTMP2, d); /* rd gets translated to double target register */
1088                         emit_store_dst(jd, iptr, d);
1089                         break;
1090
1091                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1092                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1093                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1094                         disp = dseg_add_float(cd, 0.0);
1095                         M_CVTFI(s1, REG_FTMP2);
1096                         M_FST(REG_FTMP2, REG_PV_CALLEE, disp);
1097                         M_ILD(d, REG_PV, disp);
1098                         emit_store_dst(jd, iptr, d);
1099                         break;
1100
1101
1102                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value             */
1103                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1104                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1105                         disp = dseg_add_float(cd, 0.0);
1106                         M_CVTDI(s1, REG_FTMP2);
1107                         M_FST(REG_FTMP2, REG_PV, disp);
1108                         M_ILD(d, REG_PV, disp);
1109                         emit_store_dst(jd, iptr, d);
1110                         break;
1111
1112                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1113                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1114                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1115                         disp = dseg_add_double(cd, 0.0);
1116                         M_CVTFL(s1, REG_FTMP2); /* FTMP2 needs to be double reg */
1117                         M_DST(REG_FTMP2, REG_PV, disp);
1118                         M_LDX(d, REG_PV, disp);
1119                         emit_store_dst(jd, iptr, d);
1120                         break;
1121
1122                 case ICMD_D2L:       /* ..., value  ==> ..., (long) value             */
1123                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1124                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1125                         disp = dseg_add_double(cd, 0.0);
1126                         M_CVTDL(s1, REG_FTMP2); /* FTMP2 needs to be double reg */
1127                         M_DST(REG_FTMP2, REG_PV, disp);
1128                         M_LDX(d, REG_PV, disp);
1129                         emit_store_dst(jd, iptr, d);
1130                         break;
1131
1132                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1133
1134                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1135                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1136                         M_CVTFD(s1, d);
1137                         emit_store_dst(jd, iptr, d);
1138                         break;
1139
1140                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1141
1142                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1143                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1144                         M_CVTDF(s1, d);
1145                         emit_store_dst(jd, iptr, d);
1146                         break;
1147
1148         /* XXX merge F/D versions? only compare instr. is different */
1149                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1150
1151                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1152                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1153                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1154                         M_FCMP(s1,s2);
1155                         M_OR_IMM(REG_ZERO, -1, d); /* less by default (less or unordered) */
1156                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1157                         M_CMOVFGT_IMM(1, d); /* 1 if greater */
1158                         emit_store_dst(jd, iptr, d);
1159                         break;
1160
1161                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1162
1163                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1164                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1165                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1166                         M_DCMP(s1,s2);
1167                         M_OR_IMM(REG_ZERO, -1, d); /* less by default (less or unordered) */
1168                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1169                         M_CMOVFGT_IMM(1, d); /* 1 if greater */
1170                         emit_store_dst(jd, iptr, d);
1171                         break;
1172
1173                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1174
1175                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1176                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1177                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1178                         M_FCMP(s1,s2);
1179                         M_OR_IMM(REG_ZERO, 1, d); /* greater by default (greater or unordered) */
1180                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1181                         M_CMOVFLT_IMM(-1, d); /* -1 if less */
1182                         emit_store_dst(jd, iptr, d);
1183                         break;
1184
1185                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1186
1187                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1188                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1189                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1190                         M_DCMP(s1,s2);
1191                         M_OR_IMM(REG_ZERO, 1, d); /* greater by default (greater or unordered) */
1192                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1193                         M_CMOVFLT_IMM(-1, d); /* -1 if less */
1194                         emit_store_dst(jd, iptr, d);
1195                         break;
1196
1197
1198                 /* memory operations **************************************************/
1199
1200                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1201
1202                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1203                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1204                         emit_nullpointer_check(cd, iptr, s1);
1205                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1206                         emit_store_dst(jd, iptr, d);
1207                         break;
1208
1209                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1210
1211                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1212                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1213                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1214                         emit_array_checks(cd, iptr, s1, s2);
1215                         M_AADD(s2, s1, REG_ITMP3);
1216                         M_BLDS(d, REG_ITMP3, OFFSET(java_bytearray, data[0]));
1217                         emit_store_dst(jd, iptr, d);
1218                         break;
1219
1220                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1221
1222                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1223                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1224                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1225                         emit_array_checks(cd, iptr, s1, s2);
1226                         M_AADD(s2, s1, REG_ITMP3);
1227                         M_AADD(s2, REG_ITMP3, REG_ITMP3);
1228                         M_SLDU(d, REG_ITMP3, OFFSET(java_chararray, data[0]));
1229                         emit_store_dst(jd, iptr, d);
1230                         break;
1231
1232                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1233
1234                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1235                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1236                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1237                         emit_array_checks(cd, iptr, s1, s2);
1238                         M_AADD(s2, s1, REG_ITMP3);
1239                         M_AADD(s2, REG_ITMP3, REG_ITMP3);
1240                         M_SLDS(d, REG_ITMP3, OFFSET(java_shortarray, data[0]));
1241                         emit_store_dst(jd, iptr, d);
1242                         break;
1243
1244                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1245
1246                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1247                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1248                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1249                         emit_array_checks(cd, iptr, s1, s2);
1250                         M_ASLL_IMM(s2, 2, REG_ITMP3);
1251                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1252                         M_ILD(d, REG_ITMP3, OFFSET(java_intarray, data[0]));
1253                         emit_store_dst(jd, iptr, d);
1254                         break;
1255
1256                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1257
1258                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1259                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1260                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1261                         emit_array_checks(cd, iptr, s1, s2);
1262                         M_ASLL_IMM(s2, 3, REG_ITMP3);
1263                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1264                         M_LDX(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1265                         emit_store_dst(jd, iptr, d);
1266                         break;
1267
1268                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1269
1270                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1271                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1272                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1273                         emit_array_checks(cd, iptr, s1, s2);
1274                         M_ASLL_IMM(s2, 2, REG_ITMP3);
1275                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1276                         M_FLD(d, REG_ITMP3, OFFSET(java_floatarray, data[0]));
1277                         emit_store_dst(jd, iptr, d);
1278                         break;
1279
1280                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1281
1282                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1283                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1284                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1285                         emit_array_checks(cd, iptr, s1, s2);
1286                         M_ASLL_IMM(s2, 3, REG_ITMP3);
1287                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1288                         M_DLD(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1289                         emit_store_dst(jd, iptr, d);
1290                         break;
1291
1292                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1293
1294                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1295                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1296                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1297                         emit_array_checks(cd, iptr, s1, s2);
1298                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP3);
1299                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1300                         M_ALD(d, REG_ITMP3, OFFSET(java_objectarray, data[0]));
1301                         emit_store_dst(jd, iptr, d);
1302                         break;
1303
1304
1305                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1306
1307                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1308                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1309                         emit_array_checks(cd, iptr, s1, s2);
1310                         M_AADD(s2, s1, REG_ITMP1);
1311                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1312                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1313                         break;
1314
1315                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1316                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1317
1318                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1319                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1320                         emit_array_checks(cd, iptr, s1, s2);
1321                         M_AADD(s2, s1, REG_ITMP1);
1322                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1323                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1324                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1325                         break;
1326
1327                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1328
1329                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1330                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1331                         emit_array_checks(cd, iptr, s1, s2);
1332                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1333                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1334                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1335                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1336                         break;
1337
1338                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1339
1340                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1341                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1342                         emit_array_checks(cd, iptr, s1, s2);
1343                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1344                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1345                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1346                         M_STX_INTERN(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1347                         break;
1348
1349                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1350
1351                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1352                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1353                         emit_array_checks(cd, iptr, s1, s2);
1354                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1355                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1356                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1357                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1358                         break;
1359
1360                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1361
1362                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1363                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1364                         emit_array_checks(cd, iptr, s1, s2);
1365                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1366                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1367                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1368                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1369                         break;
1370
1371
1372                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1373
1374                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1375                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1376                         emit_array_checks(cd, iptr, s1, s2);
1377                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1378
1379                         M_MOV(s1, rd->argintregs[0]);
1380                         M_MOV(s3, rd->argintregs[1]);
1381                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1382                         M_ALD(REG_ITMP3, REG_PV, disp);
1383                         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
1384                         M_NOP;
1385
1386                         M_BEQZ(REG_RESULT_CALLER, 0);
1387                         codegen_add_arraystoreexception_ref(cd);
1388                         M_NOP;
1389
1390                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1391                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1392                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1393                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1394                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1395                         M_AST_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1396                         break;
1397
1398
1399                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1400
1401                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1402                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1403                         emit_array_checks(cd, iptr, s1, s2);
1404                         M_AADD(s2, s1, REG_ITMP1);
1405                         M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1406                         break;
1407
1408                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1409                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1410
1411                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1412                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1413                         emit_array_checks(cd, iptr, s1, s2);
1414                         M_AADD(s2, s1, REG_ITMP1);
1415                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1416                         M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1417                         break;
1418
1419                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1420
1421                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1422                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1423                         emit_array_checks(cd, iptr, s1, s2);
1424                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1425                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1426                         M_IST_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1427                         break;
1428
1429                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1430
1431                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1432                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1433                         emit_array_checks(cd, iptr, s1, s2);
1434                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1435                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1436                         M_STX_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1437                         break;
1438
1439                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1440
1441                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1442                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1443                         emit_array_checks(cd, iptr, s1, s2);
1444                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1445                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1446                         M_AST_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1447                         break;
1448
1449
1450                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1451
1452                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1453                                 uf = iptr->sx.s23.s3.uf;
1454                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1455                                 disp      = dseg_add_unique_address(cd, uf);
1456
1457                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1458                         }
1459                         else {
1460                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1461                                 fieldtype = fi->type;
1462                                 disp = dseg_add_address(cd, &(fi->value));
1463
1464                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1465                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1466                         }
1467
1468                         M_ALD(REG_ITMP1, REG_PV, disp);
1469
1470                         switch (fieldtype) {
1471                         case TYPE_INT:
1472                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1473                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1474                                 break;
1475                         case TYPE_LNG:
1476                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1477                                 M_LDX_INTERN(d, REG_ITMP1, 0);
1478                                 break;
1479                         case TYPE_ADR:
1480                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1481                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1482                                 break;
1483                         case TYPE_FLT:
1484                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1485                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1486                                 break;
1487                         case TYPE_DBL:
1488                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1489                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1490                                 break;
1491                         }
1492                         emit_store_dst(jd, iptr, d);
1493                         break;
1494
1495                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1496
1497                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1498                                 uf = iptr->sx.s23.s3.uf;
1499                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1500                                 disp      = dseg_add_unique_address(cd, uf);
1501
1502                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1503                         }
1504                         else {
1505                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1506                                 fieldtype = fi->type;
1507                                 disp = dseg_add_address(cd, &(fi->value));
1508
1509                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1510                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1511                         }
1512
1513                         M_ALD(REG_ITMP1, REG_PV, disp);
1514
1515                         switch (fieldtype) {
1516                         case TYPE_INT:
1517                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1518                                 M_IST_INTERN(s1, REG_ITMP1, 0);
1519                                 break;
1520                         case TYPE_LNG:
1521                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1522                                 M_STX_INTERN(s1, REG_ITMP1, 0);
1523                                 break;
1524                         case TYPE_ADR:
1525                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1526                                 M_AST_INTERN(s1, REG_ITMP1, 0);
1527                                 break;
1528                         case TYPE_FLT:
1529                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1530                                 M_FST_INTERN(s1, REG_ITMP1, 0);
1531                                 break;
1532                         case TYPE_DBL:
1533                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1534                                 M_DST_INTERN(s1, REG_ITMP1, 0);
1535                                 break;
1536                         }
1537                         break;
1538
1539                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
1540                                           /* val = value (in current instruction)     */
1541                                           /* following NOP)                           */
1542
1543                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1544                                 uf        = iptr->sx.s23.s3.uf;
1545                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1546                                 disp = dseg_add_unique_address(cd, uf);
1547
1548                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1549                         }
1550                         else {
1551                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1552                                 fieldtype = fi->type;
1553                                 disp      = dseg_add_address(cd, &(fi->value));
1554
1555                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1556                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1557                         }
1558
1559                         M_ALD(REG_ITMP1, REG_PV, disp);
1560
1561                         switch (fieldtype) {
1562                         case TYPE_INT:
1563                                 M_IST_INTERN(REG_ZERO, REG_ITMP1, 0);
1564                                 break;
1565                         case TYPE_LNG:
1566                                 M_STX_INTERN(REG_ZERO, REG_ITMP1, 0);
1567                                 break;
1568                         case TYPE_ADR:
1569                                 M_AST_INTERN(REG_ZERO, REG_ITMP1, 0);
1570                                 break;
1571                         case TYPE_FLT:
1572                                 M_FST_INTERN(REG_ZERO, REG_ITMP1, 0);
1573                                 break;
1574                         case TYPE_DBL:
1575                                 M_DST_INTERN(REG_ZERO, REG_ITMP1, 0);
1576                                 break;
1577                         }
1578                         break;
1579
1580
1581                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1582
1583                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1584                         emit_nullpointer_check(cd, iptr, s1);
1585
1586                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1587                                 uf = iptr->sx.s23.s3.uf;
1588
1589                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1590                                 disp      = 0;
1591
1592                                 codegen_add_patch_ref(cd, PATCHER_get_putfield, uf, 0);
1593                         }
1594                         else {
1595                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1596                                 fieldtype = fi->type;
1597                                 disp      = fi->offset;
1598                         }
1599
1600                         switch (fieldtype) {
1601                         case TYPE_INT:
1602                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1603                                 M_ILD(d, s1, disp);
1604                                 break;
1605                         case TYPE_LNG:
1606                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1607                                 M_LDX(d, s1, disp);
1608                                 break;
1609                         case TYPE_ADR:
1610                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1611                                 M_ALD(d, s1, disp);
1612                                 break;
1613                         case TYPE_FLT:
1614                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1615                                 M_FLD(d, s1, disp);
1616                                 break;
1617                         case TYPE_DBL:
1618                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1619                                 M_DLD(d, s1, disp);
1620                                 break;
1621                         default:
1622                                 assert(0);
1623                                 break;
1624                         }
1625                         emit_store_dst(jd, iptr, d);
1626                         break;
1627
1628                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1629
1630                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1631                         emit_nullpointer_check(cd, iptr, s1);
1632
1633                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1634                                 uf = iptr->sx.s23.s3.uf;
1635                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1636                                 disp      = 0;
1637                         }
1638                         else {
1639                                 uf        = NULL;
1640                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1641                                 fieldtype = fi->type;
1642                                 disp      = fi->offset;
1643                                 }
1644
1645                         if (IS_INT_LNG_TYPE(fieldtype))
1646                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1647                         else
1648                                 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1649
1650                         if (INSTRUCTION_IS_UNRESOLVED(iptr))
1651                                 codegen_add_patch_ref(cd, PATCHER_get_putfield, uf, 0);
1652
1653                         switch (fieldtype) {
1654                         case TYPE_INT:
1655                                 M_IST(s2, s1, disp);
1656                                 break;
1657                         case TYPE_LNG:
1658                                 M_STX(s2, s1, disp);
1659                                 break;
1660                         case TYPE_ADR:
1661                                 M_AST(s2, s1, disp);
1662                                 break;
1663                         case TYPE_FLT:
1664                                 M_FST(s2, s1, disp);
1665                                 break;
1666                         case TYPE_DBL:
1667                                 M_DST(s2, s1, disp);
1668                                 break;
1669                         default:
1670                                 assert(0);
1671                                 break;
1672                         }
1673                         break;
1674
1675                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
1676                                           /* val = value (in current instruction)     */
1677                                           /* following NOP)                           */
1678
1679                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1680                         emit_nullpointer_check(cd, iptr, s1);
1681
1682                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1683                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1684
1685                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1686
1687                                 codegen_addpatchref(cd, PATCHER_get_putfield,
1688                                                                         uf, 0);
1689
1690                                 if (opt_showdisassemble) {
1691                                         M_NOP; M_NOP;
1692                                 }
1693
1694                                 disp = 0;
1695
1696                         } else {
1697                         {
1698                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1699
1700                                 fieldtype = fi->type;
1701                                 disp = fi->offset;
1702                         }
1703
1704                         }
1705
1706                         switch (fieldtype) {
1707                         case TYPE_INT:
1708                                 M_IST(REG_ZERO, s1, disp);
1709                                 break;
1710                         case TYPE_LNG:
1711                                 M_STX(REG_ZERO, s1, disp);
1712                                 break;
1713                         case TYPE_ADR:
1714                                 M_AST(REG_ZERO, s1, disp);
1715                                 break;
1716                         case TYPE_FLT:
1717                                 M_FST(REG_ZERO, s1, disp);
1718                                 break;
1719                         case TYPE_DBL:
1720                                 M_DST(REG_ZERO, s1, disp);
1721                                 break;
1722                         }
1723                         break;
1724
1725
1726                 /* branch operations **************************************************/
1727
1728                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1729
1730                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1731                         M_INTMOVE(s1, REG_ITMP2_XPTR);
1732
1733 #ifdef ENABLE_VERIFIER
1734                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1735                                 unresolved_class *uc = iptr->sx.s23.s2.uc;
1736
1737                                 codegen_add_patch_ref(cd, PATCHER_athrow_areturn, uc, 0);
1738                         }
1739 #endif /* ENABLE_VERIFIER */
1740
1741                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1742                         M_ALD(REG_ITMP1, REG_PV, disp);
1743                         M_JMP(REG_ITMP3_XPC, REG_ITMP1, REG_ZERO);
1744                         M_NOP;
1745                         M_NOP;              /* nop ensures that XPC is less than the end */
1746                                             /* of basic block                            */
1747                         ALIGNCODENOP;
1748                         break;
1749
1750                 case ICMD_GOTO:         /* ... ==> ...                                */
1751                 case ICMD_RET:          /* ... ==> ...                                */
1752
1753                         M_BR(0);
1754                         codegen_add_branch_ref(cd, iptr->dst.block);
1755                         M_NOP;
1756                         ALIGNCODENOP;
1757                         break;
1758
1759                 case ICMD_JSR:          /* ... ==> ...                                */
1760
1761                         M_BR(0);
1762                         codegen_add_branch_ref(cd, iptr->sx.s23.s3.jsrtarget.block);
1763                         M_NOP;
1764                         ALIGNCODENOP;
1765                         break;
1766
1767                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1768
1769                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1770                         M_BEQZ(s1, 0);
1771                         codegen_add_branch_ref(cd, iptr->dst.block);
1772                         M_NOP;
1773                         break;
1774
1775                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
1776
1777                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1778                         M_BNEZ(s1, 0);
1779                         codegen_add_branch_ref(cd, iptr->dst.block);
1780                         M_NOP;
1781                         break;
1782
1783                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
1784
1785                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1786                         if (iptr->sx.val.i == 0) {
1787                                 M_BEQZ(s1, 0);
1788                         } else {
1789                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1790                                         M_CMP_IMM(s1, iptr->sx.val.i);
1791                                         }
1792                                 else {
1793                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1794                                         M_CMP(s1, REG_ITMP2);
1795                                         }
1796                                 M_BEQ(0);
1797                                 }
1798                         codegen_add_branch_ref(cd, iptr->dst.block);
1799                         M_NOP;
1800                         break;
1801
1802                 case ICMD_IFLT:         /* ..., value ==> ...                         */
1803
1804                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1805                         if (iptr->sx.val.i == 0) {
1806                                 M_BLTZ(s1, 0);
1807                         } else {
1808                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1809                                         M_CMP_IMM(s1, iptr->sx.val.i);
1810                                 } else {
1811                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1812                                         M_CMP(s1, REG_ITMP2);
1813                                 }
1814                                 M_BLT(0);
1815                         }
1816                         codegen_add_branch_ref(cd, iptr->dst.block);
1817                         M_NOP;
1818                         break;
1819
1820                 case ICMD_IFLE:         /* ..., value ==> ...                         */
1821
1822                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1823                         if (iptr->sx.val.i == 0) {
1824                                 M_BLEZ(s1, 0);
1825                                 }
1826                         else {
1827                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1828                                         M_CMP_IMM(s1, iptr->sx.val.i);
1829                                         }
1830                                 else {
1831                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1832                                         M_CMP(s1, REG_ITMP2);
1833                                 }
1834                                 M_BLE(0);
1835                         }
1836                         codegen_add_branch_ref(cd, iptr->dst.block);
1837                         M_NOP;
1838                         break;
1839
1840                 case ICMD_IFNE:         /* ..., value ==> ...                         */
1841
1842                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1843                         if (iptr->sx.val.i == 0) {
1844                                 M_BNEZ(s1, 0);
1845                                 }
1846                         else {
1847                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1848                                         M_CMP_IMM(s1, iptr->sx.val.i);
1849                                 }
1850                                 else {
1851                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1852                                         M_CMP(s1, REG_ITMP2);
1853                                 }
1854                                 M_BNE(0);
1855                         }
1856                         codegen_add_branch_ref(cd, iptr->dst.block);
1857                         M_NOP;
1858                         break;
1859
1860                 case ICMD_IFGT:         /* ..., value ==> ...                         */
1861
1862                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1863                         if (iptr->sx.val.i == 0) {
1864                                 M_BGTZ(s1, 0);
1865                         }
1866                         else {
1867                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1868                                         M_CMP_IMM(s1, iptr->sx.val.i);
1869                                 } else {
1870                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1871                                         M_CMP(s1, REG_ITMP2);
1872                                 }
1873                                 M_BGT(0);
1874                         }
1875                         codegen_add_branch_ref(cd, iptr->dst.block);
1876                         M_NOP;
1877                         break;
1878
1879                 case ICMD_IFGE:         /* ..., value ==> ...                         */
1880
1881                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1882                         if (iptr->sx.val.i == 0) {
1883                                 M_BGEZ(s1, 0);
1884                                 }
1885                         else {
1886                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1887                                         M_CMP_IMM(s1, iptr->sx.val.i);
1888                                         }
1889                                 else {
1890                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1891                                         M_CMP(s1, REG_ITMP2);
1892                                 }
1893                                 M_BGE(0);
1894                         }
1895                         codegen_add_branch_ref(cd, iptr->dst.block);
1896                         M_NOP;
1897                         break;
1898
1899                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1900
1901                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1902                         if (iptr->sx.val.l == 0) {
1903                                 M_BEQZ(s1, 0);
1904                         }
1905                         else {
1906                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1907                                         M_CMP_IMM(s1, iptr->sx.val.l);
1908                                 }
1909                                 else {
1910                                         LCONST(REG_ITMP2, iptr->sx.val.l);
1911                                         M_CMP(s1, REG_ITMP2);
1912                                 }
1913                                 M_XBEQ(0);
1914                         }
1915                         codegen_add_branch_ref(cd, iptr->dst.block);
1916                         M_NOP;
1917                         break;
1918
1919                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1920
1921                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1922                         if (iptr->sx.val.l == 0) {
1923                                 M_BLTZ(s1, 0);
1924                         }
1925                         else {
1926                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1927                                         M_CMP_IMM(s1, iptr->sx.val.l);
1928                                 }
1929                                 else {
1930                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1931                                         M_CMP(s1, REG_ITMP2);
1932                                 }
1933                                 M_XBLT(0);
1934                         }
1935                         codegen_add_branch_ref(cd, iptr->dst.block);
1936                         M_NOP;
1937                         break;
1938
1939                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1940
1941                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1942                         if (iptr->sx.val.l == 0) {
1943                                 M_BLEZ(s1, 0);
1944                                 }
1945                         else {
1946                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1947                                         M_CMP_IMM(s1, iptr->sx.val.l);
1948                                         }
1949                                 else {
1950                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1951                                         M_CMP(s1, REG_ITMP2);
1952                                 }
1953                                 M_XBLE(0);
1954                         }
1955                         codegen_add_branch_ref(cd, iptr->dst.block);
1956                         M_NOP;
1957                         break;
1958
1959                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1960
1961                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1962                         if (iptr->sx.val.l == 0) {
1963                                 M_BNEZ(s1, 0);
1964                                 }
1965                         else {
1966                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1967                                         M_CMP_IMM(s1, iptr->sx.val.i);
1968                                 }
1969                                 else {
1970                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1971                                         M_CMP(s1, REG_ITMP2);
1972                                 }
1973                                 M_XBNE(0);
1974                         }
1975                         codegen_add_branch_ref(cd, iptr->dst.block);
1976                         M_NOP;
1977                         break;
1978
1979                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1980
1981                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1982                         if (iptr->sx.val.l == 0) {
1983                                 M_BGTZ(s1, 0);
1984                         } else {
1985                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1986                                         M_CMP_IMM(s1, iptr->sx.val.l);
1987                                 } else {
1988                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1989                                         M_CMP(s1, REG_ITMP2);
1990                                 }
1991                                 M_XBGT(0);
1992                         }
1993                         codegen_add_branch_ref(cd, iptr->dst.block);
1994                         M_NOP;
1995                         break;
1996
1997                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
1998
1999                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2000                         if (iptr->sx.val.l == 0) {
2001                                 M_BGEZ(s1, 0);
2002                         }
2003                         else {
2004                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
2005                                         M_CMP_IMM(s1, iptr->sx.val.l);
2006                                 }
2007                                 else {
2008                                         ICONST(REG_ITMP2, iptr->sx.val.l);
2009                                         M_CMP(s1, REG_ITMP2);
2010                                 }
2011                                 M_XBGE(0);
2012                         }
2013                         codegen_add_branch_ref(cd, iptr->dst.block);
2014                         M_NOP;
2015                         break;
2016
2017
2018                 case ICMD_IF_ACMPEQ:    /* ..., value, value ==> ...                  */
2019                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2020
2021                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2022                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2023                         M_CMP(s1, s2);
2024                         M_XBEQ(0);
2025                         codegen_add_branch_ref(cd, iptr->dst.block);
2026                         M_NOP;
2027                         break;
2028
2029                 case ICMD_IF_ICMPEQ:    /* 32-bit compare                             */
2030
2031                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2032                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2033                         M_CMP(s1, s2);
2034                         M_BEQ(0);
2035                         codegen_add_branch_ref(cd, iptr->dst.block);
2036                         M_NOP;
2037                         break;
2038
2039                 case ICMD_IF_ACMPNE:    /* ..., value, value ==> ...                  */
2040                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2041
2042                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2043                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2044                         M_CMP(s1, s2);
2045                         M_XBNE(0);
2046                         codegen_add_branch_ref(cd, iptr->dst.block);
2047                         M_NOP;
2048                         break;
2049
2050                 case ICMD_IF_ICMPNE:    /* 32-bit compare                             */
2051
2052                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2053                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2054                         M_CMP(s1, s2);
2055                         M_BNE(0);
2056                         codegen_add_branch_ref(cd, iptr->dst.block);
2057                         M_NOP;
2058                         break;
2059
2060                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2061
2062                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2063                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2064                         M_CMP(s1, s2);
2065                         M_XBLT(0);
2066                         codegen_add_branch_ref(cd, iptr->dst.block);
2067                         M_NOP;
2068                         break;
2069
2070                 case ICMD_IF_ICMPLT:    /* 32-bit compare                             */
2071
2072                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2073                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2074                         M_CMP(s1, s2);
2075                         M_BLT(0);
2076                         codegen_add_branch_ref(cd, iptr->dst.block);
2077                         M_NOP;
2078                         break;
2079
2080                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2081
2082                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2083                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2084                         M_CMP(s1, s2);
2085                         M_XBGT(0);
2086                         codegen_add_branch_ref(cd, iptr->dst.block);
2087                         M_NOP;
2088                         break;
2089
2090                 case ICMD_IF_ICMPGT:    /* 32-bit compare                             */
2091
2092                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2093                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2094                         M_CMP(s1, s2);
2095                         M_BGT(0);
2096                         codegen_add_branch_ref(cd, iptr->dst.block);
2097                         M_NOP;
2098                         break;
2099
2100                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2101
2102                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2103                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2104                         M_CMP(s1, s2);
2105                         M_BLE(0);
2106                         codegen_add_branch_ref(cd, iptr->dst.block);
2107                         M_NOP;
2108                         break;
2109
2110                 case ICMD_IF_ICMPLE:    /* 32-bit compare                             */
2111
2112                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2113                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2114                         M_CMP(s1, s2);
2115                         M_BLE(0);
2116                         codegen_add_branch_ref(cd, iptr->dst.block);
2117                         M_NOP;
2118                         break;
2119
2120
2121                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2122
2123                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2124                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2125                         M_CMP(s1, s2);
2126                         M_BGE(0);
2127                         codegen_add_branch_ref(cd, iptr->dst.block);
2128                         M_NOP;
2129                         break;
2130
2131                 case ICMD_IF_ICMPGE:    /* 32-bit compare                             */
2132
2133                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2134                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2135                         M_CMP(s1, s2);
2136                         M_BGE(0);
2137                         codegen_add_branch_ref(cd, iptr->dst.block);
2138                         M_NOP;
2139                         break;
2140
2141
2142                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2143                 case ICMD_LRETURN:
2144
2145                         s1 = emit_load_s1(jd, iptr, REG_RESULT_CALLEE);
2146                         M_INTMOVE(s1, REG_RESULT_CALLEE);
2147                         goto nowperformreturn;
2148
2149                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2150
2151                         s1 = emit_load_s1(jd, iptr, REG_RESULT_CALLEE);
2152                         M_INTMOVE(s1, REG_RESULT_CALLEE);
2153
2154 #ifdef ENABLE_VERIFIER
2155                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2156                                 unresolved_class *uc = iptr->sx.s23.s2.uc;
2157
2158                                 codegen_add_patch_ref(cd, PATCHER_athrow_areturn, uc, 0);
2159                         }
2160 #endif /* ENABLE_VERIFIER */
2161                         goto nowperformreturn;
2162
2163                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2164                 case ICMD_DRETURN:
2165
2166                         s1 = emit_load_s1(jd, iptr, REG_FRESULT);
2167                         M_DBLMOVE(s1, REG_FRESULT);
2168                         goto nowperformreturn;
2169
2170                 case ICMD_RETURN:       /* ...  ==> ...                               */
2171
2172 nowperformreturn:
2173                         {
2174                         s4 i, p;
2175
2176                         p = cd->stackframesize;
2177
2178 #if !defined(NDEBUG)
2179                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2180                                 emit_verbosecall_exit(jd);
2181 #endif
2182
2183 #if defined(ENABLE_THREADS)
2184                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2185 /* XXX: REG_RESULT is save, but what about FRESULT? */
2186                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8); /* XXX: what for ? */
2187
2188                                 switch (iptr->opc) {
2189                                 case ICMD_FRETURN:
2190                                 case ICMD_DRETURN:
2191                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2192                                         break;
2193                                 }
2194
2195                                 disp = dseg_add_functionptr(cd, BUILTIN_monitorexit);
2196                                 M_ALD(REG_ITMP3, REG_PV, disp);
2197                                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO); /*REG_RA_CALLER */
2198
2199                                 switch (iptr->opc) {
2200                                 case ICMD_FRETURN:
2201                                 case ICMD_DRETURN:
2202                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2203                                         break;
2204                                 }
2205                         }
2206 #endif
2207
2208
2209
2210                         M_RETURN(REG_RA_CALLEE, 8); /* implicit window restore */
2211                         M_NOP;
2212                         ALIGNCODENOP;
2213                         }
2214                         break;
2215
2216                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2217                         {
2218                         s4 i, l;
2219                         branch_target_t *table;
2220
2221                         table = iptr->dst.table;
2222
2223                         l = iptr->sx.s23.s2.tablelow;
2224                         i = iptr->sx.s23.s3.tablehigh;
2225
2226                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2227                         if (l == 0) {
2228                                 M_INTMOVE(s1, REG_ITMP1);
2229                         }
2230                         else if (l <= 4095) {
2231                                 M_ADD_IMM(s1, -l, REG_ITMP1);
2232                         }
2233                         else {
2234                                 ICONST(REG_ITMP2, l);
2235                                 /* XXX: do I need to truncate s1 to 32-bit ? */
2236                                 M_SUB(s1, REG_ITMP2, REG_ITMP1);
2237                         }
2238                         i = i - l + 1;
2239
2240
2241                         /* range check */
2242
2243                         if (i <= 4095) {
2244                                 M_CMP_IMM(REG_ITMP1, i - 1);
2245                         }
2246                         else {
2247                                 ICONST(REG_ITMP2, i - 1);
2248                                 M_CMP(REG_ITMP1, REG_ITMP2);
2249                         }
2250                         M_XBUGT(0);
2251                         codegen_add_branch_ref(cd, table[0].block); /* default target */
2252                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2253
2254                         /* build jump table top down and use address of lowest entry */
2255
2256                         table += i;
2257
2258                         while (--i >= 0) {
2259                                 dseg_add_target(cd, table->block);
2260                                 --table;
2261                                 }
2262                         }
2263
2264                         /* length of dataseg after last dseg_addtarget is used by load */
2265
2266                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2267                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2268                         M_JMP(REG_ZERO, REG_ITMP2, REG_ZERO);
2269                         M_NOP;
2270                         ALIGNCODENOP;
2271                         break;
2272
2273                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2274                         {
2275                         s4 i;
2276                         lookup_target_t *lookup;
2277
2278                         lookup = iptr->dst.lookup;
2279
2280                         i = iptr->sx.s23.s2.lookupcount;
2281
2282                         MCODECHECK((i<<2)+8);
2283                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2284
2285                         while (--i >= 0) {
2286                                 if ((lookup->value >= -4096) && (lookup->value <= 4095)) {
2287                                         M_CMP_IMM(s1, lookup->value);
2288                                 } else {
2289                                         ICONST(REG_ITMP2, lookup->value);
2290                                         M_CMP(s1, REG_ITMP2);
2291                                 }
2292                                 M_BEQ(0);
2293                                 codegen_add_branch_ref(cd, lookup->target.block);
2294                                 M_NOP;
2295                                 ++lookup;
2296                         }
2297
2298                         M_BR(0);
2299                         codegen_add_branch_ref(cd, iptr->sx.s23.s3.lookupdefault.block);
2300                         M_NOP;
2301                         ALIGNCODENOP;
2302                         break;
2303                         }
2304
2305
2306                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2307
2308                         bte = iptr->sx.s23.s3.bte;
2309                         md = bte->md;
2310
2311                         /* XXX: proper builtin calling and float args are so not implemented */
2312                         assert(md->paramcount <= 5 && md->argfltreguse < 1);
2313
2314                         goto gen_method;
2315
2316                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2317
2318                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2319                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2320                 case ICMD_INVOKEINTERFACE:
2321
2322                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2323                                 lm = NULL;
2324                                 um = iptr->sx.s23.s3.um;
2325                                 md = um->methodref->parseddesc.md;
2326                         }
2327                         else {
2328                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2329                                 um = NULL;
2330                                 md = lm->parseddesc;
2331                         }
2332
2333 gen_method:
2334                         s3 = md->paramcount;
2335
2336                         MCODECHECK((s3 << 1) + 64);
2337
2338                         /* copy arguments to registers or stack location                  */
2339
2340                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2341                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2342
2343                                 if (var->flags & PREALLOC)
2344                                         continue;
2345
2346                                 if (IS_INT_LNG_TYPE(var->type)) {
2347                                         if (!md->params[s3].inmemory) {
2348                                                 s1 = rd->argintregs[md->params[s3].regoff];
2349                                                 d = emit_load(jd, iptr, var, s1);
2350                                                 M_INTMOVE(d, s1);
2351                                         }
2352                                         else {
2353                                                 d = emit_load(jd, iptr, var, REG_ITMP1);
2354                                                 M_STX(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2355                                         }
2356                                 }
2357                                 else {
2358                                         if (!md->params[s3].inmemory) {
2359                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2360                                                 d = emit_load(jd, iptr, var, s1);
2361                                                 if (IS_2_WORD_TYPE(var->type))
2362                                                         M_DMOV(d, s1);
2363                                                 else
2364                                                         M_FMOV(d, s1);
2365                                         }
2366                                         else {
2367                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2368                                                 if (IS_2_WORD_TYPE(var->type))
2369                                                         M_DST(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2370                                                 else
2371                                                         M_FST(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2372                                         }
2373                                 }
2374                         }
2375
2376                         switch (iptr->opc) {
2377                         case ICMD_BUILTIN:
2378                                 disp = dseg_add_functionptr(cd, bte->fp);
2379
2380                                 M_ALD(REG_PV_CALLER, REG_PV, disp);  /* built-in-function pointer */
2381                                 s1 = REG_PV_CALLER;
2382
2383                                 /* XXX jit-c-call */
2384
2385                                 break;
2386
2387                         case ICMD_INVOKESPECIAL:
2388                                 M_BEQZ(REG_OUT0, 0);
2389                                 codegen_add_nullpointerexception_ref(cd);
2390                                 M_NOP;
2391                                 /* fall through */
2392
2393                         case ICMD_INVOKESTATIC:
2394                                 if (lm == NULL) {
2395                                         disp = dseg_add_unique_address(cd, NULL);
2396
2397                                         codegen_add_patch_ref(cd, PATCHER_invokestatic_special,
2398                                                                                 um, disp);
2399                                 }
2400                                 else
2401                                         disp = dseg_add_address(cd, lm->stubroutine);
2402
2403                                 M_ALD(REG_PV_CALLER, REG_PV, disp);          /* method pointer in pv */
2404                                 s1 = REG_PV_CALLER;
2405                                 break;
2406
2407                         case ICMD_INVOKEVIRTUAL:
2408                                 emit_nullpointer_check(cd, iptr, REG_OUT0);
2409
2410                                 if (lm == NULL) {
2411                                         codegen_add_patch_ref(cd, PATCHER_invokevirtual, um, 0);
2412
2413                                         s1 = 0;
2414                                 }
2415                                 else
2416                                         s1 = OFFSET(vftbl_t, table[0]) +
2417                                                 sizeof(methodptr) * lm->vftblindex;
2418
2419                                 M_ALD(REG_METHODPTR, REG_OUT0,
2420                                           OFFSET(java_objectheader, vftbl));
2421                                 M_ALD(REG_PV_CALLER, REG_METHODPTR, s1);
2422                                 s1 = REG_PV_CALLER;
2423                                 break;
2424
2425                         case ICMD_INVOKEINTERFACE:
2426                                 emit_nullpointer_check(cd, iptr, REG_OUT0);
2427
2428                                 if (lm == NULL) {
2429                                         codegen_add_patch_ref(cd, PATCHER_invokeinterface, um, 0);
2430
2431                                         s1 = 0;
2432                                         s2 = 0;
2433                                 }
2434                                 else {
2435                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2436                                                 sizeof(methodptr*) * lm->class->index;
2437
2438                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2439                                 }
2440
2441                                 M_ALD(REG_METHODPTR, REG_OUT0,
2442                                           OFFSET(java_objectheader, vftbl));
2443                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2444                                 M_ALD(REG_PV_CALLER, REG_METHODPTR, s2);
2445                                 s1 = REG_PV_CALLER;
2446                                 break;
2447                         }
2448
2449                         /* generate the actual call */
2450
2451                         M_JMP(REG_RA_CALLER, s1, REG_ZERO);
2452                         M_NOP;
2453                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
2454                         /* REG_RA holds the value of the jmp instruction, therefore +8 */
2455                         M_LDA(REG_ZERO, REG_RA_CALLER, -disp + 8);
2456
2457
2458                         /* actually only used for ICMD_BUILTIN */
2459
2460                         if (INSTRUCTION_MUST_CHECK(iptr)) {
2461                                 M_BEQZ(REG_RESULT_CALLER, 0);
2462                                 codegen_add_fillinstacktrace_ref(cd);
2463                                 M_NOP;
2464                         }
2465
2466                         /* store return value */
2467
2468                         d = md->returntype.type;
2469
2470                         if (d != TYPE_VOID) {
2471                                 if (IS_INT_LNG_TYPE(d)) {
2472                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_CALLER);
2473                                         M_INTMOVE(REG_RESULT_CALLER, s1);
2474                                 }
2475                                 else {
2476                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2477                                         if (IS_2_WORD_TYPE(d)) {
2478                                                 M_DBLMOVE(REG_FRESULT, s1);
2479                                         } else {
2480                                                 M_FLTMOVE(REG_FRESULT, s1);
2481                                         }
2482                                 }
2483                                 emit_store_dst(jd, iptr, s1);
2484                         }
2485                         break;
2486
2487
2488                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2489                                       /* val.a: (classinfo*) superclass               */
2490
2491                         /*  superclass is an interface:
2492                          *
2493                          *  OK if ((sub == NULL) ||
2494                          *         (sub->vftbl->interfacetablelength > super->index) &&
2495                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2496                          *
2497                          *  superclass is a class:
2498                          *
2499                          *  OK if ((sub == NULL) || (0
2500                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2501                          *         super->vftbl->diffvall));
2502                          */
2503
2504                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2505                                 classinfo *super;
2506                                 s4         superindex;
2507
2508                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2509                                         super      = NULL;
2510                                         superindex = 0;
2511                                 }
2512                                 else {
2513                                         super = iptr->sx.s23.s3.c.cls;
2514                                         superindex = super->index;
2515                                 }
2516
2517 #if defined(ENABLE_THREADS)
2518                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2519 #endif
2520
2521                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2522
2523                                 /* calculate interface checkcast code size */
2524
2525                                 s2 = 8;
2526                                 if (super == NULL)
2527                                         s2 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2528
2529                                 /* calculate class checkcast code size */
2530
2531                                 s3 = 10;
2532                                 if (super == NULL)
2533                                         s3 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2534
2535                                 /* if class is not resolved, check which code to call */
2536
2537                                 if (super == NULL) {
2538                                         M_BEQZ(s1, 5 + (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0) + s2 + 2 + s3 + 1);
2539                                         M_NOP;
2540
2541                                         cr   = iptr->sx.s23.s3.c.ref;
2542                                         disp = dseg_add_unique_s4(cd, 0);         /* super->flags */
2543
2544                                         codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_flags,
2545                                                                                   cr, disp);
2546
2547                                         M_ILD(REG_ITMP2, REG_PV, disp);
2548                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2549                                         M_BEQZ(REG_ITMP2, s2 + 2 + 2);
2550                                         M_NOP;
2551                                 }
2552
2553                                 /* interface checkcast code */
2554
2555                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2556                                         if (super == NULL) {
2557                                                 cr = iptr->sx.s23.s3.c.ref;
2558
2559                                                 codegen_add_patch_ref(cd, PATCHER_checkcast_interface,
2560                                                                                           cr, 0);
2561                                         }
2562                                         else {
2563                                                 M_BEQZ(s1, s2 + 2);
2564                                                 M_NOP;
2565                                         }
2566
2567                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2568                                         M_ILD(REG_ITMP3, REG_ITMP2,
2569                                                         OFFSET(vftbl_t, interfacetablelength));
2570                                         M_ADD_IMM(REG_ITMP3, -superindex, REG_ITMP3);
2571                                         M_BLEZ(REG_ITMP3, 0);
2572                                         codegen_add_classcastexception_ref(cd, s1);
2573                                         M_NOP;
2574                                         M_ALD(REG_ITMP3, REG_ITMP2,
2575                                                   OFFSET(vftbl_t, interfacetable[0]) -
2576                                                   superindex * sizeof(methodptr*));
2577                                         M_BEQZ(REG_ITMP3, 0);
2578                                         codegen_add_classcastexception_ref(cd, s1);
2579                                         M_NOP;
2580
2581                                         if (super == NULL) {
2582                                     /* on sparc we always add 2 to the size of the code we want  */
2583                                     /* branch over. (1 for branch delay nop, 1 since the base is */
2584                                     /* the address of the branch instruction */
2585                                                 M_BR(s3 + 2);
2586                                                 M_NOP;
2587                                         }
2588                                 }
2589
2590                                 /* class checkcast code */
2591
2592                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2593                                         if (super == NULL) {
2594                                                 cr   = iptr->sx.s23.s3.c.ref;
2595                                                 disp = dseg_add_unique_address(cd, NULL);
2596
2597                                                 codegen_add_patch_ref(cd,
2598                                                                                         PATCHER_checkcast_instanceof_class,
2599                                                                                           cr, disp);
2600                                         }
2601                                         else {
2602                                                 disp = dseg_add_address(cd, super->vftbl);
2603
2604                                                 M_BEQZ(s1, s3 + 2);
2605                                                 M_NOP;
2606                                         }
2607
2608                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2609                                         M_ALD(REG_ITMP3, REG_PV, disp);
2610 #if defined(ENABLE_THREADS)
2611                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2612 #endif
2613                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2614                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2615                                         M_SUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2616                                         M_ALD(REG_ITMP3, REG_PV, disp);
2617                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2618 #if defined(ENABLE_THREADS)
2619                                         codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2620 #endif
2621                                         /*                              } */
2622                                         M_CMP(REG_ITMP3, REG_ITMP2);
2623                                         M_BULT(0);                         /* branch if ITMP3 < ITMP2 */
2624                                         codegen_add_classcastexception_ref(cd, s1);
2625                                         M_NOP;
2626                                 }
2627
2628                                 d = codegen_reg_of_dst(jd, iptr, s1);
2629                         }
2630                         else {
2631                                 /* array type cast-check */
2632
2633                                 s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
2634                                 M_INTMOVE(s1, rd->argintregs[0]);
2635
2636                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2637
2638                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2639                                         cr   = iptr->sx.s23.s3.c.ref;
2640                                         disp = dseg_add_unique_address(cd, NULL);
2641
2642                                         codegen_add_patch_ref(cd, PATCHER_builtin_arraycheckcast,
2643                                                                                   cr, disp);
2644                                 }
2645                                 else
2646                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2647
2648                                 M_ALD(rd->argintregs[1], REG_PV, disp);
2649                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2650                                 M_ALD(REG_ITMP3, REG_PV, disp);
2651                                 /* XXX jit-c-call */
2652                                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
2653                                 M_NOP;
2654
2655                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2656                                 M_BEQZ(REG_RESULT_CALLER, 0);
2657                                 codegen_add_classcastexception_ref(cd, s1);
2658                                 M_NOP;
2659
2660                                 d = codegen_reg_of_dst(jd, iptr, s1);
2661                         }
2662
2663                         M_INTMOVE(s1, d);
2664                         emit_store_dst(jd, iptr, d);
2665                         break;
2666
2667                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2668
2669                         /*  superclass is an interface:
2670                          *
2671                          *  return (sub != NULL) &&
2672                          *         (sub->vftbl->interfacetablelength > super->index) &&
2673                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
2674                          *
2675                          *  superclass is a class:
2676                          *
2677                          *  return ((sub != NULL) && (0
2678                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2679                          *          super->vftbl->diffvall));
2680                          */
2681
2682                         {
2683                         classinfo *super;
2684                         vftbl_t   *supervftbl;
2685                         s4         superindex;
2686
2687                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2688                                 super = NULL;
2689                                 superindex = 0;
2690                                 supervftbl = NULL;
2691
2692                         } else {
2693                                 super = iptr->sx.s23.s3.c.cls;
2694                                 superindex = super->index;
2695                                 supervftbl = super->vftbl;
2696                         }
2697
2698 #if defined(ENABLE_THREADS)
2699                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2700 #endif
2701                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2702                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2703                         if (s1 == d) {
2704                                 M_MOV(s1, REG_ITMP1);
2705                                 s1 = REG_ITMP1;
2706                         }
2707
2708                         /* calculate interface instanceof code size */
2709
2710                         s2 = 7;
2711                         if (super == NULL)
2712                                 s2 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2713
2714                         /* calculate class instanceof code size */
2715
2716                         s3 = 8;
2717                         if (super == NULL)
2718                                 s3 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2719
2720                         M_CLR(d);
2721
2722                         /* if class is not resolved, check which code to call */
2723
2724                         if (super == NULL) {
2725                                 M_BEQZ(s1, 5 + (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0) + s2 + 2 + s3);
2726                                 M_NOP;
2727
2728                                 cr   = iptr->sx.s23.s3.c.ref;
2729                                 disp = dseg_add_unique_s4(cd, 0);             /* super->flags */
2730
2731                                 codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_flags,
2732                                                                           cr, disp);
2733
2734                                 M_ILD(REG_ITMP3, REG_PV, disp);
2735                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
2736                                 M_BEQZ(REG_ITMP3, s2 + 2 + 2);
2737                                 M_NOP;
2738                         }
2739
2740                         /* interface instanceof code */
2741
2742                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2743                                 if (super == NULL) {
2744                                         cr = iptr->sx.s23.s3.c.ref;
2745
2746                                         codegen_add_patch_ref(cd, PATCHER_instanceof_interface,
2747                                                                                   cr, 0);
2748                                 }
2749                                 else {
2750                                         M_BEQZ(s1, s2 + 2);
2751                                         M_NOP;
2752                                 }
2753
2754                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2755                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2756                                 M_CMP_IMM(REG_ITMP3, superindex);
2757                                 M_BLE(4);
2758                                 M_NOP;
2759                                 M_ALD(REG_ITMP1, REG_ITMP1,
2760                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
2761                                                         superindex * sizeof(methodptr*)));
2762                                 M_CMOVRNE_IMM(REG_ITMP1, 1, d);      /* REG_ITMP1 != 0  */
2763
2764                                 if (super == NULL) {
2765                                         M_BR(s3 + 2);
2766                                         M_NOP;
2767                                 }
2768                         }
2769
2770                         /* class instanceof code */
2771
2772                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2773                                 if (super == NULL) {
2774                                         cr   = iptr->sx.s23.s3.c.ref;
2775                                         disp = dseg_add_unique_address(cd, NULL);
2776
2777                                         codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_class,
2778                                                                                   cr, disp);
2779                                 }
2780                                 else {
2781                                         disp = dseg_add_address(cd, supervftbl);
2782
2783                                         M_BEQZ(s1, s3 + 2);
2784                                         M_NOP;
2785                                 }
2786
2787                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2788                                 M_ALD(REG_ITMP2, REG_PV, disp);
2789 #if defined(ENABLE_THREADS)
2790                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2791 #endif
2792                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2793                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2794                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2795 #if defined(ENABLE_THREADS)
2796                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2797 #endif
2798                                 M_SUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
2799                                 M_CMP(REG_ITMP1, REG_ITMP2);
2800                                 M_XCMOVULE_IMM(1, d);
2801                         }
2802                         emit_store_dst(jd, iptr, d);
2803                         }
2804                         break;
2805
2806                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2807
2808                         /* check for negative sizes and copy sizes to stack if necessary  */
2809
2810                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2811
2812                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2813
2814                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2815
2816                                 /* copy SAVEDVAR sizes to stack */
2817
2818                                 /* Already Preallocated? */
2819
2820                                 if (!(var->flags & PREALLOC)) {
2821                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2822                                         M_STX(s2, REG_SP, CSTACK + (s1 * 8));
2823                                 }
2824                         }
2825
2826                         /* arg 0 = dimension count */
2827
2828                         ICONST(REG_OUT0, iptr->s1.argcount);
2829
2830                         /* is patcher function set? */
2831
2832                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2833                                 disp = dseg_add_unique_address(cd, 0);
2834
2835                                 codegen_add_patch_ref(cd, PATCHER_builtin_multianewarray,
2836                                                                           iptr->sx.s23.s3.c.ref,
2837                                                                           disp);
2838                         }
2839                         else
2840                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2841
2842                         /* arg 1 = arraydescriptor */
2843
2844                         M_ALD(REG_OUT1, REG_PV, disp);
2845
2846                         /* arg 2 = pointer to dimensions = stack pointer (absolute) */
2847
2848                         M_ADD_IMM(REG_SP, CSTACK, REG_OUT2);
2849
2850                         /* XXX c abi call */
2851                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2852                         M_ALD(REG_ITMP3, REG_PV, disp);
2853                         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
2854                         M_NOP;
2855
2856                         /* check for exception before result assignment */
2857
2858                         M_BEQZ(REG_RESULT_CALLER, 0);
2859                         codegen_add_fillinstacktrace_ref(cd);
2860                         M_NOP;
2861
2862                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT_CALLER);
2863                         M_INTMOVE(REG_RESULT_CALLER, d);
2864                         emit_store_dst(jd, iptr, d);
2865                         break;
2866
2867                 default:
2868                         exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2869                                                                                    iptr->opc);
2870                         return false;
2871
2872         } /* switch */
2873
2874         } /* for instruction */
2875
2876
2877
2878         } /* if (bptr -> flags >= BBREACHED) */
2879         } /* for basic block */
2880
2881         dseg_createlinenumbertable(cd);
2882
2883         /* generate exception and patcher stubs */
2884
2885         emit_exception_stubs(jd);
2886         emit_patcher_stubs(jd);
2887 #if defined(ENABLE_REPLACEMENT)
2888         emit_replacement_stubs(jd);
2889 #endif /* defined(ENABLE_REPLACEMENT) */
2890
2891         codegen_finish(jd);
2892
2893         /* everything's ok */
2894
2895         return true;
2896 }
2897
2898
2899
2900
2901
2902 /* createcompilerstub **********************************************************
2903
2904    Creates a stub routine which calls the compiler.
2905
2906 *******************************************************************************/
2907
2908 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
2909 #define COMPILERSTUB_CODESIZE    4 * 4
2910
2911 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
2912
2913
2914 u1 *createcompilerstub(methodinfo *m)
2915 {
2916         u1     *s;                          /* memory to hold the stub            */
2917         ptrint      *d;
2918         codeinfo    *code;
2919         codegendata *cd;
2920         s4           dumpsize;
2921
2922         s = CNEW(u1, COMPILERSTUB_SIZE);
2923
2924         /* set data pointer and code pointer */
2925
2926         d = (ptrint *) s;
2927         s = s + COMPILERSTUB_DATASIZE;
2928
2929         /* mark start of dump memory area */
2930
2931         dumpsize = dump_size();
2932
2933         cd = DNEW(codegendata);
2934         cd->mcodeptr = s;
2935
2936         /* Store the codeinfo pointer in the same place as in the
2937            methodheader for compiled methods. */
2938
2939         code = code_codeinfo_new(m);
2940
2941         d[0] = (ptrint) asm_call_jit_compiler;
2942         d[1] = (ptrint) m;
2943         d[2] = (ptrint) code;
2944
2945         /* code for the stub */
2946         /* no window save yet, user caller's PV */
2947         M_ALD_INTERN(REG_ITMP1, REG_PV_CALLER, -2 * SIZEOF_VOID_P);  /* codeinfo pointer */
2948         M_ALD_INTERN(REG_PV_CALLER, REG_PV_CALLER, -3 * SIZEOF_VOID_P);  /* pointer to compiler */
2949         M_JMP(REG_ZERO, REG_PV_CALLER, REG_ZERO);  /* jump to the compiler, RA is wasted */
2950         M_NOP;
2951
2952 #if defined(ENABLE_STATISTICS)
2953         if (opt_stat)
2954                 count_cstub_len += COMPILERSTUB_SIZE;
2955 #endif
2956
2957         /* release dump area */
2958
2959         dump_release(dumpsize);
2960
2961         return s;
2962 }
2963
2964
2965
2966 /* createnativestub ************************************************************
2967
2968    Creates a stub routine which calls a native method.
2969
2970 *******************************************************************************/
2971
2972 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
2973 {
2974         methodinfo   *m;
2975         codeinfo     *code;
2976         codegendata  *cd;
2977         registerdata *rd;
2978         methoddesc   *md;
2979         s4            nativeparams;
2980         s4            i, j;                 /* count variables                    */
2981         s4            t;
2982         s4            s1, s2, disp;
2983         s4            funcdisp;             /* displacement of the function       */
2984
2985         /* get required compiler data */
2986
2987         m    = jd->m;
2988         code = jd->code;
2989         cd   = jd->cd;
2990         rd   = jd->rd;
2991
2992         /* redo param allocation */
2993         md_native_param_alloc(nmd);
2994
2995         /* initialize variables */
2996
2997         md = m->parseddesc;
2998         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
2999
3000         /* calculate stack frame size */
3001
3002         cd->stackframesize =
3003                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3004                 sizeof(localref_table) / SIZEOF_VOID_P +
3005                 md->paramcount +                /* for saving arguments over calls    */
3006                 nmd->memuse +  /* nmd knows about the native stackframe layout */
3007                 WINSAVE_CNT;
3008
3009         /* create method header */
3010
3011         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
3012         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
3013         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
3014         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
3015         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
3016         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
3017         (void) dseg_addlinenumbertablesize(cd);
3018         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
3019
3020         /* generate stub code */
3021
3022         M_SAVE(REG_SP, -cd->stackframesize * 8, REG_SP); /* build up stackframe    */
3023
3024 #if !defined(NDEBUG)
3025         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3026                 emit_verbosecall_enter(jd);
3027 #endif
3028
3029         /* get function address (this must happen before the stackframeinfo) */
3030
3031         funcdisp = dseg_add_functionptr(cd, f);
3032
3033 #if !defined(WITH_STATIC_CLASSPATH)
3034         if (f == NULL) {
3035                 codegen_add_patch_ref(cd, PATCHER_resolve_native, m, funcdisp);
3036         }
3037 #endif
3038
3039         /* save float argument registers */
3040
3041         for (i = 0, j = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3042                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3043                         M_DST(rd->argfltregs[i], REG_SP, CSTACK + (j * 8));
3044                         j++;
3045                 }
3046         }
3047
3048         /* prepare data structures for native function call */
3049
3050         M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp == top of the stack frame (absolute == +BIAS) */
3051         M_MOV(REG_PV_CALLEE, REG_OUT1);
3052         M_MOV(REG_FP, REG_OUT2); /* java sp */
3053         M_MOV(REG_RA_CALLEE, REG_OUT3);
3054         disp = dseg_add_functionptr(cd, codegen_start_native_call);
3055         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
3056         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
3057         M_NOP; /* XXX fill me! */
3058
3059         /* restore float argument registers */
3060
3061         for (i = 0, j = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3062                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3063                         M_DLD(rd->argfltregs[i], REG_SP, CSTACK + (j * 8));
3064                         j++;
3065                 }
3066         }
3067
3068         /* copy or spill arguments to new locations */
3069         int num_fltregargs = 0;
3070         int fltregarg_inswap[16];
3071         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3072                 t = md->paramtypes[i].type;
3073
3074                 if (IS_INT_LNG_TYPE(t)) {
3075                         if (!md->params[i].inmemory) {
3076                                 s1 = rd->argintregs[md->params[i].regoff];
3077                                 /* s1 refers to the old window, transpose */
3078                                 s1 = REG_WINDOW_TRANSPOSE(s1);
3079
3080                                 if (!nmd->params[j].inmemory) {
3081                                         s2 = nat_argintregs[nmd->params[j].regoff];
3082                                         M_INTMOVE(s1, s2);
3083                                 } else {
3084                                         s2 = nmd->params[j].regoff - 6;
3085                                         M_AST(s1, REG_SP, CSTACK + s2 * 8);
3086                                 }
3087
3088                         } else {
3089                                 s1 = md->params[i].regoff + cd->stackframesize;
3090                                 s2 = nmd->params[j].regoff - 6;
3091                                 M_ALD(REG_ITMP1, REG_SP, CSTACK + s1 * 8);
3092                                 M_AST(REG_ITMP1, REG_SP, CSTACK + s2 * 8);
3093                         }
3094
3095                 } else {
3096                         if (!md->params[i].inmemory) {
3097                                 s1 = rd->argfltregs[md->params[i].regoff];
3098
3099                                 if (!nmd->params[j].inmemory) {
3100                                         /* no mapping to regs needed, native flt args use regoff */
3101                                         s2 = nmd->params[j].regoff;
3102
3103                                         /* we cannot move flt regs to their native arg locations directly */
3104                                         M_DMOV(s1, s2 + 16);
3105                                         fltregarg_inswap[num_fltregargs] = s2;
3106                                         num_fltregargs++;
3107                                         printf("flt arg swap to %d\n", s2 + 16);
3108
3109                                 } else {
3110                                         s2 = nmd->params[j].regoff;
3111                                         if (IS_2_WORD_TYPE(t))
3112                                                 M_DST(s1, REG_SP, CSTACK + (s2 * 8));
3113                                         else
3114                                                 M_FST(s1, REG_SP, CSTACK + (s2 * 8));
3115                                 }
3116
3117                         } else {
3118                                 s1 = md->params[i].regoff + cd->stackframesize;
3119                                 s2 = nmd->params[j].regoff - 6;
3120                                 if (IS_2_WORD_TYPE(t)) {
3121                                         M_DLD(REG_FTMP1, REG_SP, CSTACK + s1 * 8);
3122                                         M_DST(REG_FTMP1, REG_SP, CSTACK + s2 * 8);
3123                                 } else {
3124                                         M_FLD(REG_FTMP1, REG_SP, CSTACK + s1 * 8);
3125                                         M_FST(REG_FTMP1, REG_SP, CSTACK + s2 * 8);
3126                                 }
3127                         }
3128                 }
3129         }
3130
3131         /* move swapped float args to target regs */
3132         for (i = 0; i < num_fltregargs; i++) {
3133                 s1 = fltregarg_inswap[i];
3134                 M_DMOV(s1 + 16, s1);
3135                 printf("float arg to target reg: %d ==> %d\n", s1+16, s1);
3136         }
3137
3138
3139         /* put class into second argument register */
3140
3141         if (m->flags & ACC_STATIC) {
3142                 disp = dseg_add_address(cd, m->class);
3143                 M_ALD(REG_OUT1, REG_PV_CALLEE, disp);
3144         }
3145
3146         /* put env into first argument register */
3147
3148         disp = dseg_add_address(cd, _Jv_env);
3149         M_ALD(REG_OUT0, REG_PV_CALLEE, disp);
3150
3151         /* do the native function call */
3152
3153         M_ALD(REG_ITMP3, REG_PV_CALLEE, funcdisp); /* load adress of native method       */
3154         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO); /* call native method                 */
3155         M_NOP;                              /* delay slot                         */
3156
3157         /* save return value */
3158
3159         if (md->returntype.type != TYPE_VOID) {
3160                 if (IS_INT_LNG_TYPE(md->returntype.type))
3161                         M_MOV(REG_RESULT_CALLER, REG_RESULT_CALLEE);
3162                 else
3163                         M_DST(REG_FRESULT, REG_SP, CSTACK);
3164         }
3165
3166         /* Note: native functions return float values in %f0 (see ABI) */
3167         /* we handle this by doing M_FLD below. (which will load the lower word into %f1) */
3168
3169 #if !defined(NDEBUG)
3170         /* But for the trace function we need to put a flt result into %f1 */
3171         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3172                 if (!IS_2_WORD_TYPE(md->returntype.type))
3173                         M_FLD(REG_FRESULT, REG_SP, CSTACK);
3174                 emit_verbosecall_exit(jd);
3175         }
3176 #endif
3177
3178         /* remove native stackframe info */
3179
3180         M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp, like above */
3181         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3182         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
3183         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
3184         M_NOP; /* XXX fill me! */
3185         M_MOV(REG_RESULT_CALLER, REG_ITMP2_XPTR);
3186
3187         /* restore float return value, int return value already in our return reg */
3188
3189         if (md->returntype.type != TYPE_VOID) {
3190                 if (IS_FLT_DBL_TYPE(md->returntype.type)) {
3191                         if (IS_2_WORD_TYPE(md->returntype.type))
3192                                 M_DLD(REG_FRESULT, REG_SP, CSTACK);
3193                         else
3194                                 M_FLD(REG_FRESULT, REG_SP, CSTACK);
3195                 }
3196         }
3197
3198         /* check for exception */
3199
3200         M_BNEZ(REG_ITMP2_XPTR, 4);          /* if no exception then return        */
3201         M_NOP;
3202
3203         M_RETURN(REG_RA_CALLEE, 8); /* implicit window restore */
3204         M_NOP;
3205 #if 0
3206         M_RESTORE(REG_ZERO, 0, REG_ZERO);   /* restore callers window (DELAY)     */
3207
3208         M_RET(REG_RA_CALLER, 8);            /* return to caller                   */
3209         M_NOP;                              /* DELAY SLOT                         */
3210 #endif
3211
3212         /* handle exception */
3213
3214         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3215         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
3216         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);/* jump to asm exception handler     */
3217         M_MOV(REG_RA_CALLEE, REG_ITMP3_XPC); /* get exception address (DELAY)    */
3218
3219         /* generate patcher stubs */
3220
3221         emit_patcher_stubs(jd);
3222
3223         codegen_finish(jd);
3224
3225         return code->entrypoint;
3226 }
3227
3228 /*
3229  * These are local overrides for various environment variables in Emacs.
3230  * Please do not remove this and leave it at the end of the file, where
3231  * Emacs will automagically detect them.
3232  * ---------------------------------------------------------------------
3233  * Local variables:
3234  * mode: c
3235  * indent-tabs-mode: t
3236  * c-basic-offset: 4
3237  * tab-width: 4
3238  * End:
3239  * vim:noexpandtab:sw=4:ts=4:
3240  */