1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 8352 2007-08-19 18:32:59Z pm $
34 #include "mm/memory.h"
35 #if defined(ENABLE_THREADS)
36 # include "threads/native/lock.h"
38 #include "vm/builtin.h"
39 #include "vm/exceptions.h"
40 #include "vm/global.h"
41 #include "vm/jit/abi.h"
42 #include "vm/jit/abi-asm.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/codegen-common.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/s390/codegen.h"
50 #include "vm/jit/s390/emit.h"
51 #include "vm/jit/s390/md-abi.h"
53 #include "vmcore/options.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 if (IS_2_WORD_TYPE(src->type))
78 M_DLD(tempreg, REG_SP, disp);
80 M_FLD(tempreg, REG_SP, disp);
83 if (IS_2_WORD_TYPE(src->type))
84 M_LLD(tempreg, REG_SP, disp);
86 M_ILD(tempreg, REG_SP, disp);
98 /* emit_store ******************************************************************
100 This function generates the code to store the result of an
101 operation back into a spilled pseudo-variable. If the
102 pseudo-variable has not been spilled in the first place, this
103 function will generate nothing.
105 *******************************************************************************/
107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
111 /* get required compiler data */
115 if (IS_INMEMORY(dst->flags)) {
118 if (IS_FLT_DBL_TYPE(dst->type)) {
119 if (IS_2_WORD_TYPE(dst->type))
120 M_DST(d, REG_SP, dst->vv.regoff);
122 M_FST(d, REG_SP, dst->vv.regoff);
125 if (IS_2_WORD_TYPE(dst->type))
126 M_LST(d, REG_SP, dst->vv.regoff);
128 M_IST(d, REG_SP, dst->vv.regoff);
134 /* emit_copy *******************************************************************
136 Generates a register/memory to register/memory copy.
138 *******************************************************************************/
140 void emit_copy(jitdata *jd, instruction *iptr)
147 /* get required compiler data */
151 /* get source and destination variables */
153 src = VAROP(iptr->s1);
154 dst = VAROP(iptr->dst);
156 if ((src->vv.regoff != dst->vv.regoff) ||
157 ((src->flags ^ dst->flags) & INMEMORY)) {
159 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
160 /* emit nothing, as the value won't be used anyway */
164 /* If one of the variables resides in memory, we can eliminate
165 the register move from/to the temporary register with the
166 order of getting the destination register and the load. */
168 if (IS_INMEMORY(src->flags)) {
169 if (IS_FLT_DBL_TYPE(dst->type)) {
170 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
172 if (IS_2_WORD_TYPE(dst->type)) {
173 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
175 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
178 s1 = emit_load(jd, iptr, src, d);
181 if (IS_FLT_DBL_TYPE(src->type)) {
182 s1 = emit_load(jd, iptr, src, REG_FTMP1);
184 if (IS_2_WORD_TYPE(src->type)) {
185 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
187 s1 = emit_load(jd, iptr, src, REG_ITMP1);
190 d = codegen_reg_of_var(iptr->opc, dst, s1);
194 if (IS_FLT_DBL_TYPE(src->type)) {
197 if (IS_2_WORD_TYPE(src->type)) {
205 emit_store(jd, iptr, dst, d);
209 /* emit_trap *******************************************************************
211 Emit a trap instruction and return the original machine code.
213 *******************************************************************************/
215 uint32_t emit_trap(codegendata *cd)
219 /* Get machine code which is patched back in later. The
220 trap is 2 bytes long. */
222 mcode = *((u2 *) cd->mcodeptr);
224 M_ILL(EXCEPTION_HARDWARE_PATCHER);
230 /* emit_verbosecall_enter ******************************************************
232 Generates the code for the call trace.
234 *******************************************************************************/
237 #include "vm/jit/trace.h"
238 void emit_verbosecall_enter(jitdata *jd)
249 /* mark trace code */
253 /* allocate stack frame */
255 stackframesize = 96 + (ARG_CNT * 8) + (TMP_CNT * 8);
256 M_ASUB_IMM(stackframesize, REG_SP);
258 /* store argument registers in array */
262 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
263 M_IST(abi_registers_integer_argument[i], REG_SP, off + 4);
264 /* high bytes are sign extension */
265 M_SRA_IMM(31, abi_registers_integer_argument[i]);
266 M_IST(abi_registers_integer_argument[i], REG_SP, off);
269 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
270 M_DST(abi_registers_float_argument[i], REG_SP, off);
273 /* save temporary registers for leaf methods */
275 if (jd->isleafmethod) {
276 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
277 M_IST(abi_registers_integer_temporary[i], REG_SP, off);
280 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
281 M_DST(abi_registers_float_temporary[i], REG_SP, off);
285 /* load arguments for trace_java_call_enter */
288 disp = dseg_add_address(cd, m);
289 M_ALD_DSEG(REG_A0, disp);
290 /* pointer to argument registers array */
291 M_LDA(REG_A1, REG_SP, 96);
292 /* pointer to on stack arguments */
293 M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8));
295 /* call trace_java_call_enter */
297 disp = dseg_add_functionptr(cd, trace_java_call_enter);
298 M_ALD_DSEG(REG_ITMP3, disp);
301 /* restore argument registers */
305 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
306 M_ILD(abi_registers_integer_argument[i], REG_SP, off + 4);
309 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
310 M_DLD(abi_registers_float_argument[i], REG_SP, off);
313 /* restore temporary registers for leaf methods */
315 if (jd->isleafmethod) {
316 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
317 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
320 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
321 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
325 /* remove stack frame */
327 M_AADD_IMM(stackframesize, REG_SP);
329 /* mark trace code */
338 s4 stackframesize, off, foff, aoff, doff, t, iargctr, fargctr, disp;
340 /* get required compiler data */
347 /* mark trace code */
352 (6 * 8) + /* s8 on stack parameters x 6 */
353 (1 * 4) + /* methodinfo on stack parameter */
358 M_ASUB_IMM(stackframesize, REG_SP); /* allocate stackframe */
360 /* save argument registers */
362 off = (6 * 8) + (1 * 4);
364 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
365 M_IST(abi_registers_integer_argument[i], REG_SP, off);
367 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
368 M_DST(abi_registers_float_argument[i], REG_SP, off);
370 /* save temporary registers for leaf methods */
372 if (jd->isleafmethod) {
373 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
374 M_LST(abi_registers_integer_temporary[i], REG_SP, off);
376 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
377 M_DST(abi_registers_float_temporary[i], REG_SP, off);
380 /* Load arguments to new locations */
382 /* First move all arguments to stack
387 * (s8) a1 \ Auxilliary stack frame
392 M_ASUB_IMM(2 * 8, REG_SP);
394 /* offset to where first integer arg is saved on stack */
395 off = (2 * 8) + (6 * 8) + (1 * 4);
396 /* offset to where first float arg is saved on stack */
397 foff = off + (INT_ARG_CNT * 8);
398 /* offset to where first argument is passed on stack */
399 aoff = (2 * 8) + stackframesize + (cd->stackframesize * 8);
400 /* offset to destination on stack */
403 iargctr = fargctr = 0;
405 ICONST(REG_ITMP1, 0);
407 for (i = 0; i < md->paramcount && i < 8; i++) {
408 t = md->paramtypes[i].type;
410 M_IST(REG_ITMP1, REG_SP, doff);
411 M_IST(REG_ITMP1, REG_SP, doff + 4);
413 if (IS_FLT_DBL_TYPE(t)) {
414 if (fargctr < 2) { /* passed in register */
415 N_STD(abi_registers_float_argument[fargctr], doff, RN, REG_SP);
417 } else { /* passed on stack */
419 if (IS_2_WORD_TYPE(t)) {
420 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
422 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
425 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
429 if (IS_2_WORD_TYPE(t)) {
430 if (iargctr < 4) { /* passed in 2 registers */
431 N_STM(REG_A0 + iargctr, REG_A0 + iargctr + 1, doff, REG_SP);
433 } else { /* passed on stack */
434 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
438 if (iargctr < 5) { /* passed in register */
439 N_ST(REG_A0 + iargctr, doff + 4, RN, REG_SP);
441 } else { /* passed on stack */
442 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
451 /* Now move a0 and a1 to registers
461 N_LM(REG_A0, REG_A1, 0, REG_SP);
462 N_LM(REG_A2, REG_A3, 8, REG_SP);
464 M_AADD_IMM(2 * 8, REG_SP);
466 /* Finally load methodinfo argument */
468 disp = dseg_add_address(cd, m);
469 M_ALD_DSEG(REG_ITMP2, disp);
470 M_AST(REG_ITMP2, REG_SP, 6 * 8);
472 /* Call builtin_verbosecall_enter */
474 disp = dseg_add_address(cd, builtin_verbosecall_enter);
475 M_ALD_DSEG(REG_ITMP2, disp);
476 M_ASUB_IMM(96, REG_SP);
478 M_AADD_IMM(96, REG_SP);
480 /* restore argument registers */
482 off = (6 * 8) + (1 * 4);
484 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
485 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
487 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
488 M_DLD(abi_registers_float_argument[i], REG_SP, off);
490 /* restore temporary registers for leaf methods */
492 if (jd->isleafmethod) {
493 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
494 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
496 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
497 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
500 /* remove stackframe */
502 M_AADD_IMM(stackframesize, REG_SP);
504 /* mark trace code */
509 #endif /* !defined(NDEBUG) */
512 /* emit_verbosecall_exit *******************************************************
514 Generates the code for the call trace.
516 *******************************************************************************/
519 void emit_verbosecall_exit(jitdata *jd)
530 /* mark trace code */
534 /* allocate stackframe */
536 stackframesize = 96 + (3 * 8);
537 M_ASUB_IMM(stackframesize, REG_SP);
539 /* store return values in array and sign extend them */
541 M_IST(REG_RESULT, REG_SP, 96 + (0 * 8) + 4);
542 M_SRA_IMM(31, REG_RESULT);
543 M_IST(REG_RESULT, REG_SP, 96 + (0 * 8));
545 M_IST(REG_RESULT2, REG_SP, 96 + (1 * 8) + 4);
546 M_SRA_IMM(31, REG_RESULT2);
547 M_IST(REG_RESULT2, REG_SP, 96 + (1 * 8));
549 M_DST(REG_FRESULT, REG_SP, 96 + (2 * 8));
551 /* call trace_java_call_exit */
553 disp = dseg_add_address(cd, m);
554 M_ALD_DSEG(REG_A0, disp);
555 M_LDA(REG_A1, REG_SP, 96);
556 disp = dseg_add_functionptr(cd, trace_java_call_exit);
557 M_ALD_DSEG(REG_ITMP3, disp);
560 /* restore return values */
562 M_ILD(REG_RESULT, REG_SP, 96 + (0 * 8) + 4);
563 M_ILD(REG_RESULT2, REG_SP, 96 + (1 * 8) + 4);
564 M_DLD(REG_FRESULT, REG_SP, 96 + (2 * 8));
566 /* remove stackframe */
568 M_AADD_IMM(stackframesize, REG_SP);
570 /* mark trace code */
581 /* get required compiler data */
587 /* mark trace code */
591 M_ASUB_IMM(2 * 8, REG_SP);
593 N_STM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
594 M_DST(REG_FRESULT, REG_SP, 1 * 8);
596 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type)) {
597 /* (REG_A0, REG_A1) == (REG_RESULT, REG_RESULT2), se no need to move */
599 M_INTMOVE(REG_RESULT, REG_A1);
603 disp = dseg_add_address(cd, m);
604 M_ALD_DSEG(REG_A2, disp);
606 /* REG_FRESULT is REG_FA0, so no need to move */
607 M_FLTMOVE(REG_FRESULT, REG_FA1);
609 disp = dseg_add_address(cd, builtin_verbosecall_exit);
610 M_ALD_DSEG(REG_ITMP1, disp);
611 M_ASUB_IMM(96, REG_SP);
613 M_AADD_IMM(96, REG_SP);
615 N_LM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
616 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
618 M_AADD_IMM(2 * 8, REG_SP);
620 /* mark trace code */
625 #endif /* !defined(NDEBUG) */
628 /* emit_load_high **************************************************************
630 Emits a possible load of the high 32-bits of an operand.
632 *******************************************************************************/
634 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
640 assert(src->type == TYPE_LNG);
642 /* get required compiler data */
646 if (IS_INMEMORY(src->flags)) {
649 disp = src->vv.regoff;
651 M_ILD(tempreg, REG_SP, disp);
656 reg = GET_HIGH_REG(src->vv.regoff);
661 /* emit_load_low ***************************************************************
663 Emits a possible load of the low 32-bits of an operand.
665 *******************************************************************************/
667 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
673 assert(src->type == TYPE_LNG);
675 /* get required compiler data */
679 if (IS_INMEMORY(src->flags)) {
682 disp = src->vv.regoff;
684 M_ILD(tempreg, REG_SP, disp + 4);
689 reg = GET_LOW_REG(src->vv.regoff);
694 s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
695 codegendata *cd = jd->cd;
696 s4 reg = emit_load_s1(jd, iptr, tempreg);
705 s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
706 codegendata *cd = jd->cd;
707 s4 reg = emit_load_s2(jd, iptr, tempreg);
709 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
710 M_FMOV(reg, tempreg);
720 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
721 codegendata *cd = jd->cd;
722 s4 reg = emit_load_s1(jd, iptr, tempreg);
724 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
725 M_FMOV(reg, tempreg);
735 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
736 codegendata *cd = jd->cd;
737 s4 reg = emit_load_s2(jd, iptr, tempreg);
739 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
740 M_FMOV(reg, tempreg);
750 s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
761 * (r12, r13) Illegal, because r13 is PV
762 * (r14, r15) Illegal, because r15 is SP
766 dst = VAROP(iptr->dst);
768 if (IS_INMEMORY(dst->flags)) {
769 if (! IS_REG_ITMP(ltmpreg)) {
770 M_INTMOVE(ltmpreg, breg);
772 if (! IS_REG_ITMP(htmpreg)) {
773 M_INTMOVE(htmpreg, breg);
775 return PACK_REGS(ltmpreg, htmpreg);
777 hr = GET_HIGH_REG(dst->vv.regoff);
778 lr = GET_LOW_REG(dst->vv.regoff);
779 if (((hr % 2) == 0) && lr == (hr + 1)) {
780 /* the result is already in a even-odd pair */
781 return dst->vv.regoff;
782 } else if (((hr % 2) == 0) && (hr < R12)) {
783 /* the high register is at a even position */
784 M_INTMOVE(hr + 1, breg);
785 return PACK_REGS(hr + 1, hr);
786 } else if (((lr % 2) == 1) && (lr < R12)) {
787 /* the low register is at a odd position */
788 M_INTMOVE(lr - 1, breg);
789 return PACK_REGS(lr, lr - 1);
791 /* no way to create an even-odd pair by 1 copy operation,
792 * Use the temporary register pair.
794 if (! IS_REG_ITMP(ltmpreg)) {
795 M_INTMOVE(ltmpreg, breg);
797 if (! IS_REG_ITMP(htmpreg)) {
798 M_INTMOVE(htmpreg, breg);
800 return PACK_REGS(ltmpreg, htmpreg);
805 void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
811 dst = VAROP(iptr->dst);
813 if (IS_INMEMORY(dst->flags)) {
814 if (! IS_REG_ITMP(ltmpreg)) {
815 M_INTMOVE(breg, ltmpreg);
817 if (! IS_REG_ITMP(htmpreg)) {
818 M_INTMOVE(breg, htmpreg);
821 hr = GET_HIGH_REG(dst->vv.regoff);
822 lr = GET_LOW_REG(dst->vv.regoff);
823 if (((hr % 2) == 0) && lr == (hr + 1)) {
825 } else if (((hr % 2) == 0) && (hr < R12)) {
826 M_INTMOVE(breg, hr + 1);
827 } else if (((lr % 2) == 1) && (lr < R12)) {
828 M_INTMOVE(breg, lr - 1);
830 if (! IS_REG_ITMP(ltmpreg)) {
831 M_INTMOVE(breg, ltmpreg);
833 if (! IS_REG_ITMP(htmpreg)) {
834 M_INTMOVE(breg, htmpreg);
840 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
844 dst = VAROP(iptr->dst);
845 if (! IS_INMEMORY(dst->flags)) {
846 if (dst->vv.regoff != dtmpreg) {
847 if (IS_FLT_DBL_TYPE(dst->type)) {
848 M_FLTMOVE(dtmpreg, dst->vv.regoff);
849 } else if (IS_2_WORD_TYPE(dst->type)) {
850 M_LNGMOVE(dtmpreg, dst->vv.regoff);
852 M_INTMOVE(dtmpreg, dst->vv.regoff);
858 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
860 s4 branchdisp = disp;
864 if (N_VALID_BRANCH(branchdisp)) {
866 /* valid displacement */
887 case BRANCH_UNCONDITIONAL:
891 vm_abort("emit_branch: unknown condition %d", condition);
895 /* If LONGBRANCHES is not set, the flag and the error flag */
897 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
898 cd->flags |= (CODEGENDATA_FLAG_ERROR |
899 CODEGENDATA_FLAG_LONGBRANCHES);
902 /* If error flag is set, do nothing. The method has to be recompiled. */
904 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
908 /* Patch the displacement to branch over the actual branch manually
909 * to not get yet more nops.
912 branchmpc = cd->mcodeptr - cd->mcodebase;
934 case BRANCH_UNCONDITIONAL:
935 /* fall through, no displacement to patch */
939 vm_abort("emit_branch: unknown condition %d", condition);
942 /* The actual long branch */
944 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
945 M_ILD_DSEG(REG_ITMP3, disp);
946 M_AADD(REG_PV, REG_ITMP3);
947 M_JMP(RN, REG_ITMP3);
949 /* Patch back the displacement */
952 *(u4 *)ref |= (u4)((cd->mcodeptr - ref) / 2);
957 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
958 if (INSTRUCTION_MUST_CHECK(iptr)) {
960 M_BNE(SZ_BRC + SZ_ILL);
961 M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
965 /* emit_arrayindexoutofbounds_check ********************************************
967 Emit a ArrayIndexOutOfBoundsException check.
969 *******************************************************************************/
971 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
973 if (INSTRUCTION_MUST_CHECK(iptr)) {
975 * Do unsigned comparison to catch negative indexes.
977 N_CL(s2, OFFSET(java_array_t, size), RN, s1);
978 M_BLT(SZ_BRC + SZ_ILL);
979 M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
983 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
984 if (INSTRUCTION_MUST_CHECK(iptr)) {
990 M_BGT(SZ_BRC + SZ_ILL);
993 M_BNE(SZ_BRC + SZ_ILL);
996 M_BLE(SZ_BRC + SZ_ILL);
999 vm_abort("emit_classcast_check: unknown condition %d", condition);
1001 M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
1005 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
1006 if (INSTRUCTION_MUST_CHECK(iptr)) {
1008 M_BNE(SZ_BRC + SZ_ILL);
1009 M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
1013 void emit_exception_check(codegendata *cd, instruction *iptr) {
1014 if (INSTRUCTION_MUST_CHECK(iptr)) {
1016 M_BNE(SZ_BRC + SZ_ILL);
1017 M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
1021 void emit_restore_pv(codegendata *cd) {
1022 s4 offset, offset_imm;
1026 disp = (s4) (cd->mcodeptr - cd->mcodebase);
1027 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
1030 /* If the offset from the method start does not fit into an immediate
1031 * value, we can't put it into the data segment!
1034 /* Displacement from start of method to here */
1036 offset = (s4) (cd->mcodeptr - cd->mcodebase);
1037 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
1039 if (N_VALID_IMM(offset_imm)) {
1040 /* Get program counter */
1042 /* Substract displacement */
1043 M_AADD_IMM(offset_imm, REG_PV);
1045 /* Save program counter and jump over displacement in instruction flow */
1046 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
1047 /* Place displacement here */
1048 /* REG_PV points now exactly to this position */
1049 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
1050 /* Substract *(REG_PV) from REG_PV */
1051 N_A(REG_PV, 0, RN, REG_PV);
1056 * These are local overrides for various environment variables in Emacs.
1057 * Please do not remove this and leave it at the end of the file, where
1058 * Emacs will automagically detect them.
1059 * ---------------------------------------------------------------------
1062 * indent-tabs-mode: t