1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "mm/memory.h"
33 #if defined(ENABLE_THREADS)
34 # include "threads/native/lock.h"
36 #include "vm/builtin.h"
37 #include "vm/exceptions.h"
38 #include "vm/global.h"
39 #include "vm/jit/abi.h"
40 #include "vm/jit/abi-asm.h"
41 #include "vm/jit/asmpart.h"
42 #include "vm/jit/codegen-common.h"
43 #include "vm/jit/emit-common.h"
44 #include "vm/jit/jit.h"
45 #include "vm/jit/patcher-common.h"
46 #include "vm/jit/replace.h"
47 #include "vm/jit/trace.h"
48 #include "vm/jit/s390/codegen.h"
49 #include "vm/jit/s390/emit.h"
50 #include "vm/jit/s390/md-abi.h"
52 #include "vmcore/options.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 /* get required compiler data */
70 if (IS_INMEMORY(src->flags)) {
73 disp = src->vv.regoff;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
97 /* emit_store ******************************************************************
99 This function generates the code to store the result of an
100 operation back into a spilled pseudo-variable. If the
101 pseudo-variable has not been spilled in the first place, this
102 function will generate nothing.
104 *******************************************************************************/
106 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
110 /* get required compiler data */
114 if (IS_INMEMORY(dst->flags)) {
117 if (IS_FLT_DBL_TYPE(dst->type)) {
118 if (IS_2_WORD_TYPE(dst->type))
119 M_DST(d, REG_SP, dst->vv.regoff);
121 M_FST(d, REG_SP, dst->vv.regoff);
124 if (IS_2_WORD_TYPE(dst->type))
125 M_LST(d, REG_SP, dst->vv.regoff);
127 M_IST(d, REG_SP, dst->vv.regoff);
133 /* emit_copy *******************************************************************
135 Generates a register/memory to register/memory copy.
137 *******************************************************************************/
139 void emit_copy(jitdata *jd, instruction *iptr)
146 /* get required compiler data */
150 /* get source and destination variables */
152 src = VAROP(iptr->s1);
153 dst = VAROP(iptr->dst);
155 if ((src->vv.regoff != dst->vv.regoff) ||
156 ((src->flags ^ dst->flags) & INMEMORY)) {
158 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
159 /* emit nothing, as the value won't be used anyway */
163 if (IS_INMEMORY(src->flags) && IS_INMEMORY(dst->flags)) {
164 if (IS_2_WORD_TYPE(src->type)) {
165 N_MVC(dst->vv.regoff, 8, REG_SP, src->vv.regoff, REG_SP);
167 N_MVC(dst->vv.regoff, 4, REG_SP, src->vv.regoff, REG_SP);
171 /* If one of the variables resides in memory, we can eliminate
172 the register move from/to the temporary register with the
173 order of getting the destination register and the load. */
175 if (IS_INMEMORY(src->flags)) {
176 if (IS_FLT_DBL_TYPE(dst->type)) {
177 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
179 if (IS_2_WORD_TYPE(dst->type)) {
180 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
182 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
185 s1 = emit_load(jd, iptr, src, d);
188 if (IS_FLT_DBL_TYPE(src->type)) {
189 s1 = emit_load(jd, iptr, src, REG_FTMP1);
191 if (IS_2_WORD_TYPE(src->type)) {
192 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
194 s1 = emit_load(jd, iptr, src, REG_ITMP1);
197 d = codegen_reg_of_var(iptr->opc, dst, s1);
201 if (IS_FLT_DBL_TYPE(src->type)) {
204 if (IS_2_WORD_TYPE(src->type)) {
212 emit_store(jd, iptr, dst, d);
217 /* emit_trap *******************************************************************
219 Emit a trap instruction and return the original machine code.
221 *******************************************************************************/
223 uint32_t emit_trap(codegendata *cd)
227 /* Get machine code which is patched back in later. The
228 trap is 2 bytes long. */
230 mcode = *((u2 *) cd->mcodeptr);
232 M_ILL(EXCEPTION_HARDWARE_PATCHER);
238 /* emit_verbosecall_enter ******************************************************
240 Generates the code for the call trace.
242 *******************************************************************************/
245 void emit_verbosecall_enter(jitdata *jd)
257 /* mark trace code */
261 /* allocate stack frame */
263 stackframesize = 96 + (md->paramcount * 8);
265 /* for leaf methods we need to store unused argument and temporary registers */
267 if (jd->isleafmethod) {
268 stackframesize += (ARG_CNT + TMP_CNT) * 8;
271 /* allocate stack frame */
273 M_ASUB_IMM(stackframesize, REG_SP);
275 /* store argument registers in array */
279 for (i = 0; i < md->paramcount; i++) {
280 if (! md->params[i].inmemory) {
281 s = md->params[i].regoff;
282 switch (md->paramtypes[i].type) {
285 M_IST(s, REG_SP, off);
288 M_LST(s, REG_SP, off);
291 M_FST(s, REG_SP, off);
294 M_DST(s, REG_SP, off);
301 /* save unused (currently all) argument registers for leaf methods */
302 /* save temporary registers for leaf methods */
304 if (jd->isleafmethod) {
306 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
307 M_IST(abi_registers_integer_argument[i], REG_SP, off);
310 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
311 M_DST(abi_registers_float_argument[i], REG_SP, off);
314 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
315 M_IST(abi_registers_integer_temporary[i], REG_SP, off);
318 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
319 M_DST(abi_registers_float_temporary[i], REG_SP, off);
323 /* load arguments for trace_java_call_enter */
327 disp = dseg_add_address(cd, m);
328 M_ALD_DSEG(REG_A0, disp);
329 /* pointer to argument registers array */
330 M_LDA(REG_A1, REG_SP, 96);
331 /* pointer to on stack arguments */
332 M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8));
334 /* call trace_java_call_enter */
336 disp = dseg_add_functionptr(cd, trace_java_call_enter);
337 M_ALD_DSEG(REG_ITMP2, disp);
340 /* restore used argument registers */
341 /* for leaf methods restore all argument and temporary registers */
343 if (jd->isleafmethod) {
344 off = 96 + (8 * md->paramcount);
346 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
347 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
350 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
351 M_DLD(abi_registers_float_argument[i], REG_SP, off);
354 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
355 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
358 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
359 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
364 for (i = 0; i < md->paramcount; i++) {
365 if (! md->params[i].inmemory) {
366 s = md->params[i].regoff;
367 switch (md->paramtypes[i].type) {
370 M_ILD(s, REG_SP, off);
373 M_LLD(s, REG_SP, off);
376 M_FLD(s, REG_SP, off);
379 M_DLD(s, REG_SP, off);
387 /* remove stack frame */
389 M_AADD_IMM(stackframesize, REG_SP);
391 /* mark trace code */
396 #endif /* !defined(NDEBUG) */
399 /* emit_verbosecall_exit *******************************************************
401 Generates the code for the call trace.
403 *******************************************************************************/
406 void emit_verbosecall_exit(jitdata *jd)
417 t = m->parseddesc->returntype.type;
419 /* mark trace code */
423 /* allocate stackframe */
425 stackframesize = 96 + (1 * 8);
426 M_ASUB_IMM(stackframesize, REG_SP);
430 /* store return values in array */
432 if (IS_INT_LNG_TYPE(t)) {
433 if (IS_2_WORD_TYPE(t)) {
434 M_LST(REG_RESULT_PACKED, REG_SP, off);
436 M_IST(REG_RESULT, REG_SP, off);
439 M_DST(REG_FRESULT, REG_SP, off);
442 /* call trace_java_call_exit */
444 disp = dseg_add_address(cd, m);
445 M_ALD_DSEG(REG_A0, disp);
446 M_LDA(REG_A1, REG_SP, off);
447 disp = dseg_add_functionptr(cd, trace_java_call_exit);
448 M_ALD_DSEG(REG_ITMP2, disp);
451 /* restore return value */
453 if (IS_INT_LNG_TYPE(t)) {
454 if (IS_2_WORD_TYPE(t)) {
455 M_LLD(REG_RESULT_PACKED, REG_SP, off);
457 M_ILD(REG_RESULT, REG_SP, off);
460 M_DLD(REG_FRESULT, REG_SP, off);
463 /* remove stackframe */
465 M_AADD_IMM(stackframesize, REG_SP);
467 /* mark trace code */
471 #endif /* !defined(NDEBUG) */
474 /* emit_load_high **************************************************************
476 Emits a possible load of the high 32-bits of an operand.
478 *******************************************************************************/
480 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
486 assert(src->type == TYPE_LNG);
488 /* get required compiler data */
492 if (IS_INMEMORY(src->flags)) {
495 disp = src->vv.regoff;
497 M_ILD(tempreg, REG_SP, disp);
502 reg = GET_HIGH_REG(src->vv.regoff);
507 /* emit_load_low ***************************************************************
509 Emits a possible load of the low 32-bits of an operand.
511 *******************************************************************************/
513 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
519 assert(src->type == TYPE_LNG);
521 /* get required compiler data */
525 if (IS_INMEMORY(src->flags)) {
528 disp = src->vv.regoff;
530 M_ILD(tempreg, REG_SP, disp + 4);
535 reg = GET_LOW_REG(src->vv.regoff);
540 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
541 codegendata *cd = jd->cd;
542 s4 reg = emit_load_s1(jd, iptr, tempreg);
544 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
545 M_FMOV(reg, tempreg);
555 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
556 codegendata *cd = jd->cd;
557 s4 reg = emit_load_s2(jd, iptr, tempreg);
559 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
560 M_FMOV(reg, tempreg);
570 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
574 dst = VAROP(iptr->dst);
575 if (! IS_INMEMORY(dst->flags)) {
576 if (dst->vv.regoff != dtmpreg) {
577 if (IS_FLT_DBL_TYPE(dst->type)) {
578 M_FLTMOVE(dtmpreg, dst->vv.regoff);
579 } else if (IS_2_WORD_TYPE(dst->type)) {
580 M_LNGMOVE(dtmpreg, dst->vv.regoff);
582 M_INTMOVE(dtmpreg, dst->vv.regoff);
588 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
590 s4 branchdisp = disp;
594 if (N_VALID_BRANCH(branchdisp)) {
596 /* valid displacement */
617 case BRANCH_UNCONDITIONAL:
621 vm_abort("emit_branch: unknown condition %d", condition);
625 /* If LONGBRANCHES is not set, the flag and the error flag */
627 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
628 cd->flags |= (CODEGENDATA_FLAG_ERROR |
629 CODEGENDATA_FLAG_LONGBRANCHES);
632 /* If error flag is set, do nothing. The method has to be recompiled. */
634 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
638 /* Patch the displacement to branch over the actual branch manually
639 * to not get yet more nops.
642 branchmpc = cd->mcodeptr - cd->mcodebase;
664 case BRANCH_UNCONDITIONAL:
665 /* fall through, no displacement to patch */
669 vm_abort("emit_branch: unknown condition %d", condition);
672 /* The actual long branch */
674 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
675 M_ILD_DSEG(REG_ITMP2, disp);
676 M_AADD(REG_PV, REG_ITMP2);
677 M_JMP(RN, REG_ITMP2);
679 /* Patch back the displacement */
682 *(u4 *)ref |= (u4)((cd->mcodeptr - ref) / 2);
687 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
688 if (INSTRUCTION_MUST_CHECK(iptr)) {
690 M_BNE(SZ_BRC + SZ_ILL);
691 M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
695 /* emit_arrayindexoutofbounds_check ********************************************
697 Emit a ArrayIndexOutOfBoundsException check.
699 *******************************************************************************/
701 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
703 if (INSTRUCTION_MUST_CHECK(iptr)) {
705 * Do unsigned comparison to catch negative indexes.
707 N_CL(s2, OFFSET(java_array_t, size), RN, s1);
708 M_BLT(SZ_BRC + SZ_ILL);
709 M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
714 /* emit_arraystore_check *******************************************************
716 Emit an ArrayStoreException check.
718 *******************************************************************************/
720 void emit_arraystore_check(codegendata *cd, instruction *iptr)
722 if (INSTRUCTION_MUST_CHECK(iptr)) {
724 M_BNE(SZ_BRC + SZ_ILL);
725 M_ILL(EXCEPTION_HARDWARE_ARRAYSTORE);
730 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
731 if (INSTRUCTION_MUST_CHECK(iptr)) {
737 M_BGT(SZ_BRC + SZ_ILL);
740 M_BNE(SZ_BRC + SZ_ILL);
743 M_BLE(SZ_BRC + SZ_ILL);
746 vm_abort("emit_classcast_check: unknown condition %d", condition);
748 M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
752 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
753 if (INSTRUCTION_MUST_CHECK(iptr)) {
755 M_BNE(SZ_BRC + SZ_ILL);
756 M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
760 void emit_exception_check(codegendata *cd, instruction *iptr) {
761 if (INSTRUCTION_MUST_CHECK(iptr)) {
763 M_BNE(SZ_BRC + SZ_ILL);
764 M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
768 void emit_restore_pv(codegendata *cd) {
769 s4 offset, offset_imm;
773 disp = (s4) (cd->mcodeptr - cd->mcodebase);
774 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
777 /* If the offset from the method start does not fit into an immediate
778 * value, we can't put it into the data segment!
781 /* Displacement from start of method to here */
783 offset = (s4) (cd->mcodeptr - cd->mcodebase);
784 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
786 if (N_VALID_IMM(offset_imm)) {
787 /* Get program counter */
789 /* Substract displacement */
790 M_AADD_IMM(offset_imm, REG_PV);
792 /* Save program counter and jump over displacement in instruction flow */
793 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
794 /* Place displacement here */
795 /* REG_PV points now exactly to this position */
796 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
797 /* Substract *(REG_PV) from REG_PV */
798 N_A(REG_PV, 0, RN, REG_PV);
803 * These are local overrides for various environment variables in Emacs.
804 * Please do not remove this and leave it at the end of the file, where
805 * Emacs will automagically detect them.
806 * ---------------------------------------------------------------------
809 * indent-tabs-mode: t