1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 8260 2007-08-06 12:19:01Z michi $
34 #include "mm/memory.h"
35 #if defined(ENABLE_THREADS)
36 # include "threads/native/lock.h"
38 #include "vm/builtin.h"
39 #include "vm/exceptions.h"
40 #include "vm/global.h"
41 #include "vm/jit/abi.h"
42 #include "vm/jit/abi-asm.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/codegen-common.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/s390/codegen.h"
50 #include "vm/jit/s390/emit.h"
51 #include "vm/jit/s390/md-abi.h"
53 #include "vmcore/options.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 if (IS_2_WORD_TYPE(src->type))
78 M_DLD(tempreg, REG_SP, disp);
80 M_FLD(tempreg, REG_SP, disp);
83 if (IS_2_WORD_TYPE(src->type))
84 M_LLD(tempreg, REG_SP, disp);
86 M_ILD(tempreg, REG_SP, disp);
98 /* emit_store ******************************************************************
100 This function generates the code to store the result of an
101 operation back into a spilled pseudo-variable. If the
102 pseudo-variable has not been spilled in the first place, this
103 function will generate nothing.
105 *******************************************************************************/
107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
111 /* get required compiler data */
115 if (IS_INMEMORY(dst->flags)) {
118 if (IS_FLT_DBL_TYPE(dst->type)) {
119 if (IS_2_WORD_TYPE(dst->type))
120 M_DST(d, REG_SP, dst->vv.regoff);
122 M_FST(d, REG_SP, dst->vv.regoff);
125 if (IS_2_WORD_TYPE(dst->type))
126 M_LST(d, REG_SP, dst->vv.regoff);
128 M_IST(d, REG_SP, dst->vv.regoff);
134 /* emit_copy *******************************************************************
136 Generates a register/memory to register/memory copy.
138 *******************************************************************************/
140 void emit_copy(jitdata *jd, instruction *iptr)
147 /* get required compiler data */
151 /* get source and destination variables */
153 src = VAROP(iptr->s1);
154 dst = VAROP(iptr->dst);
156 if ((src->vv.regoff != dst->vv.regoff) ||
157 ((src->flags ^ dst->flags) & INMEMORY)) {
159 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
160 /* emit nothing, as the value won't be used anyway */
164 /* If one of the variables resides in memory, we can eliminate
165 the register move from/to the temporary register with the
166 order of getting the destination register and the load. */
168 if (IS_INMEMORY(src->flags)) {
169 if (IS_FLT_DBL_TYPE(dst->type)) {
170 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
172 if (IS_2_WORD_TYPE(dst->type)) {
173 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
175 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
178 s1 = emit_load(jd, iptr, src, d);
181 if (IS_FLT_DBL_TYPE(src->type)) {
182 s1 = emit_load(jd, iptr, src, REG_FTMP1);
184 if (IS_2_WORD_TYPE(src->type)) {
185 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
187 s1 = emit_load(jd, iptr, src, REG_ITMP1);
190 d = codegen_reg_of_var(iptr->opc, dst, s1);
194 if (IS_FLT_DBL_TYPE(src->type)) {
197 if (IS_2_WORD_TYPE(src->type)) {
205 emit_store(jd, iptr, dst, d);
209 /* emit_trap *******************************************************************
211 Emit a trap instruction and return the original machine code.
213 *******************************************************************************/
215 uint32_t emit_trap(codegendata *cd)
219 /* Get machine code which is patched back in later. The
220 trap is 2 bytes long. */
222 mcode = *((u2 *) cd->mcodeptr);
224 M_ILL(EXCEPTION_HARDWARE_PATCHER);
229 /* emit_replacement_stubs ******************************************************
231 Generates the code for the replacement stubs.
233 *******************************************************************************/
234 #if defined(ENABLE_REPLACEMENT)
235 void emit_replacement_stubs(jitdata *jd)
244 /* get required compiler data */
249 rplp = code->rplpoints;
251 /* store beginning of replacement stubs */
253 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
255 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
256 /* do not generate stubs for non-trappable points */
258 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
261 /* check code segment size */
266 savedmcodeptr = cd->mcodeptr;
269 /* create stack frame - 8-byte aligned */
271 M_ASUB_IMM(REG_SP, 2 * 4);
273 /* push address of `rplpoint` struct, will be used in asm_replacement_out */
275 disp = dseg_add_address(cd, rplp);
276 M_ALD_DSEG(REG_ITMP3, disp);
277 M_AST(REG_ITMP3, REG_SP, 0 * 4);
279 /* jump to replacement function */
281 disp = dseg_add_functionptr(cd, asm_replacement_out);
282 M_ALD_DSEG(REG_ITMP3, disp);
283 M_JMP(RN, REG_ITMP3);
285 assert((cd->mcodeptr - savedmcodeptr) <= REPLACEMENT_STUB_SIZE);
289 for (remain = REPLACEMENT_STUB_SIZE - (cd->mcodeptr - savedmcodeptr); remain > 0;) {
299 assert((cd->mcodeptr - savedmcodeptr) == REPLACEMENT_STUB_SIZE);
304 /* emit_verbosecall_enter ******************************************************
306 Generates the code for the call trace.
308 *******************************************************************************/
311 void emit_verbosecall_enter(jitdata *jd)
318 s4 stackframesize, off, foff, aoff, doff, t, iargctr, fargctr, disp;
320 /* get required compiler data */
327 /* mark trace code */
332 (6 * 8) + /* s8 on stack parameters x 6 */
333 (1 * 4) + /* methodinfo on stack parameter */
338 M_ASUB_IMM(stackframesize, REG_SP); /* allocate stackframe */
340 /* save argument registers */
342 off = (6 * 8) + (1 * 4);
344 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
345 M_IST(abi_registers_integer_argument[i], REG_SP, off);
347 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
348 M_DST(abi_registers_float_argument[i], REG_SP, off);
350 /* save temporary registers for leaf methods */
352 if (jd->isleafmethod) {
353 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
354 M_LST(abi_registers_integer_temporary[i], REG_SP, off);
356 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
357 M_DST(abi_registers_float_temporary[i], REG_SP, off);
360 /* Load arguments to new locations */
362 /* First move all arguments to stack
367 * (s8) a1 \ Auxilliary stack frame
372 M_ASUB_IMM(2 * 8, REG_SP);
374 /* offset to where first integer arg is saved on stack */
375 off = (2 * 8) + (6 * 8) + (1 * 4);
376 /* offset to where first float arg is saved on stack */
377 foff = off + (INT_ARG_CNT * 8);
378 /* offset to where first argument is passed on stack */
379 aoff = (2 * 8) + stackframesize + (cd->stackframesize * 4);
380 /* offset to destination on stack */
383 iargctr = fargctr = 0;
385 ICONST(REG_ITMP1, 0);
387 for (i = 0; i < md->paramcount && i < 8; i++) {
388 t = md->paramtypes[i].type;
390 M_IST(REG_ITMP1, REG_SP, doff);
391 M_IST(REG_ITMP1, REG_SP, doff + 4);
393 if (IS_FLT_DBL_TYPE(t)) {
394 if (fargctr < 2) { /* passed in register */
395 N_STD(abi_registers_float_argument[fargctr], doff, RN, REG_SP);
397 } else { /* passed on stack */
398 if (IS_2_WORD_TYPE(t)) {
399 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
402 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
407 if (IS_2_WORD_TYPE(t)) {
408 if (iargctr < 4) { /* passed in 2 registers */
409 N_STM(REG_A0 + iargctr, REG_A0 + iargctr + 1, doff, REG_SP);
411 } else { /* passed on stack */
412 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
416 if (iargctr < 5) { /* passed in register */
417 N_ST(REG_A0 + iargctr, doff + 4, RN, REG_SP);
419 } else { /* passed on stack */
420 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
429 /* Now move a0 and a1 to registers
439 N_LM(REG_A0, REG_A1, 0, REG_SP);
440 N_LM(REG_A2, REG_A3, 8, REG_SP);
442 M_AADD_IMM(2 * 8, REG_SP);
444 /* Finally load methodinfo argument */
446 disp = dseg_add_address(cd, m);
447 M_ALD_DSEG(REG_ITMP2, disp);
448 M_AST(REG_ITMP2, REG_SP, 6 * 8);
450 /* Call builtin_verbosecall_enter */
452 disp = dseg_add_address(cd, builtin_verbosecall_enter);
453 M_ALD_DSEG(REG_ITMP2, disp);
454 M_ASUB_IMM(96, REG_SP);
456 M_AADD_IMM(96, REG_SP);
458 /* restore argument registers */
460 off = (6 * 8) + (1 * 4);
462 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
463 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
465 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
466 M_DLD(abi_registers_float_argument[i], REG_SP, off);
468 /* restore temporary registers for leaf methods */
470 if (jd->isleafmethod) {
471 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
472 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
474 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
475 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
478 /* remove stackframe */
480 M_AADD_IMM(stackframesize, REG_SP);
482 /* mark trace code */
486 #endif /* !defined(NDEBUG) */
489 /* emit_verbosecall_exit *******************************************************
491 Generates the code for the call trace.
493 *******************************************************************************/
496 void emit_verbosecall_exit(jitdata *jd)
503 /* get required compiler data */
509 /* mark trace code */
513 M_ASUB_IMM(2 * 8, REG_SP);
515 N_STM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
516 M_DST(REG_FRESULT, REG_SP, 1 * 8);
518 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type)) {
519 /* (REG_A0, REG_A1) == (REG_RESULT, REG_RESULT2), se no need to move */
521 M_INTMOVE(REG_RESULT, REG_A1);
525 disp = dseg_add_address(cd, m);
526 M_ALD_DSEG(REG_A2, disp);
528 /* REG_FRESULT is REG_FA0, so no need to move */
529 M_FLTMOVE(REG_FRESULT, REG_FA1);
531 disp = dseg_add_address(cd, builtin_verbosecall_exit);
532 M_ALD_DSEG(REG_ITMP1, disp);
533 M_ASUB_IMM(96, REG_SP);
535 M_AADD_IMM(96, REG_SP);
537 N_LM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
538 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
540 M_AADD_IMM(2 * 8, REG_SP);
542 /* mark trace code */
546 #endif /* !defined(NDEBUG) */
549 /* emit_load_high **************************************************************
551 Emits a possible load of the high 32-bits of an operand.
553 *******************************************************************************/
555 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
561 assert(src->type == TYPE_LNG);
563 /* get required compiler data */
567 if (IS_INMEMORY(src->flags)) {
570 disp = src->vv.regoff;
572 M_ILD(tempreg, REG_SP, disp);
577 reg = GET_HIGH_REG(src->vv.regoff);
582 /* emit_load_low ***************************************************************
584 Emits a possible load of the low 32-bits of an operand.
586 *******************************************************************************/
588 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
594 assert(src->type == TYPE_LNG);
596 /* get required compiler data */
600 if (IS_INMEMORY(src->flags)) {
603 disp = src->vv.regoff;
605 M_ILD(tempreg, REG_SP, disp + 4);
610 reg = GET_LOW_REG(src->vv.regoff);
615 s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
616 codegendata *cd = jd->cd;
617 s4 reg = emit_load_s1(jd, iptr, tempreg);
626 s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
627 codegendata *cd = jd->cd;
628 s4 reg = emit_load_s2(jd, iptr, tempreg);
630 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
631 M_FMOV(reg, tempreg);
641 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
642 codegendata *cd = jd->cd;
643 s4 reg = emit_load_s1(jd, iptr, tempreg);
645 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
646 M_FMOV(reg, tempreg);
656 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
657 codegendata *cd = jd->cd;
658 s4 reg = emit_load_s2(jd, iptr, tempreg);
660 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
661 M_FMOV(reg, tempreg);
671 s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
682 * (r12, r13) Illegal, because r13 is PV
683 * (r14, r15) Illegal, because r15 is SP
687 dst = VAROP(iptr->dst);
689 if (IS_INMEMORY(dst->flags)) {
690 if (! IS_REG_ITMP(ltmpreg)) {
691 M_INTMOVE(ltmpreg, breg);
693 if (! IS_REG_ITMP(htmpreg)) {
694 M_INTMOVE(htmpreg, breg);
696 return PACK_REGS(ltmpreg, htmpreg);
698 hr = GET_HIGH_REG(dst->vv.regoff);
699 lr = GET_LOW_REG(dst->vv.regoff);
700 if (((hr % 2) == 0) && lr == (hr + 1)) {
701 /* the result is already in a even-odd pair */
702 return dst->vv.regoff;
703 } else if (((hr % 2) == 0) && (hr < R12)) {
704 /* the high register is at a even position */
705 M_INTMOVE(hr + 1, breg);
706 return PACK_REGS(hr + 1, hr);
707 } else if (((lr % 2) == 1) && (lr < R12)) {
708 /* the low register is at a odd position */
709 M_INTMOVE(lr - 1, breg);
710 return PACK_REGS(lr, lr - 1);
712 /* no way to create an even-odd pair by 1 copy operation,
713 * Use the temporary register pair.
715 if (! IS_REG_ITMP(ltmpreg)) {
716 M_INTMOVE(ltmpreg, breg);
718 if (! IS_REG_ITMP(htmpreg)) {
719 M_INTMOVE(htmpreg, breg);
721 return PACK_REGS(ltmpreg, htmpreg);
726 void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
732 dst = VAROP(iptr->dst);
734 if (IS_INMEMORY(dst->flags)) {
735 if (! IS_REG_ITMP(ltmpreg)) {
736 M_INTMOVE(breg, ltmpreg);
738 if (! IS_REG_ITMP(htmpreg)) {
739 M_INTMOVE(breg, htmpreg);
742 hr = GET_HIGH_REG(dst->vv.regoff);
743 lr = GET_LOW_REG(dst->vv.regoff);
744 if (((hr % 2) == 0) && lr == (hr + 1)) {
746 } else if (((hr % 2) == 0) && (hr < R12)) {
747 M_INTMOVE(breg, hr + 1);
748 } else if (((lr % 2) == 1) && (lr < R12)) {
749 M_INTMOVE(breg, lr - 1);
751 if (! IS_REG_ITMP(ltmpreg)) {
752 M_INTMOVE(breg, ltmpreg);
754 if (! IS_REG_ITMP(htmpreg)) {
755 M_INTMOVE(breg, htmpreg);
761 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
765 dst = VAROP(iptr->dst);
766 if (! IS_INMEMORY(dst->flags)) {
767 if (dst->vv.regoff != dtmpreg) {
768 if (IS_FLT_DBL_TYPE(dst->type)) {
769 M_FLTMOVE(dtmpreg, dst->vv.regoff);
770 } else if (IS_2_WORD_TYPE(dst->type)) {
771 M_LNGMOVE(dtmpreg, dst->vv.regoff);
773 M_INTMOVE(dtmpreg, dst->vv.regoff);
779 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
781 s4 branchdisp = disp;
785 if (N_VALID_BRANCH(branchdisp)) {
787 /* valid displacement */
808 case BRANCH_UNCONDITIONAL:
812 vm_abort("emit_branch: unknown condition %d", condition);
816 /* If LONGBRANCHES is not set, the flag and the error flag */
818 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
819 cd->flags |= (CODEGENDATA_FLAG_ERROR |
820 CODEGENDATA_FLAG_LONGBRANCHES);
823 /* If error flag is set, do nothing. The method has to be recompiled. */
825 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
829 /* Patch the displacement to branch over the actual branch manually
830 * to not get yet more nops.
833 branchmpc = cd->mcodeptr - cd->mcodebase;
855 case BRANCH_UNCONDITIONAL:
856 /* fall through, no displacement to patch */
860 vm_abort("emit_branch: unknown condition %d", condition);
863 /* The actual long branch */
865 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
866 M_ILD_DSEG(REG_ITMP3, disp);
867 M_AADD(REG_PV, REG_ITMP3);
868 M_JMP(RN, REG_ITMP3);
870 /* Patch back the displacement */
873 *(u4 *)ref |= (u4)((cd->mcodeptr - ref) / 2);
878 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
879 if (INSTRUCTION_MUST_CHECK(iptr)) {
881 M_BNE(SZ_BRC + SZ_ILL);
882 M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
886 /* emit_arrayindexoutofbounds_check ********************************************
888 Emit a ArrayIndexOutOfBoundsException check.
890 *******************************************************************************/
892 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
894 if (INSTRUCTION_MUST_CHECK(iptr)) {
896 * Do unsigned comparison to catch negative indexes.
898 N_CL(s2, OFFSET(java_arrayheader, size), RN, s1);
899 M_BLT(SZ_BRC + SZ_ILL);
900 M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
904 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
905 if (INSTRUCTION_MUST_CHECK(iptr)) {
911 M_BGT(SZ_BRC + SZ_ILL);
914 M_BNE(SZ_BRC + SZ_ILL);
917 M_BLE(SZ_BRC + SZ_ILL);
920 vm_abort("emit_classcast_check: unknown condition %d", condition);
922 M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
926 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
927 if (INSTRUCTION_MUST_CHECK(iptr)) {
929 M_BNE(SZ_BRC + SZ_ILL);
930 M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
934 void emit_exception_check(codegendata *cd, instruction *iptr) {
935 if (INSTRUCTION_MUST_CHECK(iptr)) {
937 M_BNE(SZ_BRC + SZ_ILL);
938 M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
942 void emit_restore_pv(codegendata *cd) {
943 s4 offset, offset_imm;
947 disp = (s4) (cd->mcodeptr - cd->mcodebase);
948 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
951 /* If the offset from the method start does not fit into an immediate
952 * value, we can't put it into the data segment!
955 /* Displacement from start of method to here */
957 offset = (s4) (cd->mcodeptr - cd->mcodebase);
958 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
960 if (N_VALID_IMM(offset_imm)) {
961 /* Get program counter */
963 /* Substract displacement */
964 M_AADD_IMM(offset_imm, REG_PV);
966 /* Save program counter and jump over displacement in instruction flow */
967 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
968 /* Place displacement here */
969 /* REG_PV points now exactly to this position */
970 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
971 /* Substract *(REG_PV) from REG_PV */
972 N_A(REG_PV, 0, RN, REG_PV);
977 * These are local overrides for various environment variables in Emacs.
978 * Please do not remove this and leave it at the end of the file, where
979 * Emacs will automagically detect them.
980 * ---------------------------------------------------------------------
983 * indent-tabs-mode: t