1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
30 #include "vm/jit/s390/codegen.h"
31 #include "vm/jit/s390/emit.h"
32 #include "vm/jit/s390/md-abi.h"
34 #include "mm/memory.hpp"
36 #include "threads/lock.hpp"
38 #include "vm/jit/builtin.hpp"
39 #include "vm/global.h"
41 #include "vm/options.h"
43 #include "vm/jit/abi.h"
44 #include "vm/jit/abi-asm.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/codegen-common.hpp"
47 #include "vm/jit/emit-common.hpp"
48 #include "vm/jit/jit.hpp"
49 #include "vm/jit/patcher-common.hpp"
50 #include "vm/jit/replace.hpp"
51 #include "vm/jit/trace.hpp"
52 #include "vm/jit/trap.hpp"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 if (IS_2_WORD_TYPE(src->type))
78 M_DLD(tempreg, REG_SP, disp);
80 M_FLD(tempreg, REG_SP, disp);
83 if (IS_2_WORD_TYPE(src->type))
84 M_LLD(tempreg, REG_SP, disp);
86 M_ILD(tempreg, REG_SP, disp);
98 /* emit_store ******************************************************************
100 This function generates the code to store the result of an
101 operation back into a spilled pseudo-variable. If the
102 pseudo-variable has not been spilled in the first place, this
103 function will generate nothing.
105 *******************************************************************************/
107 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
111 /* get required compiler data */
115 if (IS_INMEMORY(dst->flags)) {
118 if (IS_FLT_DBL_TYPE(dst->type)) {
119 if (IS_2_WORD_TYPE(dst->type))
120 M_DST(d, REG_SP, dst->vv.regoff);
122 M_FST(d, REG_SP, dst->vv.regoff);
125 if (IS_2_WORD_TYPE(dst->type))
126 M_LST(d, REG_SP, dst->vv.regoff);
128 M_IST(d, REG_SP, dst->vv.regoff);
134 /* emit_copy *******************************************************************
136 Generates a register/memory to register/memory copy.
138 *******************************************************************************/
140 void emit_copy(jitdata *jd, instruction *iptr)
147 /* get required compiler data */
151 /* get source and destination variables */
153 src = VAROP(iptr->s1);
154 dst = VAROP(iptr->dst);
156 if ((src->vv.regoff != dst->vv.regoff) ||
157 ((src->flags ^ dst->flags) & INMEMORY)) {
159 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
160 /* emit nothing, as the value won't be used anyway */
164 if (IS_INMEMORY(src->flags) && IS_INMEMORY(dst->flags)) {
165 if (IS_2_WORD_TYPE(src->type)) {
166 N_MVC(dst->vv.regoff, 8, REG_SP, src->vv.regoff, REG_SP);
168 N_MVC(dst->vv.regoff, 4, REG_SP, src->vv.regoff, REG_SP);
172 /* If one of the variables resides in memory, we can eliminate
173 the register move from/to the temporary register with the
174 order of getting the destination register and the load. */
176 if (IS_INMEMORY(src->flags)) {
177 if (IS_FLT_DBL_TYPE(dst->type)) {
178 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
180 if (IS_2_WORD_TYPE(dst->type)) {
181 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
183 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
186 s1 = emit_load(jd, iptr, src, d);
189 if (IS_FLT_DBL_TYPE(src->type)) {
190 s1 = emit_load(jd, iptr, src, REG_FTMP1);
192 if (IS_2_WORD_TYPE(src->type)) {
193 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
195 s1 = emit_load(jd, iptr, src, REG_ITMP1);
198 d = codegen_reg_of_var(iptr->opc, dst, s1);
202 if (IS_FLT_DBL_TYPE(src->type)) {
205 if (IS_2_WORD_TYPE(src->type)) {
213 emit_store(jd, iptr, dst, d);
220 * Emits code updating the condition register by comparing one integer
221 * register to an immediate integer value.
223 void emit_icmp_imm(codegendata* cd, int reg, int32_t value)
227 if (N_VALID_IMM(value)) {
228 M_ICMP_IMM(reg, value);
230 disp = dseg_add_s4(cd, iptr->sx.val.i);
231 if (N_VALID_DSEG_DISP(disp)) {
232 N_C(s1, N_DSEG_DISP(disp), RN, REG_PV);
234 assert(reg != REG_ITMP2);
235 ICONST(REG_ITMP2, disp);
236 N_C(s1, -N_PV_OFFSET, REG_ITMP2, REG_PV);
242 /* emit_trap *******************************************************************
244 Emit a trap instruction and return the original machine code.
246 *******************************************************************************/
248 uint32_t emit_trap(codegendata *cd)
252 /* Get machine code which is patched back in later. The
253 trap is 2 bytes long. */
255 mcode = *((u2 *) cd->mcodeptr);
264 * Generates synchronization code to enter a monitor.
266 #if defined(ENABLE_THREADS)
267 void emit_monitor_enter(jitdata* jd, int32_t syncslot_offset)
272 // Get required compiler data.
273 methodinfo* m = jd->m;
274 codegendata* cd = jd->cd;
277 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
278 M_ASUB_IMM((INT_ARG_CNT + FLT_ARG_CNT) * 8, REG_SP);
280 for (p = 0; p < INT_ARG_CNT; p++)
281 M_IST(abi_registers_integer_argument[p], REG_SP, p * 8);
283 for (p = 0; p < FLT_ARG_CNT; p++)
284 M_DST(abi_registers_float_argument[p], REG_SP, (INT_ARG_CNT + p) * 8);
286 syncslot_offset += (INT_ARG_CNT + FLT_ARG_CNT) * 8;
290 /* decide which monitor enter function to call */
292 if (m->flags & ACC_STATIC) {
293 disp = dseg_add_address(cd, &m->clazz->object.header);
294 M_ALD_DSEG(REG_A0, disp);
298 M_BNE(SZ_BRC + SZ_ILL);
299 M_ILL(TRAP_NullPointerException);
302 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
303 M_ALD_DSEG(REG_ITMP2, disp);
305 M_AST(REG_A0, REG_SP, syncslot_offset);
307 M_ASUB_IMM(96, REG_SP);
309 M_AADD_IMM(96, REG_SP);
312 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
313 for (p = 0; p < INT_ARG_CNT; p++)
314 M_ILD(abi_registers_integer_argument[p], REG_SP, p * 8);
316 for (p = 0; p < FLT_ARG_CNT; p++)
317 M_DLD(abi_registers_float_argument[p], REG_SP, (INT_ARG_CNT + p) * 8);
319 M_AADD_IMM((INT_ARG_CNT + FLT_ARG_CNT) * 8, REG_SP);
327 * Generates synchronization code to leave a monitor.
329 #if defined(ENABLE_THREADS)
330 void emit_monitor_exit(jitdata* jd, int32_t syncslot_offset)
334 // Get required compiler data.
335 methodinfo* m = jd->m;
336 codegendata* cd = jd->cd;
338 /* we need to save the proper return value */
340 methoddesc* md = m->parseddesc;
342 switch (md->returntype.type) {
344 M_IST(REG_RESULT2, REG_SP, syncslot_offset + 8 + 4);
348 M_IST(REG_RESULT , REG_SP, syncslot_offset + 8);
351 M_FST(REG_FRESULT, REG_SP, syncslot_offset + 8);
354 M_DST(REG_FRESULT, REG_SP, syncslot_offset + 8);
358 M_ALD(REG_A0, REG_SP, syncslot_offset);
360 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
361 M_ALD_DSEG(REG_ITMP2, disp);
363 M_ASUB_IMM(96, REG_SP);
365 M_AADD_IMM(96, REG_SP);
367 /* and now restore the proper return value */
369 switch (md->returntype.type) {
371 M_ILD(REG_RESULT2, REG_SP, syncslot_offset + 8 + 4);
375 M_ILD(REG_RESULT , REG_SP, syncslot_offset + 8);
378 M_FLD(REG_FRESULT, REG_SP, syncslot_offset + 8);
381 M_DLD(REG_FRESULT, REG_SP, syncslot_offset + 8);
389 * Emit profiling code for method frequency counting.
391 #if defined(ENABLE_PROFILING)
392 void emit_profile_method(codegendata* cd, codeinfo* code)
394 M_ALD_DSEG(REG_ITMP1, CodeinfoPointer);
395 ICONST(REG_ITMP2, 1);
396 N_AL(REG_ITMP2, OFFSET(codeinfo, frequency), RN, REG_ITMP1);
397 M_IST(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
403 * Emit profiling code for basicblock frequency counting.
405 #if defined(ENABLE_PROFILING)
406 void emit_profile_basicblock(codegendata* cd, codeinfo* code, basicblock* bptr)
408 M_ALD_DSEG(REG_ITMP1, CodeinfoPointer);
409 M_ALD(REG_ITMP1, REG_ITMP1, OFFSET(codeinfo, bbfrequency));
410 ICONST(REG_ITMP2, 1);
411 N_AL(REG_ITMP2, bptr->nr * 4, RN, REG_ITMP1);
412 M_IST(REG_ITMP2, REG_ITMP1, bptr->nr * 4);
418 * Emit profiling code to start CPU cycle counting.
420 #if defined(ENABLE_PROFILING)
421 void emit_profile_cycle_start(codegendata* cd, codeinfo* code)
423 // XXX Not implemented yet!
429 * Emit profiling code to stop CPU cycle counting.
431 #if defined(ENABLE_PROFILING)
432 void emit_profile_cycle_stop(codegendata* cd, codeinfo* code)
434 // XXX Not implemented yet!
439 /* emit_verbosecall_enter ******************************************************
441 Generates the code for the call trace.
443 *******************************************************************************/
446 void emit_verbosecall_enter(jitdata *jd)
461 /* mark trace code */
465 /* allocate stack frame */
467 stackframesize = 96 + (md->paramcount * 8);
469 /* for leaf methods we need to store unused argument and temporary registers */
471 if (code_is_leafmethod(code)) {
472 stackframesize += (ARG_CNT + TMP_CNT) * 8;
475 /* allocate stack frame */
477 M_ASUB_IMM(stackframesize, REG_SP);
479 /* store argument registers in array */
483 for (i = 0; i < md->paramcount; i++) {
484 if (! md->params[i].inmemory) {
485 s = md->params[i].regoff;
486 switch (md->paramtypes[i].type) {
489 M_IST(s, REG_SP, off);
492 M_LST(s, REG_SP, off);
495 M_FST(s, REG_SP, off);
498 M_DST(s, REG_SP, off);
505 /* save unused (currently all) argument registers for leaf methods */
506 /* save temporary registers for leaf methods */
508 if (code_is_leafmethod(code)) {
510 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
511 M_IST(abi_registers_integer_argument[i], REG_SP, off);
514 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
515 M_DST(abi_registers_float_argument[i], REG_SP, off);
518 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
519 M_IST(abi_registers_integer_temporary[i], REG_SP, off);
522 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
523 M_DST(abi_registers_float_temporary[i], REG_SP, off);
527 /* load arguments for trace_java_call_enter */
531 disp = dseg_add_address(cd, m);
532 M_ALD_DSEG(REG_A0, disp);
533 /* pointer to argument registers array */
534 M_LDA(REG_A1, REG_SP, 96);
535 /* pointer to on stack arguments */
536 M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8));
538 /* call trace_java_call_enter */
540 disp = dseg_add_functionptr(cd, trace_java_call_enter);
541 M_ALD_DSEG(REG_ITMP2, disp);
544 /* restore used argument registers */
545 /* for leaf methods restore all argument and temporary registers */
547 if (code_is_leafmethod(code)) {
548 off = 96 + (8 * md->paramcount);
550 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
551 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
554 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
555 M_DLD(abi_registers_float_argument[i], REG_SP, off);
558 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
559 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
562 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
563 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
568 for (i = 0; i < md->paramcount; i++) {
569 if (! md->params[i].inmemory) {
570 s = md->params[i].regoff;
571 switch (md->paramtypes[i].type) {
574 M_ILD(s, REG_SP, off);
577 M_LLD(s, REG_SP, off);
580 M_FLD(s, REG_SP, off);
583 M_DLD(s, REG_SP, off);
591 /* remove stack frame */
593 M_AADD_IMM(stackframesize, REG_SP);
595 /* mark trace code */
600 #endif /* !defined(NDEBUG) */
603 /* emit_verbosecall_exit *******************************************************
605 Generates the code for the call trace.
607 *******************************************************************************/
610 void emit_verbosecall_exit(jitdata *jd)
621 t = m->parseddesc->returntype.type;
623 /* mark trace code */
627 /* allocate stackframe */
629 stackframesize = 96 + (1 * 8);
630 M_ASUB_IMM(stackframesize, REG_SP);
634 /* store return values in array */
636 if (IS_INT_LNG_TYPE(t)) {
637 if (IS_2_WORD_TYPE(t)) {
638 M_LST(REG_RESULT_PACKED, REG_SP, off);
640 M_IST(REG_RESULT, REG_SP, off);
643 M_DST(REG_FRESULT, REG_SP, off);
646 /* call trace_java_call_exit */
648 disp = dseg_add_address(cd, m);
649 M_ALD_DSEG(REG_A0, disp);
650 M_LDA(REG_A1, REG_SP, off);
651 disp = dseg_add_functionptr(cd, trace_java_call_exit);
652 M_ALD_DSEG(REG_ITMP2, disp);
655 /* restore return value */
657 if (IS_INT_LNG_TYPE(t)) {
658 if (IS_2_WORD_TYPE(t)) {
659 M_LLD(REG_RESULT_PACKED, REG_SP, off);
661 M_ILD(REG_RESULT, REG_SP, off);
664 M_DLD(REG_FRESULT, REG_SP, off);
667 /* remove stackframe */
669 M_AADD_IMM(stackframesize, REG_SP);
671 /* mark trace code */
675 #endif /* !defined(NDEBUG) */
678 /* emit_load_high **************************************************************
680 Emits a possible load of the high 32-bits of an operand.
682 *******************************************************************************/
684 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
690 assert(src->type == TYPE_LNG);
692 /* get required compiler data */
696 if (IS_INMEMORY(src->flags)) {
699 disp = src->vv.regoff;
701 M_ILD(tempreg, REG_SP, disp);
706 reg = GET_HIGH_REG(src->vv.regoff);
711 /* emit_load_low ***************************************************************
713 Emits a possible load of the low 32-bits of an operand.
715 *******************************************************************************/
717 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
723 assert(src->type == TYPE_LNG);
725 /* get required compiler data */
729 if (IS_INMEMORY(src->flags)) {
732 disp = src->vv.regoff;
734 M_ILD(tempreg, REG_SP, disp + 4);
739 reg = GET_LOW_REG(src->vv.regoff);
744 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
745 codegendata *cd = jd->cd;
746 s4 reg = emit_load_s1(jd, iptr, tempreg);
748 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
749 M_FMOV(reg, tempreg);
759 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
760 codegendata *cd = jd->cd;
761 s4 reg = emit_load_s2(jd, iptr, tempreg);
763 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
764 M_FMOV(reg, tempreg);
774 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
778 dst = VAROP(iptr->dst);
779 if (! IS_INMEMORY(dst->flags)) {
780 if (dst->vv.regoff != dtmpreg) {
781 if (IS_FLT_DBL_TYPE(dst->type)) {
782 M_FLTMOVE(dtmpreg, dst->vv.regoff);
783 } else if (IS_2_WORD_TYPE(dst->type)) {
784 M_LNGMOVE(dtmpreg, dst->vv.regoff);
786 M_INTMOVE(dtmpreg, dst->vv.regoff);
792 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
794 s4 branchdisp = disp;
798 if (N_VALID_BRANCH(branchdisp)) {
800 /* valid displacement */
821 case BRANCH_UNCONDITIONAL:
825 vm_abort("emit_branch: unknown condition %d", condition);
829 /* If LONGBRANCHES is not set, the flag and the error flag */
831 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
832 cd->flags |= (CODEGENDATA_FLAG_ERROR |
833 CODEGENDATA_FLAG_LONGBRANCHES);
836 /* If error flag is set, do nothing. The method has to be recompiled. */
838 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
842 /* Patch the displacement to branch over the actual branch manually
843 * to not get yet more nops.
846 branchmpc = cd->mcodeptr - cd->mcodebase;
868 case BRANCH_UNCONDITIONAL:
869 /* fall through, no displacement to patch */
873 vm_abort("emit_branch: unknown condition %d", condition);
876 /* The actual long branch */
878 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
879 M_ILD_DSEG(REG_ITMP2, disp);
880 M_AADD(REG_PV, REG_ITMP2);
881 M_JMP(RN, REG_ITMP2);
883 /* Patch back the displacement */
885 N_BRC_BACK_PATCH(ref);
889 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
891 if (INSTRUCTION_MUST_CHECK(iptr)) {
893 M_BNE(SZ_BRC + SZ_ILL);
894 M_ILL(TRAP_ArithmeticException);
898 /* emit_arrayindexoutofbounds_check ********************************************
900 Emit a ArrayIndexOutOfBoundsException check.
902 *******************************************************************************/
904 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
906 if (INSTRUCTION_MUST_CHECK(iptr)) {
908 * Do unsigned comparison to catch negative indexes.
910 N_CL(s2, OFFSET(java_array_t, size), RN, s1);
911 M_BLT(SZ_BRC + SZ_ILL);
912 M_ILL2(s2, TRAP_ArrayIndexOutOfBoundsException);
917 /* emit_arraystore_check *******************************************************
919 Emit an ArrayStoreException check.
921 *******************************************************************************/
923 void emit_arraystore_check(codegendata *cd, instruction *iptr)
925 if (INSTRUCTION_MUST_CHECK(iptr)) {
927 M_BNE(SZ_BRC + SZ_ILL);
928 M_ILL(TRAP_ArrayStoreException);
933 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
934 if (INSTRUCTION_MUST_CHECK(iptr)) {
940 M_BGT(SZ_BRC + SZ_ILL);
943 M_BNE(SZ_BRC + SZ_ILL);
946 M_BLE(SZ_BRC + SZ_ILL);
949 vm_abort("emit_classcast_check: unknown condition %d", condition);
951 M_ILL2(s1, TRAP_ClassCastException);
955 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
957 if (INSTRUCTION_MUST_CHECK(iptr)) {
959 M_BNE(SZ_BRC + SZ_ILL);
960 M_ILL(TRAP_NullPointerException);
964 void emit_exception_check(codegendata *cd, instruction *iptr)
966 if (INSTRUCTION_MUST_CHECK(iptr)) {
968 M_BNE(SZ_BRC + SZ_ILL);
969 M_ILL(TRAP_CHECK_EXCEPTION);
973 void emit_recompute_pv(codegendata *cd) {
974 s4 offset, offset_imm;
978 disp = (s4) (cd->mcodeptr - cd->mcodebase);
979 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
982 /* If the offset from the method start does not fit into an immediate
983 * value, we can't put it into the data segment!
986 /* Displacement from start of method to here */
988 offset = (s4) (cd->mcodeptr - cd->mcodebase);
989 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
991 if (N_VALID_IMM(offset_imm)) {
992 /* Get program counter */
994 /* Substract displacement */
995 M_AADD_IMM(offset_imm, REG_PV);
997 /* Save program counter and jump over displacement in instruction flow */
998 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
999 /* Place displacement here */
1000 /* REG_PV points now exactly to this position */
1001 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
1002 /* Substract *(REG_PV) from REG_PV */
1003 N_A(REG_PV, 0, RN, REG_PV);
1007 /* emit_trap_compiler **********************************************************
1009 Emit a trap instruction which calls the JIT compiler.
1011 *******************************************************************************/
1013 void emit_trap_compiler(codegendata *cd)
1015 M_ILL2(REG_METHODPTR, TRAP_COMPILER);
1019 * These are local overrides for various environment variables in Emacs.
1020 * Please do not remove this and leave it at the end of the file, where
1021 * Emacs will automagically detect them.
1022 * ---------------------------------------------------------------------
1025 * indent-tabs-mode: t