1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "mm/memory.h"
39 #include "vm/jit/powerpc64/codegen.h"
41 #include "threads/lock-common.h"
43 #include "vm/builtin.h"
44 #include "vm/exceptions.h"
47 #include "vm/jit/abi.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
52 #include "vmcore/options.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (src->flags & INMEMORY) {
74 disp = src->vv.regoff;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 M_DLD(tempreg, REG_SP, disp);
80 M_LLD(tempreg, REG_SP, disp);
92 /* emit_store ******************************************************************
94 Emits a possible store to a variable.
96 *******************************************************************************/
98 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
102 /* get required compiler data */
106 if (dst->flags & INMEMORY) {
109 if (IS_FLT_DBL_TYPE(dst->type)) {
110 M_DST(d, REG_SP, dst->vv.regoff);
113 M_LST(d, REG_SP, dst->vv.regoff);
119 /* emit_copy *******************************************************************
121 Generates a register/memory to register/memory copy.
123 *******************************************************************************/
125 void emit_copy(jitdata *jd, instruction *iptr)
132 /* get required compiler data */
136 /* get source and destination variables */
138 src = VAROP(iptr->s1);
139 dst = VAROP(iptr->dst);
141 if ((src->vv.regoff != dst->vv.regoff) ||
142 ((src->flags ^ dst->flags) & INMEMORY)) {
144 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
145 /* emit nothing, as the value won't be used anyway */
149 /* If one of the variables resides in memory, we can eliminate
150 the register move from/to the temporary register with the
151 order of getting the destination register and the load. */
153 if (IS_INMEMORY(src->flags)) {
154 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
155 s1 = emit_load(jd, iptr, src, d);
158 s1 = emit_load(jd, iptr, src, REG_IFTMP);
159 d = codegen_reg_of_var(iptr->opc, dst, s1);
163 if (IS_FLT_DBL_TYPE(src->type))
169 emit_store(jd, iptr, dst, d);
174 /* emit_iconst *****************************************************************
178 *******************************************************************************/
180 void emit_iconst(codegendata *cd, s4 d, s4 value)
184 if ((value >= -32768) && (value <= 32767)) {
185 M_LDA_INTERN(d, REG_ZERO, value);
187 disp = dseg_add_s4(cd, value);
188 M_ILD(d, REG_PV, disp);
192 void emit_lconst(codegendata *cd, s4 d, s8 value)
195 if ((value >= -32768) && (value <= 32767)) {
196 M_LDA_INTERN(d, REG_ZERO, value);
198 disp = dseg_add_s8(cd, value);
199 M_LLD(d, REG_PV, disp);
204 /* emit_verbosecall_enter ******************************************************
206 Generates the code for the call trace.
208 *******************************************************************************/
211 void emit_verbosecall_enter(jitdata *jd)
220 /* get required compiler data */
228 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
232 /* setup stack for TRACE_ARGS_NUM registers */
233 /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
235 /* in nativestubs no Place to save the LR (Link Register) would be needed */
236 /* but since the stack frame has to be aligned the 4 Bytes would have to */
237 /* be padded again */
239 #if defined(__DARWIN__)
240 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
242 stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
245 /* mark trace code */
249 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
250 M_STDU(REG_SP, REG_SP, -stack_size);
252 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
253 t = md->paramtypes[p].type;
254 if (IS_INT_LNG_TYPE(t)) {
255 if (!md->params[p].inmemory) { /* Param in Arg Reg */
256 M_LST(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
257 } else { /* Param on Stack */
258 s1 = md->params[p].regoff + cd->stackframesize * 8 + stack_size;
259 M_LLD(REG_ITMP2, REG_SP, s1);
260 M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
262 } else { /* IS_FLT_DBL_TYPE(t) */
263 if (!md->params[p].inmemory) { /* in Arg Reg */
264 s1 = md->params[p].regoff;
265 M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
266 } else { /* on Stack */
267 /* this should not happen */
273 #if defined(__DARWIN__)
274 #warning "emit_verbosecall_enter not implemented"
277 /* Set integer and float argument registers for trace_args call */
278 /* offset to saved integer argument registers */
279 for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
280 t = md->paramtypes[p].type;
281 if (IS_INT_LNG_TYPE(t)) {
282 M_LLD(abi_registers_integer_argument[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
283 } else { /* Float/Dbl */
284 if (!md->params[p].inmemory) { /* Param in Arg Reg */
285 /* use reserved Place on Stack (sp + 5 * 16) to copy */
286 /* float/double arg reg to int reg */
287 s1 = md->params[p].regoff;
288 M_MOV(s1, abi_registers_integer_argument[p]);
296 /* put methodinfo pointer on Stackframe */
297 p = dseg_add_address(cd, m);
298 M_ALD(REG_ITMP1, REG_PV, p);
299 #if defined(__DARWIN__)
300 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
302 if (TRACE_ARGS_NUM == 8) {
303 /* need to pass via stack */
304 M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
306 /* pass via register, reg 3 is the first */
307 M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
310 /* call via function descriptor */
311 /* XXX: what about TOC? */
312 p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
313 M_ALD(REG_ITMP2, REG_PV, p);
314 M_ALD(REG_ITMP1, REG_ITMP2, 0);
318 #if defined(__DARWIN__)
319 #warning "emit_verbosecall_enter not implemented"
322 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
323 t = md->paramtypes[p].type;
324 if (IS_INT_LNG_TYPE(t)) {
325 if (!md->params[p].inmemory) { /* Param in Arg Reg */
326 /* restore integer argument registers */
327 M_LLD(abi_registers_integer_argument[p], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
329 assert(0); /* TODO: implement this */
331 } else { /* FLT/DBL */
332 if (!md->params[p].inmemory) { /* Param in Arg Reg */
333 M_DLD(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
335 assert(0); /* this shoudl never happen */
341 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
343 M_LDA(REG_SP, REG_SP, stack_size);
345 /* mark trace code */
351 /* emit_verbosecall_exit ******************************************************
353 Generates the code for the call trace.
355 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
357 *******************************************************************************/
360 void emit_verbosecall_exit(jitdata *jd)
366 /* get required compiler data */
371 /* mark trace code */
376 M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
377 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
378 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
379 M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
381 M_MOV(REG_RESULT, REG_A0);
383 M_FLTMOVE(REG_FRESULT, REG_FA0);
384 M_FLTMOVE(REG_FRESULT, REG_FA1);
386 disp = dseg_add_address(cd, m);
387 M_ALD(REG_A3, REG_PV, disp);
389 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
390 /* call via function descriptor, XXX: what about TOC ? */
391 M_ALD(REG_ITMP2, REG_PV, disp);
392 M_ALD(REG_ITMP2, REG_ITMP2, 0);
396 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
397 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
398 M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
399 M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
402 /* mark trace code */
409 /* emit_branch *****************************************************************
411 Emits the code for conditional and unconditional branchs.
413 *******************************************************************************/
415 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
420 /* calculate the different displacements */
422 checkdisp = disp + 4;
423 branchdisp = (disp - 4) >> 2;
425 /* check which branch to generate */
427 if (condition == BRANCH_UNCONDITIONAL) {
428 /* check displacement for overflow */
430 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
431 /* if the long-branches flag isn't set yet, do it */
433 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
434 cd->flags |= (CODEGENDATA_FLAG_ERROR |
435 CODEGENDATA_FLAG_LONGBRANCHES);
438 vm_abort("emit_branch: emit unconditional long-branch code");
445 /* and displacement for overflow */
447 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
448 /* if the long-branches flag isn't set yet, do it */
450 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
451 cd->flags |= (CODEGENDATA_FLAG_ERROR |
452 CODEGENDATA_FLAG_LONGBRANCHES);
455 branchdisp --; /* we jump from the second instruction */
482 vm_abort("emit_branch: long BRANCH_NAN");
485 vm_abort("emit_branch: unknown condition %d", condition);
513 vm_abort("emit_branch: unknown condition %d", condition);
519 /* emit_arrayindexoutofbounds_check ********************************************
521 Emit a ArrayIndexOutOfBoundsException check.
523 *******************************************************************************/
525 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
530 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
531 M_CMPU(s2, REG_ITMP3);
532 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
535 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
536 M_CMPU(s2, REG_ITMP3);
538 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
539 M_LWZ(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
545 /* emit_arithmetic_check *******************************************************
547 Emit an ArithmeticException check.
549 *******************************************************************************/
551 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
553 if (INSTRUCTION_MUST_CHECK(iptr)) {
556 codegen_add_arithmeticexception_ref(cd);
561 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
562 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
568 /* emit_arraystore_check *******************************************************
570 Emit an ArrayStoreException check.
572 *******************************************************************************/
574 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
576 if (INSTRUCTION_MUST_CHECK(iptr)) {
578 codegen_add_arraystoreexception_ref(cd);
584 /* emit_classcast_check ********************************************************
586 Emit a ClassCastException check.
588 *******************************************************************************/
590 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
592 if (INSTRUCTION_MUST_CHECK(iptr)) {
594 codegen_add_classcastexception_ref(cd, condition, s1);
609 vm_abort("emit_classcast_check: unknown condition %d", condition);
611 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
612 M_LWZ(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
618 /* emit_nullpointer_check ******************************************************
620 Emit a NullPointerException check.
622 *******************************************************************************/
624 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
626 if (INSTRUCTION_MUST_CHECK(iptr)) {
629 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
630 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
634 /* emit_exception_check ********************************************************
636 Emit an Exception check.
638 *******************************************************************************/
640 void emit_exception_check(codegendata *cd, instruction *iptr)
642 if (INSTRUCTION_MUST_CHECK(iptr)) {
644 M_CMPI(REG_RESULT, 0);
645 codegen_add_fillinstacktrace_ref(cd);
650 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
651 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
657 /* emit_patcher_stubs **********************************************************
659 Generates the code for the patcher stubs.
661 *******************************************************************************/
662 void emit_patcher_stubs(jitdata *jd)
674 /* generate code patching stub call code */
678 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
679 /* check code segment size */
683 /* Get machine code which is patched back in later. The
684 call is 1 instruction word long. */
686 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
688 mcode = *((u4 *) tmpmcodeptr);
690 /* Patch in the call to call the following code (done at
693 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
694 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
696 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
699 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
701 /* create stack frame - keep stack 16-byte aligned */
702 M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
704 /* calculate return address and move it onto the stack */
705 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
706 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
708 /* move pointer to java_objectheader onto stack */
710 #if defined(ENABLE_THREADS)
711 /* order reversed because of data segment layout */
713 (void) dseg_add_unique_address(cd, NULL); /* flcword */
714 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); /* monitorPtr */
715 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
717 M_LDA(REG_ITMP3, REG_PV, disp);
718 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
723 /* move machine code onto stack */
724 disp = dseg_add_s4(cd, mcode);
725 M_ILD(REG_ITMP3, REG_PV, disp);
726 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
728 /* move class/method/field reference onto stack */
729 disp = dseg_add_address(cd, pref->ref);
730 M_ALD(REG_ITMP3, REG_PV, disp);
731 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
733 /* move data segment displacement onto stack */
734 disp = dseg_add_s4(cd, pref->disp);
735 M_ILD(REG_ITMP3, REG_PV, disp);
736 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
738 /* move patcher function pointer onto stack */
739 disp = dseg_add_functionptr(cd, pref->patcher);
740 M_ALD(REG_ITMP3, REG_PV, disp);
741 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
743 if (targetdisp == 0) {
744 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
746 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
747 M_ALD(REG_ITMP3, REG_PV, disp);
752 disp = (((u4 *) cd->mcodebase) + targetdisp) -
753 (((u4 *) cd->mcodeptr) + 1);
760 /* emit_trap *******************************************************************
762 Emit a trap instruction and return the original machine code.
764 *******************************************************************************/
766 uint32_t emit_trap(codegendata *cd)
770 /* Get machine code which is patched back in later. The
771 trap is 1 instruction word long. */
773 mcode = *((uint32_t *) cd->mcodeptr);
775 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
782 * These are local overrides for various environment variables in Emacs.
783 * Please do not remove this and leave it at the end of the file, where
784 * Emacs will automagically detect them.
785 * ---------------------------------------------------------------------
788 * indent-tabs-mode: t
792 * vim:noexpandtab:sw=4:ts=4: