1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "mm/memory.h"
39 #include "vm/jit/powerpc64/codegen.h"
41 #include "vmcore/options.h"
43 #include "vm/builtin.h"
44 #include "vm/jit/emit-common.h"
45 #include "vm/jit/jit.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/exceptions.h"
50 #if defined(ENABLE_THREADS)
51 # include "threads/native/lock.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (src->flags & INMEMORY) {
74 disp = src->vv.regoff * 8;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 M_DLD(tempreg, REG_SP, disp);
80 M_LLD(tempreg, REG_SP, disp);
92 /* emit_store ******************************************************************
94 Emits a possible store to a variable.
96 *******************************************************************************/
98 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
102 /* get required compiler data */
106 if (dst->flags & INMEMORY) {
109 if (IS_FLT_DBL_TYPE(dst->type)) {
110 M_DST(d, REG_SP, dst->vv.regoff * 8);
113 M_LST(d, REG_SP, dst->vv.regoff * 8);
119 /* emit_copy *******************************************************************
121 Generates a register/memory to register/memory copy.
123 *******************************************************************************/
125 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
131 /* get required compiler data */
136 if ((src->vv.regoff != dst->vv.regoff) ||
137 ((src->flags ^ dst->flags) & INMEMORY)) {
139 /* If one of the variables resides in memory, we can eliminate
140 the register move from/to the temporary register with the
141 order of getting the destination register and the load. */
143 if (IS_INMEMORY(src->flags)) {
144 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
145 s1 = emit_load(jd, iptr, src, d);
148 s1 = emit_load(jd, iptr, src, REG_IFTMP);
149 d = codegen_reg_of_var(iptr->opc, dst, s1);
153 if (IS_FLT_DBL_TYPE(src->type))
159 emit_store(jd, iptr, dst, d);
164 /* emit_iconst *****************************************************************
168 *******************************************************************************/
170 void emit_iconst(codegendata *cd, s4 d, s4 value)
174 if ((value >= -32768) && (value <= 32767)) {
175 M_LDA_INTERN(d, REG_ZERO, value);
177 disp = dseg_add_s4(cd, value);
178 M_ILD(d, REG_PV, disp);
182 void emit_lconst(codegendata *cd, s4 d, s8 value)
185 if ((value >= -32768) && (value <= 32767)) {
186 M_LDA_INTERN(d, REG_ZERO, value);
188 disp = dseg_add_s8(cd, value);
189 M_LLD(d, REG_PV, disp);
194 /* emit_verbosecall_enter ******************************************************
196 Generates the code for the call trace.
198 *******************************************************************************/
200 void emit_verbosecall_enter (jitdata *jd)
209 /* get required compiler data */
217 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
221 /* setup stack for TRACE_ARGS_NUM registers */
222 /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
224 /* in nativestubs no Place to save the LR (Link Register) would be needed */
225 /* but since the stack frame has to be aligned the 4 Bytes would have to */
226 /* be padded again */
228 #if defined(__DARWIN__)
229 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
231 stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
234 /* mark trace code */
238 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
239 M_STDU(REG_SP, REG_SP, -stack_size);
241 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
242 t = md->paramtypes[p].type;
243 if (IS_INT_LNG_TYPE(t)) {
244 if (!md->params[p].inmemory) { /* Param in Arg Reg */
245 M_LST(rd->argintregs[md->params[p].regoff], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
246 } else { /* Param on Stack */
247 s1 = (md->params[p].regoff + cd->stackframesize) * 8 + stack_size;
248 M_LLD(REG_ITMP2, REG_SP, s1);
249 M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
251 } else { /* IS_FLT_DBL_TYPE(t) */
252 if (!md->params[p].inmemory) { /* in Arg Reg */
253 s1 = rd->argfltregs[md->params[p].regoff];
254 M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
255 } else { /* on Stack */
256 /* this should not happen */
262 #if defined(__DARWIN__)
263 #warning "emit_verbosecall_enter not implemented"
266 /* Set integer and float argument registers for trace_args call */
267 /* offset to saved integer argument registers */
268 for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
269 t = md->paramtypes[p].type;
270 if (IS_INT_LNG_TYPE(t)) {
271 M_LLD(rd->argintregs[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
272 } else { /* Float/Dbl */
273 if (!md->params[p].inmemory) { /* Param in Arg Reg */
274 /* use reserved Place on Stack (sp + 5 * 16) to copy */
275 /* float/double arg reg to int reg */
276 s1 = rd->argfltregs[md->params[p].regoff];
277 M_MOV(s1, rd->argintregs[p]);
285 /* put methodinfo pointer on Stackframe */
286 p = dseg_add_address(cd, m);
287 M_ALD(REG_ITMP1, REG_PV, p);
288 #if defined(__DARWIN__)
289 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
291 if (TRACE_ARGS_NUM == 8) {
292 /* need to pass via stack */
293 M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
295 /* pass via register, reg 3 is the first */
296 M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
299 /* call via function descriptor */
300 /* XXX: what about TOC? */
301 p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
302 M_ALD(REG_ITMP2, REG_PV, p);
303 M_ALD(REG_ITMP1, REG_ITMP2, 0);
307 #if defined(__DARWIN__)
308 #warning "emit_verbosecall_enter not implemented"
311 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
312 t = md->paramtypes[p].type;
313 if (IS_INT_LNG_TYPE(t)) {
314 if (!md->params[p].inmemory) { /* Param in Arg Reg */
315 /* restore integer argument registers */
316 M_LLD(rd->argintregs[p], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
318 assert(0); /* TODO: implement this */
320 } else { /* FLT/DBL */
321 if (!md->params[p].inmemory) { /* Param in Arg Reg */
322 M_DLD(rd->argfltregs[md->params[p].regoff], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
324 assert(0); /* this shoudl never happen */
330 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
332 M_LDA(REG_SP, REG_SP, stack_size);
334 /* mark trace code */
339 /* emit_verbosecall_exit ******************************************************
341 Generates the code for the call trace.
343 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
345 *******************************************************************************/
347 void emit_verbosecall_exit(jitdata *jd)
353 /* get required compiler data */
358 /* mark trace code */
363 M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
364 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
365 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
366 M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
368 M_MOV(REG_RESULT, REG_A0);
370 M_FLTMOVE(REG_FRESULT, REG_FA0);
371 M_FLTMOVE(REG_FRESULT, REG_FA1);
373 disp = dseg_add_address(cd, m);
374 M_ALD(REG_A3, REG_PV, disp);
376 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
377 /* call via function descriptor, XXX: what about TOC ? */
378 M_ALD(REG_ITMP2, REG_PV, disp);
379 M_ALD(REG_ITMP2, REG_ITMP2, 0);
383 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
384 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
385 M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
386 M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
389 /* mark trace code */
394 /* emit_branch *****************************************************************
396 Emits the code for conditional and unconditional branchs.
398 *******************************************************************************/
400 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
405 /* calculate the different displacements */
407 checkdisp = disp + 4;
408 branchdisp = (disp - 4) >> 2;
410 /* check which branch to generate */
412 if (condition == BRANCH_UNCONDITIONAL) {
413 /* check displacement for overflow */
415 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
416 /* if the long-branches flag isn't set yet, do it */
418 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
419 log_println("setting error");
420 cd->flags |= (CODEGENDATA_FLAG_ERROR |
421 CODEGENDATA_FLAG_LONGBRANCHES);
424 vm_abort("emit_branch: emit unconditional long-branch code");
431 /* and displacement for overflow */
433 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
434 /* if the long-branches flag isn't set yet, do it */
436 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
437 log_println("setting error");
438 cd->flags |= (CODEGENDATA_FLAG_ERROR |
439 CODEGENDATA_FLAG_LONGBRANCHES);
441 log_println("generating long-branch");
443 branchdisp --; /* we jump from the second instruction */
470 vm_abort("emit_branch: long BRANCH_NAN");
473 vm_abort("emit_branch: unknown condition %d", condition);
501 vm_abort("emit_branch: unknown condition %d", condition);
507 /* emit_arrayindexoutofbounds_check ********************************************
509 Emit a ArrayIndexOutOfBoundsException check.
511 *******************************************************************************/
513 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
518 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
519 M_CMPU(s2, REG_ITMP3);
520 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
523 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
524 M_CMPU(s2, REG_ITMP3);
526 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
527 M_LWZ(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
533 /* emit_arithmetic_check *******************************************************
535 Emit an ArithmeticException check.
537 *******************************************************************************/
539 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
541 if (INSTRUCTION_MUST_CHECK(iptr)) {
544 codegen_add_arithmeticexception_ref(cd);
549 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
550 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
556 /* emit_arraystore_check *******************************************************
558 Emit an ArrayStoreException check.
560 *******************************************************************************/
562 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
564 if (INSTRUCTION_MUST_CHECK(iptr)) {
566 codegen_add_arraystoreexception_ref(cd);
572 /* emit_classcast_check ********************************************************
574 Emit a ClassCastException check.
576 *******************************************************************************/
578 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
580 if (INSTRUCTION_MUST_CHECK(iptr)) {
582 codegen_add_classcastexception_ref(cd, condition, s1);
597 vm_abort("emit_classcast_check: unknown condition %d", condition);
599 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
600 M_LWZ(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
606 /* emit_nullpointer_check ******************************************************
608 Emit a NullPointerException check.
610 *******************************************************************************/
612 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
614 if (INSTRUCTION_MUST_CHECK(iptr)) {
617 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
618 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
622 /* emit_exception_check ********************************************************
624 Emit an Exception check.
626 *******************************************************************************/
628 void emit_exception_check(codegendata *cd, instruction *iptr)
630 if (INSTRUCTION_MUST_CHECK(iptr)) {
632 M_CMPI(REG_RESULT, 0);
633 codegen_add_fillinstacktrace_ref(cd);
638 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
639 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
645 /* emit_patcher_stubs **********************************************************
647 Generates the code for the patcher stubs.
649 *******************************************************************************/
650 void emit_patcher_stubs(jitdata *jd)
662 /* generate code patching stub call code */
666 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
667 /* check code segment size */
671 /* Get machine code which is patched back in later. The
672 call is 1 instruction word long. */
674 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
676 mcode = *((u4 *) tmpmcodeptr);
678 /* Patch in the call to call the following code (done at
681 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
682 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
684 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
687 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
689 /* create stack frame - keep stack 16-byte aligned */
691 M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
693 /* calculate return address and move it onto the stack */
695 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
696 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
698 /* move pointer to java_objectheader onto stack */
700 #if defined(ENABLE_THREADS)
701 /* order reversed because of data segment layout */
703 (void) dseg_add_unique_address(cd, NULL); /* flcword */
704 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); /* monitorPtr */
705 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
707 M_LDA(REG_ITMP3, REG_PV, disp);
708 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
713 /* move machine code onto stack */
715 disp = dseg_add_s4(cd, mcode);
716 M_ILD(REG_ITMP3, REG_PV, disp);
717 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
719 /* move class/method/field reference onto stack */
721 disp = dseg_add_address(cd, pref->ref);
722 M_ALD(REG_ITMP3, REG_PV, disp);
723 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
725 /* move data segment displacement onto stack */
727 disp = dseg_add_s4(cd, pref->disp);
728 M_ILD(REG_ITMP3, REG_PV, disp);
729 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
732 /* move patcher function pointer onto stack */
734 disp = dseg_add_functionptr(cd, pref->patcher);
735 M_ALD(REG_ITMP3, REG_PV, disp);
736 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
739 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
740 M_ALD(REG_ITMP3, REG_PV, disp);
744 if (targetdisp == 0) {
745 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
747 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
748 M_ALD(REG_ITMP3, REG_PV, disp);
753 disp = (((u4 *) cd->mcodebase) + targetdisp) -
754 (((u4 *) cd->mcodeptr) + 1);
762 /* emit_replacement_stubs ******************************************************
764 Generates the code for the replacement stubs.
766 *******************************************************************************/
768 #if defined(ENABLE_REPLACEMENT)
769 void emit_replacement_stubs(jitdata *jd)
773 rplpoint *replacementpoint;
780 /* get required compiler data */
785 replacementpoint = jd->code->rplpoints;
787 for (i = 0; i < code->rplpointcount; ++i, ++replacementpoint) {
788 /* do not generate stubs for non-trappable points */
790 if (replacementpoint->flags & RPLPOINT_FLAG_NOTRAP)
794 /* check code segment size */
799 savedmcodeptr = cd->mcodeptr;
801 /* create stack frame - keep 16-byte aligned */
803 M_AADD_IMM(REG_SP, -4 * 8, REG_SP);
805 /* push address of `rplpoint` struct */
807 disp = dseg_add_address(cd, replacementpoint);
808 M_ALD(REG_ITMP3, REG_PV, disp);
809 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
811 /* jump to replacement function */
813 disp = dseg_add_functionptr(cd, asm_replacement_out);
814 M_ALD(REG_ITMP3, REG_PV, disp);
818 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
821 /* note start of stub code */
823 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
825 /* make machine code for patching */
827 savedmcodeptr = cd->mcodeptr;
828 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
830 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
833 cd->mcodeptr = savedmcodeptr;
835 /* create stack frame - keep 16-byte aligned */
837 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
839 /* push address of `rplpoint` struct */
841 disp = dseg_add_unique_address(cd, replacementpoint);
842 M_ALD(REG_ITMP3, REG_PV, disp);
843 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
845 /* jump to replacement function */
847 disp = dseg_add_functionptr(cd, asm_replacement_out);
848 M_ALD(REG_ITMP3, REG_PV, disp);
854 #endif /* define(ENABLE_REPLACEMENT) */
857 * These are local overrides for various environment variables in Emacs.
858 * Please do not remove this and leave it at the end of the file, where
859 * Emacs will automagically detect them.
860 * ---------------------------------------------------------------------
863 * indent-tabs-mode: t
867 * vim:noexpandtab:sw=4:ts=4: