1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "mm/memory.h"
39 #include "vm/jit/powerpc64/codegen.h"
41 #include "threads/lock-common.h"
43 #include "vm/builtin.h"
44 #include "vm/exceptions.h"
47 #include "vm/jit/abi.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
52 #include "vmcore/options.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (src->flags & INMEMORY) {
74 disp = src->vv.regoff * 8;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 M_DLD(tempreg, REG_SP, disp);
80 M_LLD(tempreg, REG_SP, disp);
92 /* emit_store ******************************************************************
94 Emits a possible store to a variable.
96 *******************************************************************************/
98 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
102 /* get required compiler data */
106 if (dst->flags & INMEMORY) {
109 if (IS_FLT_DBL_TYPE(dst->type)) {
110 M_DST(d, REG_SP, dst->vv.regoff * 8);
113 M_LST(d, REG_SP, dst->vv.regoff * 8);
119 /* emit_copy *******************************************************************
121 Generates a register/memory to register/memory copy.
123 *******************************************************************************/
125 void emit_copy(jitdata *jd, instruction *iptr)
132 /* get required compiler data */
136 /* get source and destination variables */
138 src = VAROP(iptr->s1);
139 dst = VAROP(iptr->dst);
141 if ((src->vv.regoff != dst->vv.regoff) ||
142 ((src->flags ^ dst->flags) & INMEMORY)) {
144 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
145 /* emit nothing, as the value won't be used anyway */
149 /* If one of the variables resides in memory, we can eliminate
150 the register move from/to the temporary register with the
151 order of getting the destination register and the load. */
153 if (IS_INMEMORY(src->flags)) {
154 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
155 s1 = emit_load(jd, iptr, src, d);
158 s1 = emit_load(jd, iptr, src, REG_IFTMP);
159 d = codegen_reg_of_var(iptr->opc, dst, s1);
163 if (IS_FLT_DBL_TYPE(src->type))
169 emit_store(jd, iptr, dst, d);
174 /* emit_iconst *****************************************************************
178 *******************************************************************************/
180 void emit_iconst(codegendata *cd, s4 d, s4 value)
184 if ((value >= -32768) && (value <= 32767)) {
185 M_LDA_INTERN(d, REG_ZERO, value);
187 disp = dseg_add_s4(cd, value);
188 M_ILD(d, REG_PV, disp);
192 void emit_lconst(codegendata *cd, s4 d, s8 value)
195 if ((value >= -32768) && (value <= 32767)) {
196 M_LDA_INTERN(d, REG_ZERO, value);
198 disp = dseg_add_s8(cd, value);
199 M_LLD(d, REG_PV, disp);
204 /* emit_verbosecall_enter ******************************************************
206 Generates the code for the call trace.
208 *******************************************************************************/
210 void emit_verbosecall_enter (jitdata *jd)
219 /* get required compiler data */
227 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
231 /* setup stack for TRACE_ARGS_NUM registers */
232 /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
234 /* in nativestubs no Place to save the LR (Link Register) would be needed */
235 /* but since the stack frame has to be aligned the 4 Bytes would have to */
236 /* be padded again */
238 #if defined(__DARWIN__)
239 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
241 stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
244 /* mark trace code */
248 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
249 M_STDU(REG_SP, REG_SP, -stack_size);
251 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
252 t = md->paramtypes[p].type;
253 if (IS_INT_LNG_TYPE(t)) {
254 if (!md->params[p].inmemory) { /* Param in Arg Reg */
255 M_LST(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
256 } else { /* Param on Stack */
257 s1 = (md->params[p].regoff + cd->stackframesize) * 8 + stack_size;
258 M_LLD(REG_ITMP2, REG_SP, s1);
259 M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
261 } else { /* IS_FLT_DBL_TYPE(t) */
262 if (!md->params[p].inmemory) { /* in Arg Reg */
263 s1 = md->params[p].regoff;
264 M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
265 } else { /* on Stack */
266 /* this should not happen */
272 #if defined(__DARWIN__)
273 #warning "emit_verbosecall_enter not implemented"
276 /* Set integer and float argument registers for trace_args call */
277 /* offset to saved integer argument registers */
278 for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
279 t = md->paramtypes[p].type;
280 if (IS_INT_LNG_TYPE(t)) {
281 M_LLD(abi_registers_integer_argument[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
282 } else { /* Float/Dbl */
283 if (!md->params[p].inmemory) { /* Param in Arg Reg */
284 /* use reserved Place on Stack (sp + 5 * 16) to copy */
285 /* float/double arg reg to int reg */
286 s1 = md->params[p].regoff;
287 M_MOV(s1, abi_registers_integer_argument[p]);
295 /* put methodinfo pointer on Stackframe */
296 p = dseg_add_address(cd, m);
297 M_ALD(REG_ITMP1, REG_PV, p);
298 #if defined(__DARWIN__)
299 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
301 if (TRACE_ARGS_NUM == 8) {
302 /* need to pass via stack */
303 M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
305 /* pass via register, reg 3 is the first */
306 M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
309 /* call via function descriptor */
310 /* XXX: what about TOC? */
311 p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
312 M_ALD(REG_ITMP2, REG_PV, p);
313 M_ALD(REG_ITMP1, REG_ITMP2, 0);
317 #if defined(__DARWIN__)
318 #warning "emit_verbosecall_enter not implemented"
321 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
322 t = md->paramtypes[p].type;
323 if (IS_INT_LNG_TYPE(t)) {
324 if (!md->params[p].inmemory) { /* Param in Arg Reg */
325 /* restore integer argument registers */
326 M_LLD(abi_registers_integer_argument[p], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
328 assert(0); /* TODO: implement this */
330 } else { /* FLT/DBL */
331 if (!md->params[p].inmemory) { /* Param in Arg Reg */
332 M_DLD(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
334 assert(0); /* this shoudl never happen */
340 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
342 M_LDA(REG_SP, REG_SP, stack_size);
344 /* mark trace code */
349 /* emit_verbosecall_exit ******************************************************
351 Generates the code for the call trace.
353 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
355 *******************************************************************************/
357 void emit_verbosecall_exit(jitdata *jd)
363 /* get required compiler data */
368 /* mark trace code */
373 M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
374 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
375 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
376 M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
378 M_MOV(REG_RESULT, REG_A0);
380 M_FLTMOVE(REG_FRESULT, REG_FA0);
381 M_FLTMOVE(REG_FRESULT, REG_FA1);
383 disp = dseg_add_address(cd, m);
384 M_ALD(REG_A3, REG_PV, disp);
386 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
387 /* call via function descriptor, XXX: what about TOC ? */
388 M_ALD(REG_ITMP2, REG_PV, disp);
389 M_ALD(REG_ITMP2, REG_ITMP2, 0);
393 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
394 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
395 M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
396 M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
399 /* mark trace code */
404 /* emit_branch *****************************************************************
406 Emits the code for conditional and unconditional branchs.
408 *******************************************************************************/
410 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
415 /* calculate the different displacements */
417 checkdisp = disp + 4;
418 branchdisp = (disp - 4) >> 2;
420 /* check which branch to generate */
422 if (condition == BRANCH_UNCONDITIONAL) {
423 /* check displacement for overflow */
425 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
426 /* if the long-branches flag isn't set yet, do it */
428 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
429 log_println("setting error");
430 cd->flags |= (CODEGENDATA_FLAG_ERROR |
431 CODEGENDATA_FLAG_LONGBRANCHES);
434 vm_abort("emit_branch: emit unconditional long-branch code");
441 /* and displacement for overflow */
443 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
444 /* if the long-branches flag isn't set yet, do it */
446 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
447 log_println("setting error");
448 cd->flags |= (CODEGENDATA_FLAG_ERROR |
449 CODEGENDATA_FLAG_LONGBRANCHES);
451 log_println("generating long-branch");
453 branchdisp --; /* we jump from the second instruction */
480 vm_abort("emit_branch: long BRANCH_NAN");
483 vm_abort("emit_branch: unknown condition %d", condition);
511 vm_abort("emit_branch: unknown condition %d", condition);
517 /* emit_arrayindexoutofbounds_check ********************************************
519 Emit a ArrayIndexOutOfBoundsException check.
521 *******************************************************************************/
523 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
528 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
529 M_CMPU(s2, REG_ITMP3);
530 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
533 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
534 M_CMPU(s2, REG_ITMP3);
536 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
537 M_LWZ(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
543 /* emit_arithmetic_check *******************************************************
545 Emit an ArithmeticException check.
547 *******************************************************************************/
549 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
551 if (INSTRUCTION_MUST_CHECK(iptr)) {
554 codegen_add_arithmeticexception_ref(cd);
559 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
560 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
566 /* emit_arraystore_check *******************************************************
568 Emit an ArrayStoreException check.
570 *******************************************************************************/
572 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
574 if (INSTRUCTION_MUST_CHECK(iptr)) {
576 codegen_add_arraystoreexception_ref(cd);
582 /* emit_classcast_check ********************************************************
584 Emit a ClassCastException check.
586 *******************************************************************************/
588 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
590 if (INSTRUCTION_MUST_CHECK(iptr)) {
592 codegen_add_classcastexception_ref(cd, condition, s1);
607 vm_abort("emit_classcast_check: unknown condition %d", condition);
609 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
610 M_LWZ(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
616 /* emit_nullpointer_check ******************************************************
618 Emit a NullPointerException check.
620 *******************************************************************************/
622 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
624 if (INSTRUCTION_MUST_CHECK(iptr)) {
627 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
628 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
632 /* emit_exception_check ********************************************************
634 Emit an Exception check.
636 *******************************************************************************/
638 void emit_exception_check(codegendata *cd, instruction *iptr)
640 if (INSTRUCTION_MUST_CHECK(iptr)) {
642 M_CMPI(REG_RESULT, 0);
643 codegen_add_fillinstacktrace_ref(cd);
648 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
649 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
655 /* emit_patcher_stubs **********************************************************
657 Generates the code for the patcher stubs.
659 *******************************************************************************/
660 void emit_patcher_stubs(jitdata *jd)
672 /* generate code patching stub call code */
676 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
677 /* check code segment size */
681 /* Get machine code which is patched back in later. The
682 call is 1 instruction word long. */
684 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
686 mcode = *((u4 *) tmpmcodeptr);
688 /* Patch in the call to call the following code (done at
691 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
692 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
694 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
697 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
699 /* create stack frame - keep stack 16-byte aligned */
700 M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
702 /* calculate return address and move it onto the stack */
703 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
704 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
706 /* move pointer to java_objectheader onto stack */
708 #if defined(ENABLE_THREADS)
709 /* order reversed because of data segment layout */
711 (void) dseg_add_unique_address(cd, NULL); /* flcword */
712 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); /* monitorPtr */
713 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
715 M_LDA(REG_ITMP3, REG_PV, disp);
716 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
721 /* move machine code onto stack */
722 disp = dseg_add_s4(cd, mcode);
723 M_ILD(REG_ITMP3, REG_PV, disp);
724 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
726 /* move class/method/field reference onto stack */
727 disp = dseg_add_address(cd, pref->ref);
728 M_ALD(REG_ITMP3, REG_PV, disp);
729 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
731 /* move data segment displacement onto stack */
732 disp = dseg_add_s4(cd, pref->disp);
733 M_ILD(REG_ITMP3, REG_PV, disp);
734 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
736 /* move patcher function pointer onto stack */
737 disp = dseg_add_functionptr(cd, pref->patcher);
738 M_ALD(REG_ITMP3, REG_PV, disp);
739 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
741 if (targetdisp == 0) {
742 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
744 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
745 M_ALD(REG_ITMP3, REG_PV, disp);
750 disp = (((u4 *) cd->mcodebase) + targetdisp) -
751 (((u4 *) cd->mcodeptr) + 1);
758 /* emit_replacement_stubs ******************************************************
760 Generates the code for the replacement stubs.
762 *******************************************************************************/
764 #if defined(ENABLE_REPLACEMENT)
765 void emit_replacement_stubs(jitdata *jd)
769 rplpoint *replacementpoint;
776 /* get required compiler data */
781 replacementpoint = jd->code->rplpoints;
783 for (i = 0; i < code->rplpointcount; ++i, ++replacementpoint) {
784 /* do not generate stubs for non-trappable points */
786 if (replacementpoint->flags & RPLPOINT_FLAG_NOTRAP)
790 /* check code segment size */
795 savedmcodeptr = cd->mcodeptr;
797 /* create stack frame - keep 16-byte aligned */
799 M_AADD_IMM(REG_SP, -4 * 8, REG_SP);
801 /* push address of `rplpoint` struct */
803 disp = dseg_add_address(cd, replacementpoint);
804 M_ALD(REG_ITMP3, REG_PV, disp);
805 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
807 /* jump to replacement function */
809 disp = dseg_add_functionptr(cd, asm_replacement_out);
810 M_ALD(REG_ITMP3, REG_PV, disp);
814 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
817 /* note start of stub code */
819 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
821 /* make machine code for patching */
823 savedmcodeptr = cd->mcodeptr;
824 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
826 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
829 cd->mcodeptr = savedmcodeptr;
831 /* create stack frame - keep 16-byte aligned */
833 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
835 /* push address of `rplpoint` struct */
837 disp = dseg_add_unique_address(cd, replacementpoint);
838 M_ALD(REG_ITMP3, REG_PV, disp);
839 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
841 /* jump to replacement function */
843 disp = dseg_add_functionptr(cd, asm_replacement_out);
844 M_ALD(REG_ITMP3, REG_PV, disp);
850 #endif /* define(ENABLE_REPLACEMENT) */
853 * These are local overrides for various environment variables in Emacs.
854 * Please do not remove this and leave it at the end of the file, where
855 * Emacs will automagically detect them.
856 * ---------------------------------------------------------------------
859 * indent-tabs-mode: t
863 * vim:noexpandtab:sw=4:ts=4: