1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
34 #include "mm/memory.h"
37 #include "vm/jit/powerpc64/codegen.h"
39 #include "threads/lock-common.h"
41 #include "vm/builtin.h"
42 #include "vm/exceptions.h"
45 #include "vm/jit/abi.h"
46 #include "vm/jit/asmpart.h"
47 #include "vm/jit/emit-common.h"
48 #include "vm/jit/jit.h"
50 #include "vmcore/options.h"
53 /* emit_load *******************************************************************
55 Emits a possible load of an operand.
57 *******************************************************************************/
59 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
65 /* get required compiler data */
69 if (src->flags & INMEMORY) {
72 disp = src->vv.regoff;
74 if (IS_FLT_DBL_TYPE(src->type)) {
75 M_DLD(tempreg, REG_SP, disp);
78 M_LLD(tempreg, REG_SP, disp);
90 /* emit_store ******************************************************************
92 Emits a possible store to a variable.
94 *******************************************************************************/
96 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
100 /* get required compiler data */
104 if (dst->flags & INMEMORY) {
107 if (IS_FLT_DBL_TYPE(dst->type)) {
108 M_DST(d, REG_SP, dst->vv.regoff);
111 M_LST(d, REG_SP, dst->vv.regoff);
117 /* emit_copy *******************************************************************
119 Generates a register/memory to register/memory copy.
121 *******************************************************************************/
123 void emit_copy(jitdata *jd, instruction *iptr)
130 /* get required compiler data */
134 /* get source and destination variables */
136 src = VAROP(iptr->s1);
137 dst = VAROP(iptr->dst);
139 if ((src->vv.regoff != dst->vv.regoff) ||
140 ((src->flags ^ dst->flags) & INMEMORY)) {
142 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
143 /* emit nothing, as the value won't be used anyway */
147 /* If one of the variables resides in memory, we can eliminate
148 the register move from/to the temporary register with the
149 order of getting the destination register and the load. */
151 if (IS_INMEMORY(src->flags)) {
152 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
153 s1 = emit_load(jd, iptr, src, d);
156 s1 = emit_load(jd, iptr, src, REG_IFTMP);
157 d = codegen_reg_of_var(iptr->opc, dst, s1);
161 if (IS_FLT_DBL_TYPE(src->type))
167 emit_store(jd, iptr, dst, d);
172 /* emit_iconst *****************************************************************
176 *******************************************************************************/
178 void emit_iconst(codegendata *cd, s4 d, s4 value)
182 if ((value >= -32768) && (value <= 32767)) {
183 M_LDA_INTERN(d, REG_ZERO, value);
185 disp = dseg_add_s4(cd, value);
186 M_ILD(d, REG_PV, disp);
190 void emit_lconst(codegendata *cd, s4 d, s8 value)
193 if ((value >= -32768) && (value <= 32767)) {
194 M_LDA_INTERN(d, REG_ZERO, value);
196 disp = dseg_add_s8(cd, value);
197 M_LLD(d, REG_PV, disp);
202 /* emit_verbosecall_enter ******************************************************
204 Generates the code for the call trace.
206 *******************************************************************************/
209 void emit_verbosecall_enter(jitdata *jd)
218 /* get required compiler data */
226 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
230 /* setup stack for TRACE_ARGS_NUM registers */
231 /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
233 /* in nativestubs no Place to save the LR (Link Register) would be needed */
234 /* but since the stack frame has to be aligned the 4 Bytes would have to */
235 /* be padded again */
237 #if defined(__DARWIN__)
238 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
240 stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
243 /* mark trace code */
247 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
248 M_STDU(REG_SP, REG_SP, -stack_size);
250 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
251 t = md->paramtypes[p].type;
252 if (IS_INT_LNG_TYPE(t)) {
253 if (!md->params[p].inmemory) { /* Param in Arg Reg */
254 M_LST(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
255 } else { /* Param on Stack */
256 s1 = md->params[p].regoff + cd->stackframesize * 8 + stack_size;
257 M_LLD(REG_ITMP2, REG_SP, s1);
258 M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
260 } else { /* IS_FLT_DBL_TYPE(t) */
261 if (!md->params[p].inmemory) { /* in Arg Reg */
262 s1 = md->params[p].regoff;
263 M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
264 } else { /* on Stack */
265 /* this should not happen */
271 #if defined(__DARWIN__)
272 #warning "emit_verbosecall_enter not implemented"
275 /* Set integer and float argument registers for trace_args call */
276 /* offset to saved integer argument registers */
277 for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
278 t = md->paramtypes[p].type;
279 if (IS_INT_LNG_TYPE(t)) {
280 M_LLD(abi_registers_integer_argument[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
281 } else { /* Float/Dbl */
282 if (!md->params[p].inmemory) { /* Param in Arg Reg */
283 /* use reserved Place on Stack (sp + 5 * 16) to copy */
284 /* float/double arg reg to int reg */
285 s1 = md->params[p].regoff;
286 M_MOV(s1, abi_registers_integer_argument[p]);
294 /* put methodinfo pointer on Stackframe */
295 p = dseg_add_address(cd, m);
296 M_ALD(REG_ITMP1, REG_PV, p);
297 #if defined(__DARWIN__)
298 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
300 if (TRACE_ARGS_NUM == 8) {
301 /* need to pass via stack */
302 M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
304 /* pass via register, reg 3 is the first */
305 M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
308 /* call via function descriptor */
309 /* XXX: what about TOC? */
310 p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
311 M_ALD(REG_ITMP2, REG_PV, p);
312 M_ALD(REG_ITMP1, REG_ITMP2, 0);
316 #if defined(__DARWIN__)
317 #warning "emit_verbosecall_enter not implemented"
320 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
321 t = md->paramtypes[p].type;
322 if (IS_INT_LNG_TYPE(t)) {
323 if (!md->params[p].inmemory) { /* Param in Arg Reg */
324 /* restore integer argument registers */
325 M_LLD(abi_registers_integer_argument[p], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
327 assert(0); /* TODO: implement this */
329 } else { /* FLT/DBL */
330 if (!md->params[p].inmemory) { /* Param in Arg Reg */
331 M_DLD(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
333 assert(0); /* this shoudl never happen */
339 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
341 M_LDA(REG_SP, REG_SP, stack_size);
343 /* mark trace code */
349 /* emit_verbosecall_exit ******************************************************
351 Generates the code for the call trace.
353 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
355 *******************************************************************************/
358 void emit_verbosecall_exit(jitdata *jd)
364 /* get required compiler data */
369 /* mark trace code */
374 M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
375 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
376 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
377 M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
379 M_MOV(REG_RESULT, REG_A0);
381 M_FLTMOVE(REG_FRESULT, REG_FA0);
382 M_FLTMOVE(REG_FRESULT, REG_FA1);
384 disp = dseg_add_address(cd, m);
385 M_ALD(REG_A3, REG_PV, disp);
387 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
388 /* call via function descriptor, XXX: what about TOC ? */
389 M_ALD(REG_ITMP2, REG_PV, disp);
390 M_ALD(REG_ITMP2, REG_ITMP2, 0);
394 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
395 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
396 M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
397 M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
400 /* mark trace code */
407 /* emit_branch *****************************************************************
409 Emits the code for conditional and unconditional branchs.
411 *******************************************************************************/
413 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
418 /* calculate the different displacements */
420 checkdisp = disp + 4;
421 branchdisp = (disp - 4) >> 2;
423 /* check which branch to generate */
425 if (condition == BRANCH_UNCONDITIONAL) {
426 /* check displacement for overflow */
428 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
429 /* if the long-branches flag isn't set yet, do it */
431 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
432 cd->flags |= (CODEGENDATA_FLAG_ERROR |
433 CODEGENDATA_FLAG_LONGBRANCHES);
436 vm_abort("emit_branch: emit unconditional long-branch code");
443 /* and displacement for overflow */
445 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
446 /* if the long-branches flag isn't set yet, do it */
448 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
449 cd->flags |= (CODEGENDATA_FLAG_ERROR |
450 CODEGENDATA_FLAG_LONGBRANCHES);
453 branchdisp --; /* we jump from the second instruction */
480 vm_abort("emit_branch: long BRANCH_NAN");
483 vm_abort("emit_branch: unknown condition %d", condition);
511 vm_abort("emit_branch: unknown condition %d", condition);
517 /* emit_arrayindexoutofbounds_check ********************************************
519 Emit a ArrayIndexOutOfBoundsException check.
521 *******************************************************************************/
523 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
528 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
529 M_CMPU(s2, REG_ITMP3);
530 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
533 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
534 M_CMPU(s2, REG_ITMP3);
536 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
537 M_LWZ(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
543 /* emit_arithmetic_check *******************************************************
545 Emit an ArithmeticException check.
547 *******************************************************************************/
549 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
551 if (INSTRUCTION_MUST_CHECK(iptr)) {
554 codegen_add_arithmeticexception_ref(cd);
559 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
560 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
566 /* emit_arraystore_check *******************************************************
568 Emit an ArrayStoreException check.
570 *******************************************************************************/
572 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
574 if (INSTRUCTION_MUST_CHECK(iptr)) {
576 codegen_add_arraystoreexception_ref(cd);
582 /* emit_classcast_check ********************************************************
584 Emit a ClassCastException check.
586 *******************************************************************************/
588 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
590 if (INSTRUCTION_MUST_CHECK(iptr)) {
592 codegen_add_classcastexception_ref(cd, condition, s1);
607 vm_abort("emit_classcast_check: unknown condition %d", condition);
609 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
610 M_LWZ(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
616 /* emit_nullpointer_check ******************************************************
618 Emit a NullPointerException check.
620 *******************************************************************************/
622 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
624 if (INSTRUCTION_MUST_CHECK(iptr)) {
627 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
628 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
632 /* emit_exception_check ********************************************************
634 Emit an Exception check.
636 *******************************************************************************/
638 void emit_exception_check(codegendata *cd, instruction *iptr)
640 if (INSTRUCTION_MUST_CHECK(iptr)) {
642 M_CMPI(REG_RESULT, 0);
643 codegen_add_fillinstacktrace_ref(cd);
648 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
649 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
655 /* emit_patcher_stubs **********************************************************
657 Generates the code for the patcher stubs.
659 *******************************************************************************/
660 void emit_patcher_stubs(jitdata *jd)
672 /* generate code patching stub call code */
676 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
677 /* check code segment size */
681 /* Get machine code which is patched back in later. The
682 call is 1 instruction word long. */
684 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
686 mcode = *((u4 *) tmpmcodeptr);
688 /* Patch in the call to call the following code (done at
691 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
692 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
694 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
697 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
699 /* create stack frame - keep stack 16-byte aligned */
700 M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
702 /* calculate return address and move it onto the stack */
703 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
704 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
706 /* move pointer to java_objectheader onto stack */
708 #if defined(ENABLE_THREADS)
709 /* order reversed because of data segment layout */
711 (void) dseg_add_unique_address(cd, NULL); /* flcword */
712 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); /* monitorPtr */
713 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
715 M_LDA(REG_ITMP3, REG_PV, disp);
716 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
721 /* move machine code onto stack */
722 disp = dseg_add_s4(cd, mcode);
723 M_ILD(REG_ITMP3, REG_PV, disp);
724 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
726 /* move class/method/field reference onto stack */
727 disp = dseg_add_address(cd, pref->ref);
728 M_ALD(REG_ITMP3, REG_PV, disp);
729 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
731 /* move data segment displacement onto stack */
732 disp = dseg_add_s4(cd, pref->disp);
733 M_ILD(REG_ITMP3, REG_PV, disp);
734 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
736 /* move patcher function pointer onto stack */
737 disp = dseg_add_functionptr(cd, pref->patcher);
738 M_ALD(REG_ITMP3, REG_PV, disp);
739 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
741 if (targetdisp == 0) {
742 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
744 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
745 M_ALD(REG_ITMP3, REG_PV, disp);
750 disp = (((u4 *) cd->mcodebase) + targetdisp) -
751 (((u4 *) cd->mcodeptr) + 1);
758 /* emit_trap *******************************************************************
760 Emit a trap instruction and return the original machine code.
762 *******************************************************************************/
764 uint32_t emit_trap(codegendata *cd)
768 /* Get machine code which is patched back in later. The
769 trap is 1 instruction word long. */
771 mcode = *((uint32_t *) cd->mcodeptr);
773 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
780 * These are local overrides for various environment variables in Emacs.
781 * Please do not remove this and leave it at the end of the file, where
782 * Emacs will automagically detect them.
783 * ---------------------------------------------------------------------
786 * indent-tabs-mode: t
790 * vim:noexpandtab:sw=4:ts=4: