1 /* src/vm/jit/powerpc64/codegen.h - code generation macros and definitions for
4 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
5 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
6 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
7 J. Wenninger, Institut f. Computersprachen - TU Wien
9 This file is part of CACAO.
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2, or (at
14 your option) any later version.
16 This program is distributed in the hope that it will be useful, but
17 WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 Contact: cacao@cacaojvm.org
28 Authors: Andreas Krall
33 $Id: codegen.h 7691 2007-04-12 12:45:10Z twisti $
45 #include "vm/global.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/reg.h"
50 /* additional functions and macros to generate code ***************************/
52 /* MCODECHECK(icnt) */
54 #define MCODECHECK(icnt) \
56 if ((cd->mcodeptr + (icnt) * 4) > cd->mcodeend) \
57 codegen_increase(cd); \
62 generates an integer-move from register a to b.
63 if a and b are the same int-register, no code will be generated.
66 #define M_INTMOVE(a,b) \
73 #define M_LNGMOVE(a,b) M_INTMOVE(a,b)
77 generates a floating-point-move from register a to b.
78 if a and b are the same float-register, no code will be generated
81 #define M_FLTMOVE(a,b) \
89 #define ICONST(d,c) emit_iconst(cd, (d), (c))
90 #define LCONST(reg,c) emit_lconst(cd, (reg), (c))
93 #define ALIGNCODENOP \
94 if ((s4) ((ptrint) cd->mcodeptr & 7)) { \
99 /* branch defines *************************************************************/
100 /* and additional branch is needed when generating long branches */
101 #define BRANCH_NOPS \
103 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {\
110 /* patcher defines ************************************************************/
112 #define PATCHER_CALL_SIZE 1 * 4 /* an instruction is 4-bytes long */
114 #define PATCHER_NOPS \
120 /* stub defines ***************************************************************/
122 #define COMPILERSTUB_CODESIZE 4 * 4
125 /* macros to create code ******************************************************/
127 #define M_OP3(opcode,y,oe,rc,d,a,b) \
129 *((u4 *) cd->mcodeptr) = (((opcode) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((oe) << 10) | ((y) << 1) | (rc)); \
133 #define M_OP4(x,y,rc,d,a,b,c) \
135 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((c) << 6) | ((y) << 1) | (rc)); \
139 #define M_OP2_IMM(x,d,a,i) \
141 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((i) & 0xffff)); \
145 /* for instruction decodeing */
146 #define M_INSTR_OP2_IMM_D(x) (((x) >> 21) & 0x1f )
147 #define M_INSTR_OP2_IMM_A(x) (((x) >> 16) & 0x1f )
148 #define M_INSTR_OP2_IMM_I(x) ( (x) & 0xffff)
150 #define M_BCMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
151 #define M_BMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
153 #define M_B(x,i,a,l) \
155 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((((i) * 4) + 4) & M_BMASK) | ((a) << 1) | (l)); \
159 #define M_BC(x,bo,bi,i,a,l) \
161 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BCMASK) | ((a) << 1) | (l)); \
167 #define M_EXTSW(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
170 /* instruction macros *********************************************************/
172 #define M_IADD(a,b,c) M_LADD(a,b,c)
173 #define M_LADD(a,b,c) M_OP3(31, 266, 0, 0, c, a, b)
174 #define M_IADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b) /* XXX */
175 #define M_LADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b)
176 #define M_ADDC(a,b,c) M_OP3(31, 10, 0, 0, c, a, b)
177 #define M_ADDIC(a,b,c) M_OP2_IMM(12, c, a, b)
178 #define M_ADDICTST(a,b,c) M_OP2_IMM(13, c, a, b)
179 #define M_ADDE(a,b,c) M_OP3(31, 138, 0, 0, c, a, b)
180 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
181 #define M_ADDME(a,b) M_OP3(31, 234, 0, 0, b, a, 0)
183 #define M_SUB(a,b,c) M_OP3(31, 40, 0, 0, c, b, a)
184 #define M_ISUBTST(a,b,c) M_OP3(31, 40, 0, 1, c, b, a)
185 #define M_SUBC(a,b,c) M_OP3(31, 8, 0, 0, c, b, a)
186 #define M_SUBIC(a,b,c) M_OP2_IMM(8, c, b, a)
187 #define M_SUBE(a,b,c) M_OP3(31, 136, 0, 0, c, b, a)
188 #define M_SUBZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
189 #define M_SUBME(a,b) M_OP3(31, 232, 0, 0, b, a, 0)
191 #define M_AND(a,b,c) M_OP3(31, 28, 0, 0, a, c, b)
192 #define M_AND_IMM(a,b,c) M_OP2_IMM(28, a, c, b)
193 #define M_ANDIS(a,b,c) M_OP2_IMM(29, a, c, b)
194 #define M_OR(a,b,c) M_OP3(31, 444, 0, 0, a, c, b)
195 #define M_OR_TST(a,b,c) M_OP3(31, 444, 0, 1, a, c, b)
196 #define M_OR_IMM(a,b,c) M_OP2_IMM(24, a, c, b)
197 #define M_ORIS(a,b,c) M_OP2_IMM(25, a, c, b)
198 #define M_XOR(a,b,c) M_OP3(31, 316, 0, 0, a, c, b)
199 #define M_XOR_IMM(a,b,c) M_OP2_IMM(26, a, c, b)
200 #define M_XORIS(a,b,c) M_OP2_IMM(27, a, c, b)
202 /* RLDICR is said to be turing complete, this seems right */
203 #define M_SLL(a,b,c) M_OP3(31, 27, 0, 0, a, c, b)
204 #define M_SLL_IMM(a,b,c) M_OP3(30, ((b)&0x20 ? 1:0), 0, ((((63-(b))&0x1f)<<6) | (((63-(b))&0x20 ? 1:0)<<5) | 0x04), a, c, (b)&0x1f);
205 #define M_SRL(a,b,c) M_OP3(31, 539, 0, 0, a, c, b)
206 #define M_SRL_IMM(a,b,c) M_OP3(30, ((64-(b))&0x20 ? 1:0), 0, (((((b))&0x1f)<<6) | ((((b))&0x20 ? 1:0)<<5) | 0x00), a, c, (64-(b))&0x1f);
207 #define M_SRA(a,b,c) M_OP3(31, 794, 0, 0, a, c, b)
208 #define M_SRA_IMM(a,b,c) M_OP3(31, (826 | ((b)&0x20?1:0)), 0, 0, a, c, ((b)&0x1f))
210 #define M_MUL(a,b,c) M_OP3(31, 233, 0, 0, c, a, b)
211 #define M_MUL_IMM(a,b,c) M_OP2_IMM(7, c, a, b)
212 #define M_DIV(a,b,c) M_OP3(31, 489, 1, 0, c, a, b)
214 #define M_NEG(a,b) M_OP3(31, 104, 0, 0, b, a, 0)
215 #define M_NOT(a,b) M_OP3(31, 124, 0, 0, a, b, a)
217 #define M_SUBFIC(a,b,c) M_OP2_IMM(8, c, a, b)
218 #define M_SUBFZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
219 #define M_RLWINM(a,b,c,d,e) M_OP4(21, d, 0, a, e, b, c)
220 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
221 #define M_ADDIS(a,b,c) M_OP2_IMM(15, c, a, b)
222 #define M_STFIWX(a,b,c) M_OP3(31, 983, 0, 0, a, b, c)
224 #define M_LWAX(a,b,c) M_OP3(31, 341, 0, 0, a, b, c)
225 #define M_LHZX(a,b,c) M_OP3(31, 279, 0, 0, a, b, c)
226 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
227 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
228 #define M_LBZX(a,b,c) M_OP3(31, 87, 0, 0, a, b, c)
229 #define M_LFSX(a,b,c) M_OP3(31, 535, 0, 0, a, b, c)
230 #define M_LFDX(a,b,c) M_OP3(31, 599, 0, 0, a, b, c)
232 #define M_STWX(a,b,c) M_OP3(31, 151, 0, 0, a, b, c)
233 #define M_STHX(a,b,c) M_OP3(31, 407, 0, 0, a, b, c)
234 #define M_STBX(a,b,c) M_OP3(31, 215, 0, 0, a, b, c)
235 #define M_STFSX(a,b,c) M_OP3(31, 663, 0, 0, a, b, c)
236 #define M_STFDX(a,b,c) M_OP3(31, 727, 0, 0, a, b, c)
239 #define M_STWU_INTERN(a,b,disp) M_OP2_IMM(37,a,b,disp)
240 #define M_STWU(a,b,disp) \
242 s4 lo = (disp) & 0x0000ffff; \
243 s4 hi = ((disp) >> 16); \
244 if (((disp) >= -32678) && ((disp) <= 32767)) { \
245 M_STWU_INTERN(a,b,lo); \
247 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
248 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
249 M_STWUX(REG_SP,REG_SP,REG_ITMP3); \
253 #define M_STWUX(a,b,c) M_OP3(31,183,0,0,a,b,c)
256 #define M_STDU_INTERN(a,b,disp) M_OP2_IMM(62,a,b,(disp)|0x0001)
257 #define M_STDU(a,b,disp) \
259 s4 lo = (disp) & 0x0000ffff; \
260 s4 hi = ((disp) >> 16); \
261 if (((disp) >= -32678) && ((disp) <= 32767)) { \
262 M_STDU_INTERN(a,b,lo); \
264 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
265 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
266 M_STDUX(REG_SP,REG_SP,REG_ITMP3); \
269 #define M_STDUX(a,b,c) M_OP3(31,181,0,0,a,b,c)
271 #define M_LDAH(a,b,c) M_ADDIS(b, c, a)
272 #define M_TRAP M_OP3(31, 4, 0, 0, 31, 0, 0)
274 #define M_NOP M_OR_IMM(0, 0, 0)
275 #define M_MOV(a,b) M_OR(a, a, b)
276 #define M_TST(a) M_OP3(31, 444, 0, 1, a, a, a)
278 #define M_DADD(a,b,c) M_OP3(63, 21, 0, 0, c, a, b)
279 #define M_FADD(a,b,c) M_OP3(59, 21, 0, 0, c, a, b)
280 #define M_DSUB(a,b,c) M_OP3(63, 20, 0, 0, c, a, b)
281 #define M_FSUB(a,b,c) M_OP3(59, 20, 0, 0, c, a, b)
282 #define M_DMUL(a,b,c) M_OP4(63, 25, 0, c, a, 0, b)
283 #define M_FMUL(a,b,c) M_OP4(59, 25, 0, c, a, 0, b)
284 #define M_DDIV(a,b,c) M_OP3(63, 18, 0, 0, c, a, b)
285 #define M_FDIV(a,b,c) M_OP3(59, 18, 0, 0, c, a, b)
287 #define M_FABS(a,b) M_OP3(63, 264, 0, 0, b, 0, a)
288 #define M_CVTDL(a,b) M_OP3(63, 14, 0, 0, b, 0, a)
289 #define M_CVTDL_C(a,b) M_OP3(63, 15, 0, 0, b, 0, a)
290 #define M_CVTDF(a,b) M_OP3(63, 12, 0, 0, b, 0, a)
291 #define M_FMOV(a,b) M_OP3(63, 72, 0, 0, b, 0, a)
292 #define M_FMOVN(a,b) M_OP3(63, 40, 0, 0, b, 0, a)
293 #define M_DSQRT(a,b) M_OP3(63, 22, 0, 0, b, 0, a)
294 #define M_FSQRT(a,b) M_OP3(59, 22, 0, 0, b, 0, a)
296 #define M_FCMPU(a,b) M_OP3(63, 0, 0, 0, 0, a, b)
297 #define M_FCMPO(a,b) M_OP3(63, 32, 0, 0, 0, a, b)
299 #define M_BLDU(a,b,c) M_OP2_IMM(34, a, b, c) /* LBZ */
300 #define M_SLDU(a,b,c) M_OP2_IMM(40, a, b, c) /* LHZ */
303 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(32,a,b,disp) /* LWZ */
306 #define M_LWZ(a,b,disp) M_OP2_IMM(32,a,b,disp) /* needed for hardware exceptions */
308 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(58, a, b, (((disp) & 0xfffe) | 0x0002)) /* this is LWA actually */
310 #define M_ILD(a,b,disp) \
312 s4 lo = (short) (disp); \
313 s4 hi = (short) (((disp) - lo) >> 16); \
315 M_ILD_INTERN(a,b,lo); \
318 M_ILD_INTERN(a,a,lo); \
322 #define M_LLD_INTERN(a,b,disp) M_OP2_IMM(58,a,b,disp) /* LD */
324 #define M_LLD(a,b,disp) \
326 s4 lo = (short) (disp); \
327 s4 hi = (short) (((disp) - lo) >> 16); \
329 M_LLD_INTERN(a,b,lo); \
332 M_LLD_INTERN(a,GET_LOW_REG(a),lo); \
336 #define M_ALD_INTERN(a,b,disp) M_LLD_INTERN(a,b,disp)
337 #define M_ALD(a,b,disp) M_LLD(a,b,disp)
338 #define M_ALDX(a,b,c) M_OP3(31, 21, 0, 0, a, b, c) /* LDX */
340 #define M_BST(a,b,c) M_OP2_IMM(38, a, b, c) /* STB */
341 #define M_SST(a,b,c) M_OP2_IMM(44, a, b, c) /* LMW */
343 #define M_IST_INTERN(a,b,disp) M_OP2_IMM(36,a,b,disp) /* STW */
345 /* Stores with displacement overflow should only happen with PUTFIELD
346 or on the stack. The PUTFIELD instruction does not use REG_ITMP3
347 and a reg_of_var call should not use REG_ITMP3!!! */
349 #define M_IST(a,b,disp) \
351 s4 lo = (short) (disp); \
352 s4 hi = (short) (((disp) - lo) >> 16); \
354 M_IST_INTERN(a,b,lo); \
356 M_ADDIS(b,hi,REG_ITMP3); \
357 M_IST_INTERN(a,REG_ITMP3,lo); \
361 #define M_LST_INTERN(a,b,disp) M_OP2_IMM(62,a,b,disp) /* STD */
363 #define M_LST(a,b,disp) \
365 s4 lo = (short) (disp); \
366 s4 hi = (short) (((disp) - lo) >> 16); \
368 M_LST_INTERN(a,b,lo); \
370 M_ADDIS(b,hi,REG_ITMP3); \
371 M_LST_INTERN(a,REG_ITMP3, lo); \
375 #define M_AST_INTERN(a,b,disp) M_LST_INTERN(a,b,disp)
376 #define M_AST(a,b,disp) M_LST(a,b,disp)
377 #define M_ASTX(a,b,c) M_OP3(31, 149, 0, 0, a, b, c)
378 #define M_LSTX(a,b,c) M_ASTX(a,b,c)
381 #define M_BSEXT(a,b) M_OP3(31, 954, 0, 0, a, b, 0)
382 #define M_CZEXT(a,b) M_RLWINM(a,0,16,31,b)
383 #define M_SSEXT(a,b) M_OP3(31, 922, 0, 0, a, b, 0)
384 #define M_ISEXT(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
386 #define M_BR(a) M_B(18, a, 0, 0)
387 #define M_BL(a) M_B(18, a, 0, 1)
388 #define M_RET M_OP3(19, 16, 0, 0, 20, 0, 0)
389 #define M_JSR M_OP3(19, 528, 0, 1, 20, 0, 0)
390 #define M_RTS M_OP3(19, 528, 0, 0, 20, 0, 0)
392 #define M_CMP(a,b) M_OP3(31, 0, 0, 0, 1, a, b)
393 #define M_CMPU(a,b) M_OP3(31, 32, 0, 0, 1, a, b)
394 #define M_CMPI(a,b) M_OP2_IMM(11, 1, a, b)
395 #define M_CMPUI(a,b) M_OP2_IMM(10, 1, a, b)
397 #define M_BLT(a) M_BC(16, 12, 0, a, 0, 0)
398 #define M_BLE(a) M_BC(16, 4, 1, a, 0, 0)
399 #define M_BGT(a) M_BC(16, 12, 1, a, 0, 0)
400 #define M_BGE(a) M_BC(16, 4, 0, a, 0, 0)
401 #define M_BEQ(a) M_BC(16, 12, 2, a, 0, 0)
402 #define M_BNE(a) M_BC(16, 4, 2, a, 0, 0)
403 #define M_BNAN(a) M_BC(16, 12, 3, a, 0, 0)
405 #define M_FLD_INTERN(a,b,disp) M_OP2_IMM(48,a,b,disp)
406 #define M_DLD_INTERN(a,b,disp) M_OP2_IMM(50,a,b,disp)
408 #define M_FLD(a,b,disp) \
410 s4 lo = (short) (disp); \
411 s4 hi = (short) (((disp) - lo) >> 16); \
413 M_FLD_INTERN(a,b,lo); \
415 M_ADDIS(b,hi,REG_ITMP3); \
416 M_FLD_INTERN(a,REG_ITMP3,lo); \
420 #define M_DLD(a,b,disp) \
422 s4 lo = (short) (disp); \
423 s4 hi = (short) (((disp) - lo) >> 16); \
425 M_DLD_INTERN(a,b,lo); \
427 M_ADDIS(b,hi,REG_ITMP3); \
428 M_DLD_INTERN(a,REG_ITMP3,lo); \
432 #define M_FST_INTERN(a,b,disp) M_OP2_IMM(52,a,b,disp) /* STFS */
433 #define M_DST_INTERN(a,b,disp) M_OP2_IMM(54,a,b,disp) /* STFD */
435 #define M_FST(a,b,disp) \
437 s4 lo = (short) (disp); \
438 s4 hi = (short) (((disp) - lo) >> 16); \
440 M_FST_INTERN(a,b,lo); \
442 M_ADDIS(b,hi,REG_ITMP3); \
443 M_FST_INTERN(a,REG_ITMP3,lo); \
447 #define M_DST(a,b,disp) \
449 s4 lo = (short) (disp); \
450 s4 hi = (short) (((disp) - lo) >> 16); \
452 M_DST_INTERN(a,b,lo); \
454 M_ADDIS(b,hi,REG_ITMP3); \
455 M_DST_INTERN(a,REG_ITMP3,lo); \
459 #define M_MFLR(a) M_OP3(31, 339, 0, 0, a, 8, 0)
460 #define M_MFXER(a) M_OP3(31, 339, 0, 0, a, 1, 0)
461 #define M_MFCTR(a) M_OP3(31, 339, 0, 0, a, 9, 0)
462 #define M_MTLR(a) M_OP3(31, 467, 0, 0, a, 8, 0)
463 #define M_MTXER(a) M_OP3(31, 467, 0, 0, a, 1, 0)
464 #define M_MTCTR(a) M_OP3(31, 467, 0, 0, a, 9, 0)
466 #define M_LDA_INTERN(a,b,c) M_LADD_IMM(b, c, a)
468 #define M_LDA(a,b,disp) \
470 s4 lo = (short) (disp); \
471 s4 hi = (short) (((disp) - lo) >> 16); \
473 M_LDA_INTERN(a,b,lo); \
476 M_LDA_INTERN(a,a,lo); \
481 #define M_LDATST(a,b,c) M_ADDICTST(b, c, a)
482 #define M_CLR(a) M_LADD_IMM(0, 0, a)
483 #define M_CLR_HIGH(a) M_OP3(30, 0, 0, 0x20, (a), (a), 0);
484 #define M_AADD_IMM(a,b,c) M_LADD_IMM(a, b, c)
486 #endif /* _CODEGEN_H */
490 * These are local overrides for various environment variables in Emacs.
491 * Please do not remove this and leave it at the end of the file, where
492 * Emacs will automagically detect them.
493 * ---------------------------------------------------------------------
496 * indent-tabs-mode: t