src/vm/jit/powerpc/emit.c

   1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33
  34 #include "vm/types.h"
  35
  36 #include "md-abi.h"
  37
  38 #include "vm/jit/powerpc/codegen.h"
  39
  40 #include "mm/memory.h"
  41
  42 #if defined(ENABLE_THREADS)
  43 # include "threads/native/lock.h"
  44 #endif
  45
  46 #include "vm/builtin.h"
  47 #include "vm/exceptions.h"
  48
  49 #include "vm/jit/asmpart.h"
  50 #include "vm/jit/codegen-common.h"
  51 #include "vm/jit/dseg.h"
  52 #include "vm/jit/emit-common.h"
  53 #include "vm/jit/jit.h"
  54 #include "vm/jit/replace.h"
  55
  56 #include "vmcore/options.h"
  57
  58
  59 /* emit_load *******************************************************************
  60
  61    Emits a possible load of an operand.
  62
  63 *******************************************************************************/
  64
  65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  66 {
  67         codegendata *cd;
  68         s4           disp;
  69         s4           reg;
  70
  71         /* get required compiler data */
  72
  73         cd = jd->cd;
  74
  75         if (IS_INMEMORY(src->flags)) {
  76                 COUNT_SPILLS;
  77
  78                 disp = src->vv.regoff * 4;
  79
  80                 switch (src->type) {
  81                 case TYPE_INT:
  82                 case TYPE_ADR:
  83                         M_ILD(tempreg, REG_SP, disp);
  84                         break;
  85                 case TYPE_LNG:
  86                         M_LLD(tempreg, REG_SP, disp);
  87                         break;
  88                 case TYPE_FLT:
  89                         M_FLD(tempreg, REG_SP, disp);
  90                         break;
  91                 case TYPE_DBL:
  92                         M_DLD(tempreg, REG_SP, disp);
  93                         break;
  94                 default:
  95                         vm_abort("emit_load: unknown type %d", src->type);
  96                 }
  97
  98                 reg = tempreg;
  99         }
 100         else
 101                 reg = src->vv.regoff;
 102
 103         return reg;
 104 }
 105
 106
 107 /* emit_load_low ***************************************************************
 108
 109    Emits a possible load of the low 32-bits of an operand.
 110
 111 *******************************************************************************/
 112
 113 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 114 {
 115         codegendata  *cd;
 116         s4            disp;
 117         s4            reg;
 118
 119         assert(src->type == TYPE_LNG);
 120
 121         /* get required compiler data */
 122
 123         cd = jd->cd;
 124
 125         if (IS_INMEMORY(src->flags)) {
 126                 COUNT_SPILLS;
 127
 128                 disp = src->vv.regoff * 4;
 129
 130                 M_ILD(tempreg, REG_SP, disp + 4);
 131
 132                 reg = tempreg;
 133         }
 134         else
 135                 reg = GET_LOW_REG(src->vv.regoff);
 136
 137         return reg;
 138 }
 139
 140
 141 /* emit_load_high **************************************************************
 142
 143    Emits a possible load of the high 32-bits of an operand.
 144
 145 *******************************************************************************/
 146
 147 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 148 {
 149         codegendata  *cd;
 150         s4            disp;
 151         s4            reg;
 152
 153         assert(src->type == TYPE_LNG);
 154
 155         /* get required compiler data */
 156
 157         cd = jd->cd;
 158
 159         if (IS_INMEMORY(src->flags)) {
 160                 COUNT_SPILLS;
 161
 162                 disp = src->vv.regoff * 4;
 163
 164                 M_ILD(tempreg, REG_SP, disp);
 165
 166                 reg = tempreg;
 167         }
 168         else
 169                 reg = GET_HIGH_REG(src->vv.regoff);
 170
 171         return reg;
 172 }
 173
 174
 175 /* emit_store ******************************************************************
 176
 177    Emit a possible store for the given variable.
 178
 179 *******************************************************************************/
 180
 181 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 182 {
 183         codegendata *cd;
 184         s4           disp;
 185
 186         /* get required compiler data */
 187
 188         cd = jd->cd;
 189
 190         if (IS_INMEMORY(dst->flags)) {
 191                 COUNT_SPILLS;
 192
 193                 disp = dst->vv.regoff * 4;
 194
 195                 switch (dst->type) {
 196                 case TYPE_INT:
 197                 case TYPE_ADR:
 198                         M_IST(d, REG_SP, disp);
 199                         break;
 200                 case TYPE_LNG:
 201                         M_LST(d, REG_SP, disp);
 202                         break;
 203                 case TYPE_FLT:
 204                         M_FST(d, REG_SP, disp);
 205                         break;
 206                 case TYPE_DBL:
 207                         M_DST(d, REG_SP, disp);
 208                         break;
 209                 default:
 210                         vm_abort("emit_store: unknown type %d", dst->type);
 211                 }
 212         }
 213 }
 214
 215
 216 /* emit_copy *******************************************************************
 217
 218    Generates a register/memory to register/memory copy.
 219
 220 *******************************************************************************/
 221
 222 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
 223 {
 224         codegendata  *cd;
 225         s4            s1, d;
 226
 227         /* get required compiler data */
 228
 229         cd = jd->cd;
 230
 231         if ((src->vv.regoff != dst->vv.regoff) ||
 232                 (IS_INMEMORY(src->flags ^ dst->flags))) {
 233
 234                 /* If one of the variables resides in memory, we can eliminate
 235                    the register move from/to the temporary register with the
 236                    order of getting the destination register and the load. */
 237
 238                 if (IS_INMEMORY(src->flags)) {
 239                         if (IS_LNG_TYPE(src->type))
 240                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 241                         else
 242                                 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 243
 244                         s1 = emit_load(jd, iptr, src, d);
 245                 }
 246                 else {
 247                         if (IS_LNG_TYPE(src->type))
 248                                 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 249                         else
 250                                 s1 = emit_load(jd, iptr, src, REG_IFTMP);
 251
 252                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 253                 }
 254
 255                 if (s1 != d) {
 256                         switch (src->type) {
 257                         case TYPE_INT:
 258                         case TYPE_ADR:
 259                                 M_MOV(s1, d);
 260                                 break;
 261                         case TYPE_LNG:
 262                                 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
 263                                 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 264                                 break;
 265                         case TYPE_FLT:
 266                         case TYPE_DBL:
 267                                 M_FMOV(s1, d);
 268                                 break;
 269                         default:
 270                                 vm_abort("emit_copy: unknown type %d", dst->type);
 271                         }
 272                 }
 273
 274                 emit_store(jd, iptr, dst, d);
 275         }
 276 }
 277
 278
 279 /* emit_iconst *****************************************************************
 280
 281    XXX
 282
 283 *******************************************************************************/
 284
 285 void emit_iconst(codegendata *cd, s4 d, s4 value)
 286 {
 287         s4 disp;
 288
 289         if ((value >= -32768) && (value <= 32767))
 290                 M_LDA_INTERN(d, REG_ZERO, value);
 291         else {
 292                 disp = dseg_add_s4(cd, value);
 293                 M_ILD(d, REG_PV, disp);
 294         }
 295 }
 296
 297
 298 /* emit_branch *****************************************************************
 299
 300    Emits the code for conditional and unconditional branchs.
 301
 302 *******************************************************************************/
 303
 304 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 305 {
 306         s4 checkdisp;
 307         s4 branchdisp;
 308
 309         /* calculate the different displacements */
 310
 311         checkdisp  =  disp + 4;
 312         branchdisp = (disp - 4) >> 2;
 313
 314         /* check which branch to generate */
 315
 316         if (condition == BRANCH_UNCONDITIONAL) {
 317                 /* check displacement for overflow */
 318
 319                 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
 320                         /* if the long-branches flag isn't set yet, do it */
 321
 322                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 323                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 324                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 325                         }
 326
 327                         vm_abort("emit_branch: emit unconditional long-branch code");
 328                 }
 329                 else {
 330                         M_BR(branchdisp);
 331                 }
 332         }
 333         else {
 334                 /* and displacement for overflow */
 335
 336                 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
 337                         /* if the long-branches flag isn't set yet, do it */
 338
 339                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 340                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 341                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 342                         }
 343
 344                         switch (condition) {
 345                         case BRANCH_EQ:
 346                                 M_BNE(1);
 347                                 M_BR(branchdisp);
 348                                 break;
 349                         case BRANCH_NE:
 350                                 M_BEQ(1);
 351                                 M_BR(branchdisp);
 352                                 break;
 353                         case BRANCH_LT:
 354                                 M_BGE(1);
 355                                 M_BR(branchdisp);
 356                                 break;
 357                         case BRANCH_GE:
 358                                 M_BLT(1);
 359                                 M_BR(branchdisp);
 360                                 break;
 361                         case BRANCH_GT:
 362                                 M_BLE(1);
 363                                 M_BR(branchdisp);
 364                                 break;
 365                         case BRANCH_LE:
 366                                 M_BGT(1);
 367                                 M_BR(branchdisp);
 368                                 break;
 369                         case BRANCH_NAN:
 370                                 vm_abort("emit_branch: long BRANCH_NAN");
 371                                 break;
 372                         default:
 373                                 vm_abort("emit_branch: unknown condition %d", condition);
 374                         }
 375                 }
 376                 else {
 377                         switch (condition) {
 378                         case BRANCH_EQ:
 379                                 M_BEQ(branchdisp);
 380                                 break;
 381                         case BRANCH_NE:
 382                                 M_BNE(branchdisp);
 383                                 break;
 384                         case BRANCH_LT:
 385                                 M_BLT(branchdisp);
 386                                 break;
 387                         case BRANCH_GE:
 388                                 M_BGE(branchdisp);
 389                                 break;
 390                         case BRANCH_GT:
 391                                 M_BGT(branchdisp);
 392                                 break;
 393                         case BRANCH_LE:
 394                                 M_BLE(branchdisp);
 395                                 break;
 396                         case BRANCH_NAN:
 397                                 M_BNAN(branchdisp);
 398                                 break;
 399                         default:
 400                                 vm_abort("emit_branch: unknown condition %d", condition);
 401                         }
 402                 }
 403         }
 404 }
 405
 406
 407 /* emit_arithmetic_check *******************************************************
 408
 409    Emit an ArithmeticException check.
 410
 411 *******************************************************************************/
 412
 413 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 414 {
 415         if (INSTRUCTION_MUST_CHECK(iptr)) {
 416                 M_TST(reg);
 417                 M_BNE(1);
 418                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
 419         }
 420 }
 421
 422
 423 /* emit_arrayindexoutofbounds_check ********************************************
 424
 425    Emit a ArrayIndexOutOfBoundsException check.
 426
 427 *******************************************************************************/
 428
 429 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 430 {
 431         if (INSTRUCTION_MUST_CHECK(iptr)) {
 432                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
 433                 M_TRAPGEU(s2, REG_ITMP3);
 434         }
 435 }
 436
 437
 438 /* emit_classcast_check ********************************************************
 439
 440    Emit a ClassCastException check.
 441
 442 *******************************************************************************/
 443
 444 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 445 {
 446         if (INSTRUCTION_MUST_CHECK(iptr)) {
 447                 switch (condition) {
 448                 case BRANCH_LE:
 449                         M_BGT(1);
 450                         break;
 451                 case BRANCH_EQ:
 452                         M_BNE(1);
 453                         break;
 454                 case BRANCH_GT:
 455                         M_BLE(1);
 456                         break;
 457                 default:
 458                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 459                 }
 460                 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
 461         }
 462 }
 463
 464
 465 /* emit_nullpointer_check ******************************************************
 466
 467    Emit a NullPointerException check.
 468
 469 *******************************************************************************/
 470
 471 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 472 {
 473         if (INSTRUCTION_MUST_CHECK(iptr)) {
 474                 M_TST(reg);
 475                 M_BNE(1);
 476                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
 477         }
 478 }
 479
 480
 481 /* emit_exception_check ********************************************************
 482
 483    Emit an Exception check.
 484
 485 *******************************************************************************/
 486
 487 void emit_exception_check(codegendata *cd, instruction *iptr)
 488 {
 489         if (INSTRUCTION_MUST_CHECK(iptr)) {
 490                 M_TST(REG_RESULT);
 491                 M_BNE(1);
 492                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
 493         }
 494 }
 495
 496
 497 /* emit_patcher_stubs **********************************************************
 498
 499    Generates the code for the patcher stubs.
 500
 501 *******************************************************************************/
 502
 503 void emit_patcher_stubs(jitdata *jd)
 504 {
 505         codegendata *cd;
 506         patchref    *pref;
 507         u4           mcode;
 508         u1          *savedmcodeptr;
 509         u1          *tmpmcodeptr;
 510         s4           targetdisp;
 511         s4           disp;
 512
 513         /* get required compiler data */
 514
 515         cd = jd->cd;
 516
 517         /* generate code patching stub call code */
 518
 519         targetdisp = 0;
 520
 521         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
 522                 /* check code segment size */
 523
 524                 MCODECHECK(100);
 525
 526                 /* Get machine code which is patched back in later. The
 527                    call is 1 instruction word long. */
 528
 529                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
 530
 531                 mcode = *((u4 *) tmpmcodeptr);
 532
 533                 /* Patch in the call to call the following code (done at
 534                    compile time). */
 535
 536                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
 537                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
 538
 539                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
 540                 M_BR(disp);
 541
 542                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
 543
 544                 /* create stack frame - keep stack 16-byte aligned */
 545
 546                 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
 547
 548                 /* calculate return address and move it onto the stack */
 549
 550                 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
 551                 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
 552
 553                 /* move pointer to java_objectheader onto stack */
 554
 555 #if defined(ENABLE_THREADS)
 556                 /* order reversed because of data segment layout */
 557
 558                 (void) dseg_add_unique_address(cd, NULL);                  /* flcword */
 559                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
 560                 disp = dseg_add_unique_address(cd, NULL);                  /* vftbl   */
 561
 562                 M_LDA(REG_ITMP3, REG_PV, disp);
 563                 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
 564 #else
 565                 /* do nothing */
 566 #endif
 567
 568                 /* move machine code onto stack */
 569
 570                 disp = dseg_add_s4(cd, mcode);
 571                 M_ILD(REG_ITMP3, REG_PV, disp);
 572                 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
 573
 574                 /* move class/method/field reference onto stack */
 575
 576                 disp = dseg_add_address(cd, pref->ref);
 577                 M_ALD(REG_ITMP3, REG_PV, disp);
 578                 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
 579
 580                 /* move data segment displacement onto stack */
 581
 582                 disp = dseg_add_s4(cd, pref->disp);
 583                 M_ILD(REG_ITMP3, REG_PV, disp);
 584                 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
 585
 586                 /* move patcher function pointer onto stack */
 587
 588                 disp = dseg_add_functionptr(cd, pref->patcher);
 589                 M_ALD(REG_ITMP3, REG_PV, disp);
 590                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
 591
 592                 if (targetdisp == 0) {
 593                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
 594
 595                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
 596                         M_ALD(REG_ITMP3, REG_PV, disp);
 597                         M_MTCTR(REG_ITMP3);
 598                         M_RTS;
 599                 }
 600                 else {
 601                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
 602                                 (((u4 *) cd->mcodeptr) + 1);
 603                         M_BR(disp);
 604                 }
 605         }
 606 }
 607
 608
 609 /* emit_replacement_stubs ******************************************************
 610
 611    Generates the code for the replacement stubs.
 612
 613 *******************************************************************************/
 614
 615 #if defined(ENABLE_REPLACEMENT)
 616 void emit_replacement_stubs(jitdata *jd)
 617 {
 618         codegendata *cd;
 619         codeinfo    *code;
 620         rplpoint    *rplp;
 621         s4           disp;
 622         s4           i;
 623 #if !defined(NDEBUG)
 624         u1          *savedmcodeptr;
 625 #endif
 626
 627         /* get required compiler data */
 628
 629         cd   = jd->cd;
 630         code = jd->code;
 631
 632         rplp = code->rplpoints;
 633
 634         /* store beginning of replacement stubs */
 635
 636         code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
 637
 638         for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
 639                 /* do not generate stubs for non-trappable points */
 640
 641                 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
 642                         continue;
 643
 644                 /* check code segment size */
 645
 646                 MCODECHECK(100);
 647
 648 #if !defined(NDEBUG)
 649                 savedmcodeptr = cd->mcodeptr;
 650 #endif
 651
 652                 /* create stack frame - keep 16-byte aligned */
 653
 654                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
 655
 656                 /* push address of `rplpoint` struct */
 657
 658                 disp = dseg_add_address(cd, rplp);
 659                 M_ALD(REG_ITMP3, REG_PV, disp);
 660                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
 661
 662                 /* jump to replacement function */
 663
 664                 disp = dseg_add_functionptr(cd, asm_replacement_out);
 665                 M_ALD(REG_ITMP3, REG_PV, disp);
 666                 M_MTCTR(REG_ITMP3);
 667                 M_RTS;
 668
 669                 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
 670         }
 671 }
 672 #endif /* defined(ENABLE_REPLACEMENT) */
 673
 674
 675 /* emit_verbosecall_enter ******************************************************
 676
 677    Generates the code for the call trace.
 678
 679 *******************************************************************************/
 680
 681 void emit_verbosecall_enter(jitdata *jd)
 682 {
 683 #if !defined(NDEBUG)
 684         methodinfo   *m;
 685         codegendata  *cd;
 686         registerdata *rd;
 687         s4 s1, p, t, d;
 688         int stack_off;
 689         int stack_size;
 690         methoddesc *md;
 691
 692         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 693                 return;
 694
 695         /* get required compiler data */
 696
 697         m  = jd->m;
 698         cd = jd->cd;
 699         rd = jd->rd;
 700
 701         md = m->parseddesc;
 702
 703         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
 704         /* For Darwin:                                                        */
 705         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
 706         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
 707         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
 708         /* For Linux:                                                         */
 709         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
 710         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
 711         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
 712         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
 713
 714         /* in nativestubs no Place to save the LR (Link Register) would be needed */
 715         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
 716         /* be padded again */
 717
 718 #if defined(__DARWIN__)
 719         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
 720 #else
 721         stack_size = 6 * 16;
 722 #endif
 723
 724         /* mark trace code */
 725
 726         M_NOP;
 727
 728         M_MFLR(REG_ZERO);
 729         M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 730         M_STWU(REG_SP, REG_SP, -stack_size);
 731
 732         M_CLR(REG_ITMP1);    /* clear help register */
 733
 734         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
 735 #if defined(__DARWIN__)
 736         /* Copy Params starting from first to Stack                          */
 737         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */
 738         /* are saved                                                         */
 739         p = 0;
 740 #else
 741         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
 742         /* integer argument regs                                             */
 743         /* all integer argument registers have to be saved                   */
 744         for (p = 0; p < 8; p++) {
 745                 d = rd->argintregs[p];
 746                 /* save integer argument registers */
 747                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
 748         }
 749         p = 4;
 750 #endif
 751         stack_off = LA_SIZE;
 752         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
 753                 t = md->paramtypes[p].type;
 754                 if (IS_INT_LNG_TYPE(t)) {
 755                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
 756                                 if (IS_2_WORD_TYPE(t)) {
 757                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
 758                                                   , REG_SP, stack_off);
 759                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
 760                                                   , REG_SP, stack_off + 4);
 761                                 } else {
 762                                         M_IST(REG_ITMP1, REG_SP, stack_off);
 763                                         M_IST(rd->argintregs[md->params[p].regoff]
 764                                                   , REG_SP, stack_off + 4);
 765                                 }
 766                         } else { /* Param on Stack */
 767                                 s1 = (md->params[p].regoff + cd->stackframesize) * 4
 768                                         + stack_size;
 769                                 if (IS_2_WORD_TYPE(t)) {
 770                                         M_ILD(REG_ITMP2, REG_SP, s1);
 771                                         M_IST(REG_ITMP2, REG_SP, stack_off);
 772                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
 773                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
 774                                 } else {
 775                                         M_IST(REG_ITMP1, REG_SP, stack_off);
 776                                         M_ILD(REG_ITMP2, REG_SP, s1);
 777                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
 778                                 }
 779                         }
 780                 } else { /* IS_FLT_DBL_TYPE(t) */
 781                         if (!md->params[p].inmemory) { /* in Arg Reg */
 782                                 s1 = rd->argfltregs[md->params[p].regoff];
 783                                 if (!IS_2_WORD_TYPE(t)) {
 784                                         M_IST(REG_ITMP1, REG_SP, stack_off);
 785                                         M_FST(s1, REG_SP, stack_off + 4);
 786                                 } else {
 787                                         M_DST(s1, REG_SP, stack_off);
 788                                 }
 789                         } else { /* on Stack */
 790                                 /* this should not happen */
 791                         }
 792                 }
 793         }
 794
 795         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
 796 #if defined(__DARWIN__)
 797         for (p = 0; p < 8; p++) {
 798                 d = rd->argintregs[p];
 799                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
 800         }
 801 #else
 802         /* LINUX */
 803         /* Set integer and float argument registers vor trace_args call */
 804         /* offset to saved integer argument registers                   */
 805         stack_off = LA_SIZE + 4 * 8 + 4;
 806         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
 807                 t = md->paramtypes[p].type;
 808                 if (IS_INT_LNG_TYPE(t)) {
 809                         /* "stretch" int types */
 810                         if (!IS_2_WORD_TYPE(t)) {
 811                                 M_CLR(rd->argintregs[2 * p]);
 812                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
 813                                 stack_off += 4;
 814                         } else {
 815                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
 816                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
 817                                 stack_off += 8;
 818                         }
 819                 } else { /* Float/Dbl */
 820                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
 821                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
 822                                 /* float/double arg reg to int reg                    */
 823                                 s1 = rd->argfltregs[md->params[p].regoff];
 824                                 if (!IS_2_WORD_TYPE(t)) {
 825                                         M_FST(s1, REG_SP, 5 * 16);
 826                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
 827                                         M_CLR(rd->argintregs[2 * p]);
 828                                 } else {
 829                                         M_DST(s1, REG_SP, 5 * 16);
 830                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
 831                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
 832                                 }
 833                         }
 834                 }
 835         }
 836 #endif
 837
 838         /* put methodinfo pointer on Stackframe */
 839         p = dseg_add_address(cd, m);
 840         M_ALD(REG_ITMP1, REG_PV, p);
 841 #if defined(__DARWIN__)
 842         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
 843 #else
 844         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
 845 #endif
 846         p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 847         M_ALD(REG_ITMP2, REG_PV, p);
 848         M_MTCTR(REG_ITMP2);
 849         M_JSR;
 850
 851 #if defined(__DARWIN__)
 852         /* restore integer argument registers from the reserved stack space */
 853
 854         stack_off = LA_SIZE;
 855         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
 856                  p++, stack_off += 8) {
 857                 t = md->paramtypes[p].type;
 858
 859                 if (IS_INT_LNG_TYPE(t)) {
 860                         if (!md->params[p].inmemory) {
 861                                 if (IS_2_WORD_TYPE(t)) {
 862                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
 863                                                   , REG_SP, stack_off);
 864                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
 865                                                   , REG_SP, stack_off + 4);
 866                                 } else {
 867                                         M_ILD(rd->argintregs[md->params[p].regoff]
 868                                                   , REG_SP, stack_off + 4);
 869                                 }
 870                         }
 871                 }
 872         }
 873 #else
 874         /* LINUX */
 875         for (p = 0; p < 8; p++) {
 876                 d = rd->argintregs[p];
 877                 /* save integer argument registers */
 878                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
 879         }
 880 #endif
 881
 882         M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
 883         M_MTLR(REG_ZERO);
 884         M_LDA(REG_SP, REG_SP, stack_size);
 885
 886         /* mark trace code */
 887
 888         M_NOP;
 889 #endif /* !defined(NDEBUG) */
 890 }
 891
 892
 893 /* emit_verbosecall_exit *******************************************************
 894
 895    Generates the code for the call trace.
 896
 897    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
 898
 899 *******************************************************************************/
 900
 901 void emit_verbosecall_exit(jitdata *jd)
 902 {
 903 #if !defined(NDEBUG)
 904         methodinfo   *m;
 905         codegendata  *cd;
 906         registerdata *rd;
 907         methoddesc   *md;
 908         s4            disp;
 909
 910         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 911                 return;
 912
 913         /* get required compiler data */
 914
 915         m  = jd->m;
 916         cd = jd->cd;
 917         rd = jd->rd;
 918
 919         md = m->parseddesc;
 920
 921         /* mark trace code */
 922
 923         M_NOP;
 924
 925         M_MFLR(REG_ZERO);
 926         M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 927         M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
 928
 929         /* save return registers */
 930
 931         M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
 932         M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
 933
 934         /* keep this order */
 935         switch (md->returntype.type) {
 936         case TYPE_INT:
 937         case TYPE_ADR:
 938                 M_INTMOVE(REG_RESULT, REG_A1);
 939                 M_CLR(REG_A0);
 940                 break;
 941
 942         case TYPE_LNG:
 943                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
 944                 break;
 945         }
 946
 947         M_FLTMOVE(REG_FRESULT, REG_FA0);
 948         M_FLTMOVE(REG_FRESULT, REG_FA1);
 949
 950         disp = dseg_add_address(cd, m);
 951         M_ALD(REG_A2, REG_PV, disp);
 952
 953         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 954         M_ALD(REG_ITMP2, REG_PV, disp);
 955         M_MTCTR(REG_ITMP2);
 956         M_JSR;
 957
 958         /* restore return registers */
 959
 960         M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
 961         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
 962
 963         M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
 964         M_MTLR(REG_ZERO);
 965         M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
 966
 967         /* mark trace code */
 968
 969         M_NOP;
 970 #endif /* !defined(NDEBUG) */
 971 }
 972
 973
 974 /*
 975  * These are local overrides for various environment variables in Emacs.
 976  * Please do not remove this and leave it at the end of the file, where
 977  * Emacs will automagically detect them.
 978  * ---------------------------------------------------------------------
 979  * Local variables:
 980  * mode: c
 981  * indent-tabs-mode: t
 982  * c-basic-offset: 4
 983  * tab-width: 4
 984  * End:
 985  * vim:noexpandtab:sw=4:ts=4:
 986  */