1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "vm/jit/mips/codegen.h"
37 #include "vm/jit/mips/md-abi.h"
39 #include "mm/memory.h"
41 #include "threads/lock-common.h"
43 #include "vm/builtin.h"
44 #include "vm/exceptions.h"
45 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
47 #include "vm/jit/abi.h"
48 #include "vm/jit/abi-asm.h"
49 #include "vm/jit/asmpart.h"
50 #include "vm/jit/dseg.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/patcher-common.h"
54 #include "vm/jit/replace.h"
56 #include "vmcore/options.h"
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->vv.regoff;
81 #if SIZEOF_VOID_P == 8
85 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
93 M_LLD(tempreg, REG_SP, disp);
97 M_FLD(tempreg, REG_SP, disp);
100 M_DLD(tempreg, REG_SP, disp);
103 vm_abort("emit_load: unknown type %d", src->type);
109 reg = src->vv.regoff;
115 /* emit_load_low ***************************************************************
117 Emits a possible load of the low 32-bits of an operand.
119 *******************************************************************************/
121 #if SIZEOF_VOID_P == 4
122 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
128 assert(src->type == TYPE_LNG);
130 /* get required compiler data */
134 if (src->flags & INMEMORY) {
137 disp = src->vv.regoff;
139 #if WORDS_BIGENDIAN == 1
140 M_ILD(tempreg, REG_SP, disp + 4);
142 M_ILD(tempreg, REG_SP, disp);
148 reg = GET_LOW_REG(src->vv.regoff);
152 #endif /* SIZEOF_VOID_P == 4 */
155 /* emit_load_high **************************************************************
157 Emits a possible load of the high 32-bits of an operand.
159 *******************************************************************************/
161 #if SIZEOF_VOID_P == 4
162 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
168 assert(src->type == TYPE_LNG);
170 /* get required compiler data */
174 if (src->flags & INMEMORY) {
177 disp = src->vv.regoff;
179 #if WORDS_BIGENDIAN == 1
180 M_ILD(tempreg, REG_SP, disp);
182 M_ILD(tempreg, REG_SP, disp + 4);
188 reg = GET_HIGH_REG(src->vv.regoff);
192 #endif /* SIZEOF_VOID_P == 4 */
195 /* emit_store ******************************************************************
197 Emits a possible store to variable.
199 *******************************************************************************/
201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
206 /* get required compiler data */
210 if (dst->flags & INMEMORY) {
213 disp = dst->vv.regoff;
216 #if SIZEOF_VOID_P == 8
220 M_LST(d, REG_SP, disp);
225 M_IST(d, REG_SP, disp);
228 M_LST(d, REG_SP, disp);
232 M_FST(d, REG_SP, disp);
235 M_DST(d, REG_SP, disp);
238 vm_abort("emit_store: unknown type %d", dst->type);
244 /* emit_copy *******************************************************************
246 Generates a register/memory to register/memory copy.
248 *******************************************************************************/
250 void emit_copy(jitdata *jd, instruction *iptr)
257 /* get required compiler data */
261 /* get source and destination variables */
263 src = VAROP(iptr->s1);
264 dst = VAROP(iptr->dst);
266 if ((src->vv.regoff != dst->vv.regoff) ||
267 ((src->flags ^ dst->flags) & INMEMORY)) {
269 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
270 /* emit nothing, as the value won't be used anyway */
274 /* If one of the variables resides in memory, we can eliminate
275 the register move from/to the temporary register with the
276 order of getting the destination register and the load. */
278 if (IS_INMEMORY(src->flags)) {
279 #if SIZEOF_VOID_P == 4
280 if (IS_2_WORD_TYPE(src->type))
281 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
284 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
285 s1 = emit_load(jd, iptr, src, d);
288 s1 = emit_load(jd, iptr, src, REG_IFTMP);
289 #if SIZEOF_VOID_P == 4
290 if (IS_2_WORD_TYPE(src->type))
291 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
294 d = codegen_reg_of_var(iptr->opc, dst, s1);
299 #if SIZEOF_VOID_P == 8
321 vm_abort("emit_copy: unknown type %d", dst->type);
325 emit_store(jd, iptr, dst, d);
330 /* emit_iconst *****************************************************************
334 *******************************************************************************/
336 void emit_iconst(codegendata *cd, s4 d, s4 value)
340 if ((value >= -32768) && (value <= 32767))
341 M_IADD_IMM(REG_ZERO, value, d);
342 else if ((value >= 0) && (value <= 0xffff))
343 M_OR_IMM(REG_ZERO, value, d);
345 disp = dseg_add_s4(cd, value);
346 M_ILD(d, REG_PV, disp);
351 /* emit_lconst *****************************************************************
355 *******************************************************************************/
357 void emit_lconst(codegendata *cd, s4 d, s8 value)
361 #if SIZEOF_VOID_P == 8
362 if ((value >= -32768) && (value <= 32767))
363 M_LADD_IMM(REG_ZERO, value, d);
364 else if ((value >= 0) && (value <= 0xffff))
365 M_OR_IMM(REG_ZERO, value, d);
367 disp = dseg_add_s8(cd, value);
368 M_LLD(d, REG_PV, disp);
371 disp = dseg_add_s8(cd, value);
372 M_LLD(d, REG_PV, disp);
377 /* emit_branch *****************************************************************
379 Emits the code for conditional and unconditional branchs.
381 NOTE: The reg argument may contain two packed registers.
383 *******************************************************************************/
385 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
390 /* calculate the different displacements */
392 checkdisp = (disp - 4);
393 branchdisp = (disp - 4) >> 2;
395 /* check which branch to generate */
397 if (condition == BRANCH_UNCONDITIONAL) {
398 /* check displacement for overflow */
400 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
401 /* if the long-branches flag isn't set yet, do it */
403 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
404 cd->flags |= (CODEGENDATA_FLAG_ERROR |
405 CODEGENDATA_FLAG_LONGBRANCHES);
408 vm_abort("emit_branch: emit unconditional long-branch code");
416 /* and displacement for overflow */
418 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
419 /* if the long-branches flag isn't set yet, do it */
421 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
422 cd->flags |= (CODEGENDATA_FLAG_ERROR |
423 CODEGENDATA_FLAG_LONGBRANCHES);
428 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
431 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
446 vm_abort("emit_branch: unknown condition %d", condition);
449 /* The actual branch code which is over-jumped (NOTE: we
450 don't use a branch delay slot here). */
452 M_LUI(REG_ITMP3, branchdisp >> 16);
453 M_OR_IMM(REG_ITMP3, branchdisp, REG_ITMP3);
454 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
462 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
465 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
468 M_BLTZ(reg, branchdisp);
471 M_BGEZ(reg, branchdisp);
474 M_BGTZ(reg, branchdisp);
477 M_BLEZ(reg, branchdisp);
480 vm_abort("emit_branch: unknown condition %d", condition);
490 /* emit_arithmetic_check *******************************************************
492 Emit an ArithmeticException check.
494 *******************************************************************************/
496 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
498 if (INSTRUCTION_MUST_CHECK(iptr)) {
501 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
506 /* emit_arrayindexoutofbounds_check ********************************************
508 Emit an ArrayIndexOutOfBoundsException check.
510 *******************************************************************************/
512 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
514 if (INSTRUCTION_MUST_CHECK(iptr)) {
515 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
516 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
517 M_BNEZ(REG_ITMP3, 2);
519 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
524 /* emit_classcast_check ********************************************************
526 Emit a ClassCastException check.
528 *******************************************************************************/
530 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
532 if (INSTRUCTION_MUST_CHECK(iptr)) {
547 vm_abort("emit_classcast_check: unknown condition %d", condition);
551 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
556 /* emit_nullpointer_check ******************************************************
558 Emit a NullPointerException check.
560 *******************************************************************************/
562 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
564 if (INSTRUCTION_MUST_CHECK(iptr)) {
567 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
572 /* emit_exception_check ********************************************************
574 Emit an Exception check.
576 *******************************************************************************/
578 void emit_exception_check(codegendata *cd, instruction *iptr)
580 if (INSTRUCTION_MUST_CHECK(iptr)) {
581 M_BNEZ(REG_RESULT, 2);
583 M_ALD_INTERN(REG_RESULT, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
588 /* emit_trap *******************************************************************
590 Emit a trap instruction and return the original machine code.
592 *******************************************************************************/
594 uint32_t emit_trap(codegendata *cd)
598 /* Get machine code which is patched back in later. The
599 trap is 1 instruction word long. */
601 mcode = *((u4 *) cd->mcodeptr);
603 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
609 /* emit_verbosecall_enter ******************************************************
611 Generates the code for the call trace.
613 *******************************************************************************/
616 void emit_verbosecall_enter(jitdata *jd)
625 /* get required compiler data */
633 /* mark trace code */
637 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
638 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
640 /* save argument registers (we store the registers as address
641 types, so it's correct for MIPS32 too) */
643 for (i = 0; i < INT_ARG_CNT; i++)
644 M_AST(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
646 for (i = 0; i < FLT_ARG_CNT; i++)
647 M_DST(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
649 /* save temporary registers for leaf methods */
651 if (jd->isleafmethod) {
652 for (i = 0; i < INT_TMP_CNT; i++)
653 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
655 for (i = 0; i < FLT_TMP_CNT; i++)
656 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
659 /* Load float arguments into integer registers. MIPS32 has less
660 float argument registers than integer ones, we need to check
663 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
664 t = md->paramtypes[i].type;
666 if (IS_FLT_DBL_TYPE(t)) {
667 if (IS_2_WORD_TYPE(t)) {
668 M_DST(abi_registers_float_argument[i], REG_SP, 0 * 8);
669 M_LLD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
672 M_FST(abi_registers_float_argument[i], REG_SP, 0 * 8);
673 M_ILD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
678 #if SIZEOF_VOID_P == 4
679 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
680 t = md->paramtypes[i].type;
682 if (IS_INT_LNG_TYPE(t)) {
683 if (IS_2_WORD_TYPE(t)) {
684 M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
685 M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
688 # if WORDS_BIGENDIAN == 1
689 M_MOV(REG_ZERO, abi_registers_integer_argument[j]);
690 M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
692 M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
693 M_MOV(REG_ZERO, abi_registers_integer_argument[j + 1]);
701 disp = dseg_add_address(cd, m);
702 M_ALD(REG_ITMP1, REG_PV, disp);
703 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
704 disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
705 M_ALD(REG_ITMP3, REG_PV, disp);
706 M_JSR(REG_RA, REG_ITMP3);
709 /* restore argument registers */
711 for (i = 0; i < INT_ARG_CNT; i++)
712 M_ALD(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
714 for (i = 0; i < FLT_ARG_CNT; i++)
715 M_DLD(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
717 /* restore temporary registers for leaf methods */
719 if (jd->isleafmethod) {
720 for (i = 0; i < INT_TMP_CNT; i++)
721 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
723 for (i = 0; i < FLT_TMP_CNT; i++)
724 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
727 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
728 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
730 /* mark trace code */
734 #endif /* !defined(NDEBUG) */
737 /* emit_verbosecall_exit *******************************************************
739 Generates the code for the call trace.
741 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
743 *******************************************************************************/
746 void emit_verbosecall_exit(jitdata *jd)
754 /* get required compiler data */
762 /* mark trace code */
766 #if SIZEOF_VOID_P == 8
767 M_ASUB_IMM(REG_SP, 4 * 8, REG_SP); /* keep stack 16-byte aligned */
768 M_AST(REG_RA, REG_SP, 0 * 8);
770 M_LST(REG_RESULT, REG_SP, 1 * 8);
771 M_DST(REG_FRESULT, REG_SP, 2 * 8);
773 M_MOV(REG_RESULT, REG_A0);
774 M_DMOV(REG_FRESULT, REG_FA1);
775 M_FMOV(REG_FRESULT, REG_FA2);
777 disp = dseg_add_address(cd, m);
778 M_ALD(REG_A4, REG_PV, disp);
780 M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
781 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
783 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
784 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
786 switch (md->returntype.type) {
788 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
792 # if WORDS_BIGENDIAN == 1
793 M_MOV(REG_ZERO, REG_A0);
794 M_MOV(REG_RESULT, REG_A1);
796 M_MOV(REG_RESULT, REG_A0);
797 M_MOV(REG_ZERO, REG_A1);
801 M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
802 M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
804 disp = dseg_add_address(cd, m);
805 M_ALD(REG_ITMP1, REG_PV, disp);
806 M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
809 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
810 M_ALD(REG_ITMP3, REG_PV, disp);
811 M_JSR(REG_RA, REG_ITMP3);
814 #if SIZEOF_VOID_P == 8
815 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
816 M_LLD(REG_RESULT, REG_SP, 1 * 8);
818 M_ALD(REG_RA, REG_SP, 0 * 8);
819 M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
821 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
822 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
824 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
825 M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
828 /* mark trace code */
832 #endif /* !defined(NDEBUG) */
836 * These are local overrides for various environment variables in Emacs.
837 * Please do not remove this and leave it at the end of the file, where
838 * Emacs will automagically detect them.
839 * ---------------------------------------------------------------------
842 * indent-tabs-mode: t
846 * vim:noexpandtab:sw=4:ts=4: