1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "vm/jit/mips/codegen.h"
37 #include "vm/jit/mips/md-abi.h"
39 #include "mm/memory.h"
41 #if defined(ENABLE_THREADS)
42 # include "threads/native/lock.h"
45 #include "vm/builtin.h"
46 #include "vm/exceptions.h"
47 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
49 #include "vm/jit/abi-asm.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/dseg.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
56 #include "vmcore/options.h"
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->vv.regoff * 8;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 #if SIZEOF_VOID_P == 8
88 M_LLD(tempreg, REG_SP, disp);
90 if (IS_2_WORD_TYPE(src->type))
91 M_LLD(tempreg, REG_SP, disp);
93 M_ILD(tempreg, REG_SP, disp);
100 reg = src->vv.regoff;
106 /* emit_load_low ***************************************************************
108 Emits a possible load of the low 32-bits of an operand.
110 *******************************************************************************/
112 #if SIZEOF_VOID_P == 4
113 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
119 assert(src->type == TYPE_LNG);
121 /* get required compiler data */
125 if (src->flags & INMEMORY) {
128 disp = src->vv.regoff * 8;
130 #if WORDS_BIGENDIAN == 1
131 M_ILD(tempreg, REG_SP, disp + 4);
133 M_ILD(tempreg, REG_SP, disp);
139 reg = GET_LOW_REG(src->vv.regoff);
143 #endif /* SIZEOF_VOID_P == 4 */
146 /* emit_load_high **************************************************************
148 Emits a possible load of the high 32-bits of an operand.
150 *******************************************************************************/
152 #if SIZEOF_VOID_P == 4
153 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
159 assert(src->type == TYPE_LNG);
161 /* get required compiler data */
165 if (src->flags & INMEMORY) {
168 disp = src->vv.regoff * 8;
170 #if WORDS_BIGENDIAN == 1
171 M_ILD(tempreg, REG_SP, disp);
173 M_ILD(tempreg, REG_SP, disp + 4);
179 reg = GET_HIGH_REG(src->vv.regoff);
183 #endif /* SIZEOF_VOID_P == 4 */
186 /* emit_store ******************************************************************
188 Emits a possible store to variable.
190 *******************************************************************************/
192 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
197 /* get required compiler data */
201 if (dst->flags & INMEMORY) {
204 disp = dst->vv.regoff * 8;
206 if (IS_FLT_DBL_TYPE(dst->type)) {
207 if (IS_2_WORD_TYPE(dst->type))
208 M_DST(d, REG_SP, disp);
210 M_FST(d, REG_SP, disp);
213 #if SIZEOF_VOID_P == 8
214 M_LST(d, REG_SP, disp);
216 if (IS_2_WORD_TYPE(dst->type))
217 M_LST(d, REG_SP, disp);
219 M_IST(d, REG_SP, disp);
226 /* emit_copy *******************************************************************
228 Generates a register/memory to register/memory copy.
230 *******************************************************************************/
232 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
237 /* get required compiler data */
241 if ((src->vv.regoff != dst->vv.regoff) ||
242 ((src->flags ^ dst->flags) & INMEMORY)) {
243 /* If one of the variables resides in memory, we can eliminate
244 the register move from/to the temporary register with the
245 order of getting the destination register and the load. */
247 if (IS_INMEMORY(src->flags)) {
248 #if SIZEOF_VOID_P == 4
249 if (IS_2_WORD_TYPE(src->type))
250 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
253 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
254 s1 = emit_load(jd, iptr, src, d);
257 s1 = emit_load(jd, iptr, src, REG_IFTMP);
258 #if SIZEOF_VOID_P == 4
259 if (IS_2_WORD_TYPE(src->type))
260 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
263 d = codegen_reg_of_var(iptr->opc, dst, s1);
267 if (IS_FLT_DBL_TYPE(src->type)) {
268 if (IS_2_WORD_TYPE(src->type))
274 #if SIZEOF_VOID_P == 8
277 if (IS_2_WORD_TYPE(src->type))
285 emit_store(jd, iptr, dst, d);
290 /* emit_iconst *****************************************************************
294 *******************************************************************************/
296 void emit_iconst(codegendata *cd, s4 d, s4 value)
300 if ((value >= -32768) && (value <= 32767))
301 M_IADD_IMM(REG_ZERO, value, d);
302 else if ((value >= 0) && (value <= 0xffff))
303 M_OR_IMM(REG_ZERO, value, d);
305 disp = dseg_add_s4(cd, value);
306 M_ILD(d, REG_PV, disp);
311 /* emit_lconst *****************************************************************
315 *******************************************************************************/
317 void emit_lconst(codegendata *cd, s4 d, s8 value)
321 #if SIZEOF_VOID_P == 8
322 if ((value >= -32768) && (value <= 32767))
323 M_LADD_IMM(REG_ZERO, value, d);
324 else if ((value >= 0) && (value <= 0xffff))
325 M_OR_IMM(REG_ZERO, value, d);
327 disp = dseg_add_s8(cd, value);
328 M_LLD(d, REG_PV, disp);
331 disp = dseg_add_s8(cd, value);
332 M_LLD(d, REG_PV, disp);
337 /* emit_branch *****************************************************************
339 Emits the code for conditional and unconditional branchs.
341 NOTE: The reg argument may contain two packed registers.
343 *******************************************************************************/
345 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
350 /* calculate the different displacements */
352 checkdisp = (disp - 4);
353 branchdisp = (disp - 4) >> 2;
355 /* check which branch to generate */
357 if (condition == BRANCH_UNCONDITIONAL) {
358 /* check displacement for overflow */
360 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
361 /* if the long-branches flag isn't set yet, do it */
363 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
364 cd->flags |= (CODEGENDATA_FLAG_ERROR |
365 CODEGENDATA_FLAG_LONGBRANCHES);
368 vm_abort("emit_branch: emit unconditional long-branch code");
376 /* and displacement for overflow */
378 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
379 /* if the long-branches flag isn't set yet, do it */
381 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
382 cd->flags |= (CODEGENDATA_FLAG_ERROR |
383 CODEGENDATA_FLAG_LONGBRANCHES);
386 vm_abort("emit_branch: emit conditional long-branch code");
391 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
394 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
397 M_BLTZ(reg, branchdisp);
400 M_BGEZ(reg, branchdisp);
403 M_BGTZ(reg, branchdisp);
406 M_BLEZ(reg, branchdisp);
409 vm_abort("emit_branch: unknown condition %d", condition);
419 /* emit_arithmetic_check *******************************************************
421 Emit an ArithmeticException check.
423 *******************************************************************************/
425 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
427 if (INSTRUCTION_MUST_CHECK(iptr)) {
430 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
435 /* emit_arrayindexoutofbounds_check ********************************************
437 Emit an ArrayIndexOutOfBoundsException check.
439 *******************************************************************************/
441 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
443 if (INSTRUCTION_MUST_CHECK(iptr)) {
444 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
445 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
446 M_BNEZ(REG_ITMP3, 2);
448 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
453 /* emit_classcast_check ********************************************************
455 Emit a ClassCastException check.
457 *******************************************************************************/
459 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
461 if (INSTRUCTION_MUST_CHECK(iptr)) {
476 vm_abort("emit_classcast_check: unknown condition %d", condition);
480 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
485 /* emit_nullpointer_check ******************************************************
487 Emit a NullPointerException check.
489 *******************************************************************************/
491 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
493 if (INSTRUCTION_MUST_CHECK(iptr)) {
496 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
501 /* emit_exception_check ********************************************************
503 Emit an Exception check.
505 *******************************************************************************/
507 void emit_exception_check(codegendata *cd, instruction *iptr)
509 if (INSTRUCTION_MUST_CHECK(iptr)) {
510 M_BNEZ(REG_RESULT, 2);
512 M_ALD_INTERN(REG_RESULT, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
517 /* emit_patcher_stubs **********************************************************
519 Generates the code for the patcher stubs.
521 *******************************************************************************/
523 void emit_patcher_stubs(jitdata *jd)
533 /* get required compiler data */
537 /* generate code patching stub call code */
541 /* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
542 /* pr = list_next_unsynced(cd->patchrefs, pr)) { */
543 for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
544 /* check code segment size */
548 /* Get machine code which is patched back in later. The
549 call is 2 instruction words long. */
551 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
553 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
554 MIPS causes a SIGSEGV and using the same code for both
555 architectures is much better. */
557 mcode[0] = ((u4 *) tmpmcodeptr)[0];
558 mcode[1] = ((u4 *) tmpmcodeptr)[1];
560 mcode[2] = ((u4 *) tmpmcodeptr)[2];
561 mcode[3] = ((u4 *) tmpmcodeptr)[3];
562 mcode[4] = ((u4 *) tmpmcodeptr)[4];
564 /* Patch in the call to call the following code (done at
567 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
568 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
570 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
572 /* if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) { */
573 /* Recalculate the displacement to be relative to PV. */
575 disp = savedmcodeptr - cd->mcodebase;
577 M_LUI(REG_ITMP3, disp >> 16);
578 M_OR_IMM(REG_ITMP3, disp, REG_ITMP3);
579 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
591 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
593 /* create stack frame */
595 M_ASUB_IMM(REG_SP, 8 * 8, REG_SP);
597 /* calculate return address and move it onto the stack */
599 M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
600 M_AST(REG_ITMP3, REG_SP, 7 * 8);
602 /* move pointer to java_objectheader onto stack */
604 #if defined(ENABLE_THREADS)
605 /* create a virtual java_objectheader */
607 (void) dseg_add_unique_address(cd, NULL); /* flcword */
608 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
609 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
611 M_LDA(REG_ITMP3, REG_PV, disp);
612 M_AST(REG_ITMP3, REG_SP, 6 * 8);
617 /* move machine code onto stack */
619 disp = dseg_add_s4(cd, mcode[0]);
620 M_ILD(REG_ITMP3, REG_PV, disp);
621 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 0);
623 disp = dseg_add_s4(cd, mcode[1]);
624 M_ILD(REG_ITMP3, REG_PV, disp);
625 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
627 disp = dseg_add_s4(cd, mcode[2]);
628 M_ILD(REG_ITMP3, REG_PV, disp);
629 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 0);
631 disp = dseg_add_s4(cd, mcode[3]);
632 M_ILD(REG_ITMP3, REG_PV, disp);
633 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 4);
635 disp = dseg_add_s4(cd, mcode[4]);
636 M_ILD(REG_ITMP3, REG_PV, disp);
637 M_IST(REG_ITMP3, REG_SP, 5 * 8 + 0);
639 /* move class/method/field reference onto stack */
641 disp = dseg_add_address(cd, pr->ref);
642 M_ALD(REG_ITMP3, REG_PV, disp);
643 M_AST(REG_ITMP3, REG_SP, 2 * 8);
645 /* move data segment displacement onto stack */
647 disp = dseg_add_s4(cd, pr->disp);
648 M_ILD(REG_ITMP3, REG_PV, disp);
649 M_IST(REG_ITMP3, REG_SP, 1 * 8);
651 /* move patcher function pointer onto stack */
653 disp = dseg_add_functionptr(cd, pr->patcher);
654 M_ALD(REG_ITMP3, REG_PV, disp);
655 M_AST(REG_ITMP3, REG_SP, 0 * 8);
657 if (targetdisp == 0) {
658 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
660 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
661 M_ALD(REG_ITMP3, REG_PV, disp);
666 disp = (((u4 *) cd->mcodebase) + targetdisp) -
667 (((u4 *) cd->mcodeptr) + 1);
676 /* emit_replacement_stubs ******************************************************
678 Generates the code for the replacement stubs.
680 *******************************************************************************/
682 #if defined(ENABLE_REPLACEMENT)
683 void emit_replacement_stubs(jitdata *jd)
694 /* get required compiler data */
699 rplp = code->rplpoints;
701 /* store beginning of replacement stubs */
703 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
705 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
706 /* do not generate stubs for non-trappable points */
708 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
711 /* check code segment size */
716 savedmcodeptr = cd->mcodeptr;
719 /* create stack frame - 16-byte aligned */
721 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
723 /* push address of `rplpoint` struct */
725 disp = dseg_add_address(cd, rplp);
726 M_ALD(REG_ITMP3, REG_PV, disp);
727 M_AST(REG_ITMP3, REG_SP, 0 * 8);
729 /* jump to replacement function */
731 disp = dseg_add_functionptr(cd, asm_replacement_out);
732 M_ALD(REG_ITMP3, REG_PV, disp);
734 M_NOP; /* delay slot */
736 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
739 #endif /* defined(ENABLE_REPLACEMENT) */
742 /* emit_verbosecall_enter ******************************************************
744 Generates the code for the call trace.
746 *******************************************************************************/
749 void emit_verbosecall_enter(jitdata *jd)
758 /* get required compiler data */
766 /* mark trace code */
770 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
771 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
773 /* save argument registers (we store the registers as address
774 types, so it's correct for MIPS32 too) */
776 for (i = 0; i < INT_ARG_CNT; i++)
777 M_AST(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
779 for (i = 0; i < FLT_ARG_CNT; i++)
780 M_DST(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
782 /* save temporary registers for leaf methods */
784 if (jd->isleafmethod) {
785 for (i = 0; i < INT_TMP_CNT; i++)
786 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
788 for (i = 0; i < FLT_TMP_CNT; i++)
789 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
792 /* Load float arguments into integer registers. MIPS32 has less
793 float argument registers than integer ones, we need to check
796 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
797 t = md->paramtypes[i].type;
799 if (IS_FLT_DBL_TYPE(t)) {
800 if (IS_2_WORD_TYPE(t)) {
801 M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
802 M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
805 M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
806 M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
811 #if SIZEOF_VOID_P == 4
812 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
813 t = md->paramtypes[i].type;
815 if (IS_INT_LNG_TYPE(t)) {
816 if (IS_2_WORD_TYPE(t)) {
817 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
818 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
821 # if WORDS_BIGENDIAN == 1
822 M_MOV(REG_ZERO, rd->argintregs[j]);
823 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
825 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
826 M_MOV(REG_ZERO, rd->argintregs[j + 1]);
834 disp = dseg_add_address(cd, m);
835 M_ALD(REG_ITMP1, REG_PV, disp);
836 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
837 disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
838 M_ALD(REG_ITMP3, REG_PV, disp);
839 M_JSR(REG_RA, REG_ITMP3);
842 /* restore argument registers */
844 for (i = 0; i < INT_ARG_CNT; i++)
845 M_ALD(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
847 for (i = 0; i < FLT_ARG_CNT; i++)
848 M_DLD(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
850 /* restore temporary registers for leaf methods */
852 if (jd->isleafmethod) {
853 for (i = 0; i < INT_TMP_CNT; i++)
854 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
856 for (i = 0; i < FLT_TMP_CNT; i++)
857 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
860 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
861 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
863 /* mark trace code */
867 #endif /* !defined(NDEBUG) */
870 /* emit_verbosecall_exit *******************************************************
872 Generates the code for the call trace.
874 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
876 *******************************************************************************/
879 void emit_verbosecall_exit(jitdata *jd)
887 /* get required compiler data */
895 /* mark trace code */
899 #if SIZEOF_VOID_P == 8
900 M_ASUB_IMM(REG_SP, 4 * 8, REG_SP); /* keep stack 16-byte aligned */
901 M_AST(REG_RA, REG_SP, 0 * 8);
903 M_LST(REG_RESULT, REG_SP, 1 * 8);
904 M_DST(REG_FRESULT, REG_SP, 2 * 8);
906 M_MOV(REG_RESULT, REG_A0);
907 M_DMOV(REG_FRESULT, REG_FA1);
908 M_FMOV(REG_FRESULT, REG_FA2);
910 disp = dseg_add_address(cd, m);
911 M_ALD(REG_A4, REG_PV, disp);
913 M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
914 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
916 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
917 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
919 switch (md->returntype.type) {
921 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
925 # if WORDS_BIGENDIAN == 1
926 M_MOV(REG_ZERO, REG_A0);
927 M_MOV(REG_RESULT, REG_A1);
929 M_MOV(REG_RESULT, REG_A0);
930 M_MOV(REG_ZERO, REG_A1);
934 M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
935 M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
937 disp = dseg_add_address(cd, m);
938 M_ALD(REG_ITMP1, REG_PV, disp);
939 M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
942 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
943 M_ALD(REG_ITMP3, REG_PV, disp);
944 M_JSR(REG_RA, REG_ITMP3);
947 #if SIZEOF_VOID_P == 8
948 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
949 M_LLD(REG_RESULT, REG_SP, 1 * 8);
951 M_ALD(REG_RA, REG_SP, 0 * 8);
952 M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
954 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
955 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
957 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
958 M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
961 /* mark trace code */
965 #endif /* !defined(NDEBUG) */
969 * These are local overrides for various environment variables in Emacs.
970 * Please do not remove this and leave it at the end of the file, where
971 * Emacs will automagically detect them.
972 * ---------------------------------------------------------------------
975 * indent-tabs-mode: t
979 * vim:noexpandtab:sw=4:ts=4: