src/vm/jit/m68k/emit.c

   1 /* src/vm/jit/m68k/emit.c
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25 */
  26
  27
  28 #include "config.h"
  29
  30 #include <assert.h>
  31
  32 #include "emit.h"
  33 #include "vm/jit/emit-common.h"
  34 #include "vm/exceptions.h"
  35 #include "vm/jit/asmpart.h"
  36 #include "vm/builtin.h"
  37 #include "vm/jit/trace.h"
  38
  39 #include "mm/memory.h"
  40
  41 #include "threads/lock-common.h"
  42
  43 #include "codegen.h"
  44 #include "md-os.h"
  45
  46 /* emit_mov_imm_reg **************************************************************************
  47  *
  48  *      Loads an immededat operand into an integer data register
  49  *
  50  ********************************************************************************************/
  51 void emit_mov_imm_reg (codegendata *cd, s4 imm, s4 dreg)
  52 {
  53         /* FIXME: -1 can be used as byte form 0xff, but this ifs cascade is plain wrong it seems */
  54
  55         if ( (imm & 0x0000007F) == imm) {
  56                 /* use byte form */
  57                 *((s2*)cd->mcodeptr) = 0x7000 | (dreg << 9) | imm;      /* MOVEQ.L */
  58                 cd->mcodeptr += 2;
  59         } else if ((imm  & 0x00007FFF) == imm)  {
  60                 /* use word form */
  61                 OPWORD( ((7<<6) | (dreg << 3) | 5), 7, 4);                      /* MVS.W */
  62                 *((s2*)cd->mcodeptr) = (s2)imm;
  63                 cd->mcodeptr += 2;
  64         } else {
  65                 /* use long form */
  66                 OPWORD( ((2<<6) | (dreg << 3) | 0), 7, 4);
  67                 *((s4*)cd->mcodeptr) = (s4)imm;
  68                 cd->mcodeptr += 4;
  69
  70         }
  71 }
  72
  73 /* emit_copy *******************************************************************
  74
  75    Generates a register/memory to register/memory copy.
  76
  77 *******************************************************************************/
  78
  79 void emit_copy(jitdata *jd, instruction *iptr)
  80 {
  81         codegendata *cd;
  82         varinfo     *src;
  83         varinfo     *dst;
  84         s4           s1, d;
  85
  86         /* get required compiler data */
  87
  88         cd = jd->cd;
  89
  90         /* get source and destination variables */
  91
  92         src = VAROP(iptr->s1);
  93         dst = VAROP(iptr->dst);
  94
  95         if ((src->vv.regoff != dst->vv.regoff) ||
  96                 (IS_INMEMORY(src->flags ^ dst->flags))) {
  97
  98                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
  99                         /* emit nothing, as the value won't be used anyway */
 100                         return;
 101                 }
 102
 103                 /* If one of the variables resides in memory, we can eliminate
 104                    the register move from/to the temporary register with the
 105                    order of getting the destination register and the load. */
 106
 107                 if (IS_INMEMORY(src->flags)) {
 108                         if (IS_LNG_TYPE(src->type))
 109                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 110                         else
 111                                 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 112
 113                         s1 = emit_load(jd, iptr, src, d);
 114                 }
 115                 else {
 116                         if (IS_LNG_TYPE(src->type))
 117                                 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 118                         else
 119                                 s1 = emit_load(jd, iptr, src, REG_IFTMP);
 120
 121                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 122                 }
 123
 124                 if (s1 != d) {
 125                         switch(src->type)       {
 126                         case TYPE_INT: M_INTMOVE(s1, d); break;
 127                         case TYPE_ADR: M_ADRMOVE(s1, d); break;
 128                         case TYPE_LNG: M_LNGMOVE(s1, d); break;
 129 #if !defined(ENABLE_SOFTFLOAT)
 130                         case TYPE_FLT: M_FLTMOVE(s1, d); break;
 131                         case TYPE_DBL: M_DBLMOVE(s1, d); break;
 132 #else
 133                         case TYPE_FLT: M_INTMOVE(s1, d); break;
 134                         case TYPE_DBL: M_LNGMOVE(s1, d); break;
 135 #endif
 136                         default:
 137                                 vm_abort("emit_copy: unknown type %d", src->type);
 138                         }
 139                 }
 140
 141                 emit_store(jd, iptr, dst, d);
 142         }
 143 }
 144
 145
 146 /* emit_store ******************************************************************
 147
 148    Emits a possible store of the destination operand.
 149
 150 *******************************************************************************/
 151
 152 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 153 {
 154         codegendata  *cd;
 155
 156         /* get required compiler data */
 157
 158         cd = jd->cd;
 159
 160         if (IS_INMEMORY(dst->flags)) {
 161                 COUNT_SPILLS;
 162
 163                 switch(dst->type)       {
 164 #if defined(ENABLE_SOFTFLOAT)
 165                         case TYPE_DBL:
 166 #endif
 167                         case TYPE_LNG:
 168                                 M_LST(d, REG_SP, dst->vv.regoff);
 169                                 break;
 170 #if defined(ENABLE_SOFTFLOAT)
 171                         case TYPE_FLT:
 172 #endif
 173                         case TYPE_INT:
 174                                 M_IST(d, REG_SP, dst->vv.regoff);
 175                                 break;
 176                         case TYPE_ADR:
 177                                 M_AST(d, REG_SP, dst->vv.regoff);
 178                                 break;
 179 #if !defined(ENABLE_SOFTFLOAT)
 180                         case TYPE_DBL:
 181                                 M_DST(d, REG_SP, dst->vv.regoff);
 182                                 break;
 183                         case TYPE_FLT:
 184                                 M_FST(d, REG_SP, dst->vv.regoff);
 185                                 break;
 186 #endif
 187                         default:
 188                                 vm_abort("emit_store: unknown type %d", dst->type);
 189                 }
 190         }
 191 }
 192
 193
 194 /* emit_load *******************************************************************
 195
 196    Emits a possible load of an operand.
 197
 198 *******************************************************************************/
 199
 200 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 201 {
 202         codegendata *cd;
 203         s4           disp;
 204         s4           reg;
 205
 206         /* get required compiler data */
 207
 208         cd = jd->cd;
 209
 210         if (IS_INMEMORY(src->flags)) {
 211                 COUNT_SPILLS;
 212
 213                 disp = src->vv.regoff;
 214
 215                 switch (src->type)      {
 216 #if defined(ENABLE_SOFTFLOAT)
 217                         case TYPE_FLT:
 218 #endif
 219                         case TYPE_INT:
 220                                 M_ILD(tempreg, REG_SP, disp);
 221                                 break;
 222 #if defined(ENABLE_SOFTFLOAT)
 223                         case TYPE_DBL:
 224 #endif
 225                         case TYPE_LNG:
 226                                 M_LLD(tempreg, REG_SP, disp);
 227                                 break;
 228                         case TYPE_ADR:
 229                                 M_ALD(tempreg, REG_SP, disp);
 230                                 break;
 231 #if !defined(ENABLE_SOFTFLOAT)
 232                         case TYPE_FLT:
 233                                 M_FLD(tempreg, REG_SP, disp);
 234                                 break;
 235                         case TYPE_DBL:
 236                                 M_DLD(tempreg, REG_SP, disp);
 237                                 break;
 238 #endif
 239                         default:
 240                                 vm_abort("emit_load: unknown type %d", src->type);
 241                 }
 242                 #if 0
 243                 if (IS_FLT_DBL_TYPE(src->type)) {
 244                         if (IS_2_WORD_TYPE(src->type)) {
 245                                 M_DLD(tempreg, REG_SP, disp);
 246                          } else {
 247                                 M_FLD(tempreg, REG_SP, disp);
 248                         }
 249                 } else {
 250                         if (IS_2_WORD_TYPE(src->type)) {
 251                                 M_LLD(tempreg, REG_SP, disp);
 252                         } else {
 253                                 M_ILD(tempreg, REG_SP, disp);
 254                         }
 255                 }
 256                 #endif
 257
 258                 reg = tempreg;
 259         }
 260         else
 261                 reg = src->vv.regoff;
 262
 263         return reg;
 264 }
 265
 266 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 267 {
 268         codegendata  *cd;
 269         s4            disp;
 270         s4            reg;
 271
 272 #if !defined(ENABLE_SOFTFLOAT)
 273         assert(src->type == TYPE_LNG);
 274 #else
 275         assert(src->type == TYPE_LNG || src->type == TYPE_DBL);
 276 #endif
 277
 278         /* get required compiler data */
 279         cd = jd->cd;
 280
 281         if (IS_INMEMORY(src->flags)) {
 282                 COUNT_SPILLS;
 283
 284                 disp = src->vv.regoff;
 285                 M_ILD(tempreg, REG_SP, disp + 4);
 286                 reg = tempreg;
 287         } else {
 288                 reg = GET_LOW_REG(src->vv.regoff);
 289         }
 290         return reg;
 291 }
 292 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 293 {
 294         codegendata  *cd;
 295         s4            disp;
 296         s4            reg;
 297
 298 #if !defined(ENABLE_SOFTFLOAT)
 299         assert(src->type == TYPE_LNG);
 300 #else
 301         assert(src->type == TYPE_LNG || src->type == TYPE_DBL);
 302 #endif
 303         /* get required compiler data */
 304         cd = jd->cd;
 305
 306         if (IS_INMEMORY(src->flags)) {
 307                 COUNT_SPILLS;
 308                 disp = src->vv.regoff;
 309                 M_ILD(tempreg, REG_SP, disp);
 310                 reg = tempreg;
 311         } else {
 312                 reg = GET_HIGH_REG(src->vv.regoff);
 313         }
 314         return reg;
 315 }
 316 /* emit_branch *****************************************************************
 317
 318    Emits the code for conditional and unconditional branchs.
 319
 320 *******************************************************************************/
 321 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 322 {
 323         /* calculate the different displacements */
 324         /* PC is a at branch instruction + 2 */
 325         /* coditional and uncondition branching work the same way */
 326         /* short branches have signed 16 bit offset */
 327         /* long branches are signed 32 bit */
 328         /* the 8 bit offset branching instructions are not used */
 329
 330         disp  =  disp - 2;
 331
 332         /* check displacement for overflow */
 333         if ((disp & 0x0000FFFF) != disp)        {
 334                 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 335                         cd->flags |= (CODEGENDATA_FLAG_ERROR | CODEGENDATA_FLAG_LONGBRANCHES);
 336                 }
 337         }
 338
 339         /* check which branch to generate */
 340
 341         if (condition == BRANCH_UNCONDITIONAL) {
 342                 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd))      {
 343                         M_BR_32(disp);
 344                 } else  {
 345                         M_BR_16(disp);
 346                 }
 347         } else {
 348                 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 349                         switch (condition) {
 350                         case BRANCH_EQ:
 351                                 M_BEQ_32(disp);
 352                                 break;
 353                         case BRANCH_NE:
 354                                 M_BNE_32(disp);
 355                                 break;
 356                         case BRANCH_LT:
 357                                 M_BLT_32(disp);
 358                                 break;
 359                         case BRANCH_GE:
 360                                 M_BGE_32(disp);
 361                                 break;
 362                         case BRANCH_GT:
 363                                 M_BGT_32(disp);
 364                                 break;
 365                         case BRANCH_LE:
 366                                 M_BLE_32(disp);
 367                                 break;
 368                         case BRANCH_NAN:
 369                                 M_BNAN_32(disp);
 370                                 break;
 371                         case BRANCH_UGT:
 372                                 M_BHI_32(disp);
 373                                 break;
 374
 375                         default:
 376                                 vm_abort("emit_branch: unknown condition %d", condition);
 377                         }
 378                 } else {
 379                         switch (condition) {
 380                         case BRANCH_EQ:
 381                                 M_BEQ_16(disp);
 382                                 break;
 383                         case BRANCH_NE:
 384                                 M_BNE_16(disp);
 385                                 break;
 386                         case BRANCH_LT:
 387                                 M_BLT_16(disp);
 388                                 break;
 389                         case BRANCH_GE:
 390                                 M_BGE_16(disp);
 391                                 break;
 392                         case BRANCH_GT:
 393                                 M_BGT_16(disp);
 394                                 break;
 395                         case BRANCH_LE:
 396                                 M_BLE_16(disp);
 397                                 break;
 398                         case BRANCH_NAN:
 399                                 M_BNAN_16(disp);
 400                                 break;
 401                         case BRANCH_UGT:
 402                                 M_BHI_16(disp);
 403                                 break;
 404                         default:
 405                                 vm_abort("emit_branch: unknown condition %d", condition);
 406                         }
 407                 }
 408         }
 409 }
 410
 411
 412 #if !defined(NDEBUG)
 413 /*
 414  *      Trace functions. Implement -verbose:call flag
 415  *      code marked by real NOP, but performance is no matter when using -verbose:call :)
 416  */
 417 void emit_verbosecall_enter(jitdata* jd)
 418 {
 419         methodinfo   *m;
 420         codegendata  *cd;
 421         registerdata *rd;
 422         methoddesc   *md;
 423
 424         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 425                 return;
 426
 427         /* get required compiler data */
 428         m  = jd->m;
 429         cd = jd->cd;
 430         rd = jd->rd;
 431         md = m->parseddesc;
 432
 433         /* mark trace code */
 434         M_NOP;
 435
 436         M_IPUSH(REG_D0);
 437         M_IPUSH(REG_D1);
 438         M_APUSH(REG_A0);
 439         M_APUSH(REG_A1);
 440         M_AMOV(REG_SP, REG_A0); /* simpyfy stack offset calculation */
 441
 442 #if !defined(ENABLE_SOFTFLOAT)
 443         M_AADD_IMM(-8*2, REG_SP);
 444         M_FSTORE(REG_F0, REG_SP, 8);
 445         M_FSTORE(REG_F1, REG_SP, 0);
 446 #endif
 447
 448         M_AADD_IMM(4*4 + 4, REG_A0);
 449         M_APUSH(REG_A0);                /* third arg is original argument stack */
 450         M_IPUSH_IMM(0);                 /* second arg is number of argument registers (=0) */
 451         M_IPUSH_IMM(m);                 /* first arg is methodpointer */
 452
 453         M_JSR_IMM(trace_java_call_enter);
 454         /* pop arguments off stack */
 455         M_AADD_IMM(3*4, REG_SP);
 456
 457 #if !defined(ENABLE_SOFTFLOAT)
 458         M_FSTORE(REG_F1, REG_SP, 0);
 459         M_FSTORE(REG_F0, REG_SP, 8);
 460         M_AADD_IMM(8*2, REG_SP);
 461 #endif
 462
 463         M_APOP(REG_A1);
 464         M_APOP(REG_A0);
 465         M_IPOP(REG_D1);
 466         M_IPOP(REG_D0);
 467
 468         M_NOP;
 469 }
 470 void emit_verbosecall_exit(jitdata* jd)
 471 {
 472         methodinfo   *m;
 473         codegendata  *cd;
 474         registerdata *rd;
 475         methoddesc   *md;
 476
 477         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 478                 return;
 479
 480         /* get required compiler data */
 481         m  = jd->m;
 482         cd = jd->cd;
 483         rd = jd->rd;
 484         md = m->parseddesc;
 485
 486         /* void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m); */
 487
 488
 489         /* mark trace code */
 490         M_NOP;
 491
 492 #if !defined(ENABLE_SOFTFLOAT)
 493         M_AADD_IMM(-8, REG_SP);
 494         M_FSTORE(REG_D1, REG_SP, 0);
 495 #endif
 496
 497         M_IPUSH_IMM(m);                                 /* push methodinfo */
 498
 499 #if !defined(ENABLE_SOFTFLOAT)
 500         M_AADD_IMM(-3*4, REG_SP);
 501         M_FST(REG_D0, REG_SP, 8);
 502         M_DST(REG_D0, REG_SP, 0);
 503 #else
 504         M_IPUSH_IMM(0);
 505
 506         M_IPUSH_IMM(0);
 507         M_IPUSH_IMM(0);
 508 #endif
 509
 510         M_IPUSH(GET_HIGH_REG(REG_RESULT_PACKED))
 511         M_IPUSH(GET_LOW_REG(REG_RESULT_PACKED))         /* push long result */
 512
 513         M_JSR_IMM(builtin_verbosecall_exit);
 514
 515         /* poping result registers from stack */
 516         M_IPOP(GET_LOW_REG(REG_RESULT_PACKED))
 517         M_IPOP(GET_HIGH_REG(REG_RESULT_PACKED))
 518
 519 #if !defined(ENABLE_SOFTFLOAT)
 520         M_DLD(REG_D0, REG_SP, 0)
 521         M_FLD(REG_D0, REG_SP, 8)
 522 #endif
 523         M_AADD_IMM(3*4 + 4, REG_SP);
 524
 525 #if !defined(ENABLE_SOFTFLOAT)
 526         M_FLOAD(REG_D1, REG_SP, 0)
 527         M_AADD_IMM(8, REG_SP);
 528 #endif
 529
 530         M_NOP;
 531 }
 532 #endif
 533
 534 /* emit_classcast_check ********************************************************
 535
 536    Emit a ClassCastException check.
 537
 538 *******************************************************************************/
 539
 540 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 541 {
 542         if (INSTRUCTION_MUST_CHECK(iptr)) {
 543                 switch (condition) {
 544                 case BRANCH_LE:
 545                         M_BGT(4);
 546                         break;
 547                 case BRANCH_EQ:
 548                         M_BNE(4);
 549                         break;
 550                 case BRANCH_GT:
 551                         M_BLE(4);
 552                         break;
 553                 case BRANCH_UGT:
 554                         M_BLS(4);
 555                         break;
 556                 default:
 557                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 558                 }
 559                 M_TRAP_SETREGISTER(s1);
 560                 M_TRAP(EXCEPTION_HARDWARE_CLASSCAST);
 561         }
 562 }
 563
 564 /* emit_arrayindexoutofbounds_check ********************************************
 565
 566    Emit a ArrayIndexOutOfBoundsException check.
 567
 568 *******************************************************************************/
 569 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 570 {
 571         if (INSTRUCTION_MUST_CHECK(iptr)) {
 572                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 573                 M_ICMP(s2, REG_ITMP3);
 574                 M_BHI(4);
 575                 M_TRAP_SETREGISTER(s2);
 576                 M_TRAP(EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
 577         }
 578 }
 579
 580
 581 /* emit_arraystore_check *******************************************************
 582
 583    Emit an ArrayStoreException check.
 584
 585 *******************************************************************************/
 586
 587 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 588 {
 589         if (INSTRUCTION_MUST_CHECK(iptr)) {
 590                 M_ITST(REG_RESULT);
 591                 M_BNE(2);
 592                 /*M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARRAYSTORE);*/
 593                 M_TRAP(EXCEPTION_HARDWARE_ARRAYSTORE);
 594         }
 595 }
 596
 597
 598 /* emit_nullpointer_check ******************************************************
 599
 600    Emit a NullPointerException check.
 601
 602 *******************************************************************************/
 603 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 604 {
 605         if (INSTRUCTION_MUST_CHECK(iptr)) {
 606                 /* XXX: this check is copied to call monitor_enter
 607                  * invocation at the beginning of codegen.c */
 608                 M_ATST(reg);
 609                 M_BNE(2);
 610                 M_TRAP(M68K_EXCEPTION_HARDWARE_NULLPOINTER);
 611         }
 612 }
 613
 614 /* emit_arithmetic_check *******************************************************
 615
 616    Emit an ArithmeticException check.
 617
 618 *******************************************************************************/
 619
 620 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 621 {
 622         if (INSTRUCTION_MUST_CHECK(iptr)) {
 623                 M_ITST(reg);
 624                 M_BNE(2);
 625                 M_TRAP(EXCEPTION_HARDWARE_ARITHMETIC);
 626         }
 627 }
 628
 629 /* emit_exception_check_ireg **************************************************
 630
 631    Emit an Exception check. Teste register is integer REG_RESULT
 632
 633 *******************************************************************************/
 634 void emit_exception_check(codegendata *cd, instruction *iptr)
 635 {
 636         if (INSTRUCTION_MUST_CHECK(iptr)) {
 637                 M_ITST(REG_RESULT);
 638                 M_BNE(2);
 639                 /*M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);*/
 640                 M_TRAP(EXCEPTION_HARDWARE_EXCEPTION);
 641         }
 642 }
 643
 644 /* emit_trap_compiler **********************************************************
 645
 646    Emit a trap instruction which calls the JIT compiler.
 647
 648 *******************************************************************************/
 649
 650 void emit_trap_compiler(codegendata *cd)
 651 {
 652         M_TRAP_SETREGISTER(REG_METHODPTR);
 653         M_TRAP(EXCEPTION_HARDWARE_COMPILER);
 654 }
 655
 656
 657 /* emit_trap *******************************************************************
 658
 659    Emit a trap instruction and return the original machine code.
 660
 661 *******************************************************************************/
 662
 663 uint32_t emit_trap(codegendata *cd)
 664 {
 665         uint16_t mcode;
 666
 667         /* Get machine code which is patched back in later. The
 668            trap is 2 bytes long. */
 669
 670         mcode = *((uint16_t *) cd->mcodeptr);
 671
 672         M_TRAP(EXCEPTION_HARDWARE_PATCHER);
 673
 674         return (uint32_t) mcode;
 675 }
 676
 677
 678
 679 /*
 680  * These are local overrides for various environment variables in Emacs.
 681  * Please do not remove this and leave it at the end of the file, where
 682  * Emacs will automagically detect them.
 683  * ---------------------------------------------------------------------
 684  * Local variables:
 685  * mode: c
 686  * indent-tabs-mode: t
 687  * c-basic-offset: 4
 688  * tab-width: 4
 689  * End:
 690  * vim:noexpandtab:sw=4:ts=4:
 691  */