1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 5404 2006-09-07 13:29:05Z christian $
42 #include "vm/jit/i386/md-abi.h"
43 #include "vm/jit/i386/md-emit.h"
44 #include "vm/jit/i386/codegen.h"
46 #if defined(ENABLE_THREADS)
47 # include "threads/native/lock.h"
50 #include "vm/builtin.h"
51 #include "vm/statistics.h"
52 #include "vm/jit/asmpart.h"
53 #include "vm/jit/dseg.h"
54 #include "vm/jit/emit.h"
55 #include "vm/jit/jit.h"
56 #include "vm/jit/replace.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->regoff * 4;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
102 /* emit_load_low ************************************************************
104 Emits a possible load of the low 32-bits of an operand.
106 *******************************************************************************/
108 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
121 if (IS_INMEMORY(src->flags)) {
124 disp = src->regoff * 4;
126 M_ILD(tempreg, REG_SP, disp);
131 reg = GET_LOW_REG(src->regoff);
137 /* emit_load_high ***********************************************************
139 Emits a possible load of the high 32-bits of an operand.
141 *******************************************************************************/
143 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
149 /* get required compiler data */
151 assert(src->type == TYPE_LNG);
155 if (IS_INMEMORY(src->flags)) {
158 disp = src->regoff * 4;
160 M_ILD(tempreg, REG_SP, disp + 4);
165 reg = GET_HIGH_REG(src->regoff);
171 /* emit_load_s1 ****************************************************************
173 Emits a possible load of the first source operand.
175 *******************************************************************************/
177 s4 emit_load_s1(jitdata *jd, instruction *iptr, s4 tempreg)
182 /* get required compiler data */
184 src = &(jd->var[iptr->s1.varindex]);
186 reg = emit_load(jd, iptr, src, tempreg);
192 /* emit_load_s2 ****************************************************************
194 Emits a possible load of the second source operand.
196 *******************************************************************************/
198 s4 emit_load_s2(jitdata *jd, instruction *iptr, s4 tempreg)
203 /* get required compiler data */
205 src = &(jd->var[iptr->sx.s23.s2.varindex]);
207 reg = emit_load(jd, iptr, src, tempreg);
213 /* emit_load_s3 ****************************************************************
215 Emits a possible load of the third source operand.
217 *******************************************************************************/
219 s4 emit_load_s3(jitdata *jd, instruction *iptr, s4 tempreg)
224 /* get required compiler data */
226 src = &(jd->var[iptr->sx.s23.s3.varindex]);
228 reg = emit_load(jd, iptr, src, tempreg);
234 /* emit_load_s1_low ************************************************************
236 Emits a possible load of the low 32-bits of the first long source
239 *******************************************************************************/
241 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, s4 tempreg)
247 /* get required compiler data */
249 src = &(jd->var[iptr->s1.varindex]);
251 reg = emit_load_low(jd, iptr, src, tempreg);
259 /* emit_load_s2_low ************************************************************
261 Emits a possible load of the low 32-bits of the second long source
264 *******************************************************************************/
266 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, s4 tempreg)
271 /* get required compiler data */
273 src = &(jd->var[iptr->sx.s23.s2.varindex]);
275 reg = emit_load_low(jd, iptr, src, tempreg);
281 /* emit_load_s1_high ***********************************************************
283 Emits a possible load of the high 32-bits of the first long source
286 *******************************************************************************/
288 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, s4 tempreg)
293 /* get required compiler data */
295 src = &(jd->var[iptr->s1.varindex]);
297 reg = emit_load_high(jd, iptr, src, tempreg);
303 /* emit_load_s2_high ***********************************************************
305 Emits a possible load of the high 32-bits of the second long source
308 *******************************************************************************/
310 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, s4 tempreg)
315 /* get required compiler data */
317 src = &(jd->var[iptr->sx.s23.s2.varindex]);
319 reg = emit_load_high(jd, iptr, src, tempreg);
325 /* emit_store ******************************************************************
327 Emits a possible store of the destination operand.
329 *******************************************************************************/
331 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
335 /* get required compiler data */
339 if (IS_INMEMORY(dst->flags)) {
342 if (IS_FLT_DBL_TYPE(dst->type)) {
343 if (IS_2_WORD_TYPE(dst->type))
344 M_DST(d, REG_SP, dst->regoff * 4);
346 M_FST(d, REG_SP, dst->regoff * 4);
349 if (IS_2_WORD_TYPE(dst->type))
350 M_LST(d, REG_SP, dst->regoff * 4);
352 M_IST(d, REG_SP, dst->regoff * 4);
358 /* emit_store_low **************************************************************
360 Emits a possible store of the low 32-bits of the destination
363 *******************************************************************************/
365 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
369 assert(dst->type == TYPE_LNG);
371 /* get required compiler data */
375 if (IS_INMEMORY(dst->flags)) {
377 M_IST(GET_LOW_REG(d), REG_SP, dst->regoff * 4);
382 /* emit_store_high *************************************************************
384 Emits a possible store of the high 32-bits of the destination
387 *******************************************************************************/
389 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
393 assert(dst->type == TYPE_LNG);
395 /* get required compiler data */
399 if (IS_INMEMORY(dst->flags)) {
401 M_IST(GET_HIGH_REG(d), REG_SP, dst->regoff * 4 + 4);
405 /* emit_store_dst **************************************************************
407 This function generates the code to store the result of an
408 operation back into a spilled pseudo-variable. If the
409 pseudo-variable has not been spilled in the first place, this
410 function will generate nothing.
412 *******************************************************************************/
414 void emit_store_dst(jitdata *jd, instruction *iptr, s4 d)
418 dst = &(jd->var[iptr->dst.varindex]);
420 emit_store(jd, iptr, dst, d);
424 /* emit_copy *******************************************************************
426 Generates a register/memory to register/memory copy.
428 *******************************************************************************/
430 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
435 /* get required compiler data */
439 if ((src->regoff != dst->regoff) ||
440 ((src->flags ^ dst->flags) & INMEMORY)) {
442 /* If one of the variables resides in memory, we can eliminate
443 the register move from/to the temporary register with the
444 order of getting the destination register and the load. */
446 if (IS_INMEMORY(src->flags)) {
447 if (IS_LNG_TYPE(src->type))
448 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
450 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
452 s1 = emit_load(jd, iptr, src, d);
455 if (IS_LNG_TYPE(src->type))
456 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
458 s1 = emit_load(jd, iptr, src, REG_ITMP1);
460 d = codegen_reg_of_var(iptr->opc, dst, s1);
464 if (IS_FLT_DBL_TYPE(src->type)) {
467 if (IS_2_WORD_TYPE(src->type))
474 emit_store(jd, iptr, dst, d);
479 /* emit_exception_stubs ********************************************************
481 Generates the code for the exception stubs.
483 *******************************************************************************/
485 void emit_exception_stubs(jitdata *jd)
492 /* get required compiler data */
497 /* generate exception stubs */
501 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
502 gen_resolvebranch(cd->mcodebase + eref->branchpos,
504 cd->mcodeptr - cd->mcodebase);
508 /* Check if the exception is an
509 ArrayIndexOutOfBoundsException. If so, move index register
513 M_INTMOVE(eref->reg, REG_ITMP1);
515 /* calcuate exception address */
517 M_MOV_IMM(0, REG_ITMP2_XPC);
519 M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
521 /* move function to call into REG_ITMP3 */
523 M_MOV_IMM(eref->function, REG_ITMP3);
525 if (targetdisp == 0) {
526 targetdisp = cd->mcodeptr - cd->mcodebase;
528 M_ASUB_IMM(5 * 4, REG_SP);
530 /* first store REG_ITMP1 so we can use it */
532 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
534 M_AST_IMM(0, REG_SP, 0 * 4);
536 M_MOV(REG_SP, REG_ITMP1);
537 M_AADD_IMM(5 * 4, REG_ITMP1);
538 M_AST(REG_ITMP1, REG_SP, 1 * 4);
539 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
540 M_AST(REG_ITMP1, REG_SP, 2 * 4);
541 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
545 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
546 M_AADD_IMM(5 * 4, REG_SP);
548 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
552 M_JMP_IMM((cd->mcodebase + targetdisp) -
553 (cd->mcodeptr + PATCHER_CALL_SIZE));
559 /* emit_patcher_stubs **********************************************************
561 Generates the code for the patcher stubs.
563 *******************************************************************************/
565 void emit_patcher_stubs(jitdata *jd)
575 /* get required compiler data */
579 /* generate code patching stub call code */
583 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
584 /* check code segment size */
588 /* Get machine code which is patched back in later. A
589 `call rel32' is 5 bytes long. */
591 savedmcodeptr = cd->mcodebase + pref->branchpos;
592 mcode = *((u8 *) savedmcodeptr);
594 /* patch in `call rel32' to call the following code */
596 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
597 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
599 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
601 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
607 /* move pointer to java_objectheader onto stack */
609 #if defined(ENABLE_THREADS)
610 (void) dseg_addaddress(cd, NULL); /* flcword */
611 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
612 disp = dseg_addaddress(cd, NULL); /* vftbl */
614 M_MOV_IMM(0, REG_ITMP3);
616 M_AADD_IMM(disp, REG_ITMP3);
622 /* move machine code bytes and classinfo pointer into registers */
624 M_PUSH_IMM(mcode >> 32);
626 M_PUSH_IMM(pref->ref);
627 M_PUSH_IMM(pref->patcher);
629 if (targetdisp == 0) {
630 targetdisp = cd->mcodeptr - cd->mcodebase;
632 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
636 M_JMP_IMM((cd->mcodebase + targetdisp) -
637 (cd->mcodeptr + PATCHER_CALL_SIZE));
643 /* emit_replacement_stubs ******************************************************
645 Generates the code for the replacement stubs.
647 *******************************************************************************/
649 void emit_replacement_stubs(jitdata *jd)
657 /* get required compiler data */
662 rplp = code->rplpoints;
664 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
665 /* check code segment size */
669 /* note start of stub code */
671 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
673 /* make machine code for patching */
675 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
677 rplp->mcode = 0xe9 | ((u8) disp << 8);
679 /* push address of `rplpoint` struct */
683 /* jump to replacement function */
685 M_PUSH_IMM(asm_replacement_out);
691 /* emit_verbosecall_enter ******************************************************
693 Generates the code for the call trace.
695 *******************************************************************************/
698 void emit_verbosecall_enter(jitdata *jd)
707 /* get required compiler data */
715 /* mark trace code */
719 /* methodinfo* + arguments + return address */
721 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
722 cd->stackframesize * 4 + 4;
724 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
726 /* save temporary registers for leaf methods */
728 for (i = 0; i < INT_TMP_CNT; i++)
729 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
731 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
732 t = md->paramtypes[i].type;
734 if (IS_INT_LNG_TYPE(t)) {
735 if (IS_2_WORD_TYPE(t)) {
736 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
737 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
739 else if (IS_ADR_TYPE(t)) {
740 M_ALD(REG_ITMP1, REG_SP, disp);
741 M_AST(REG_ITMP1, REG_SP, i * 8);
742 M_IST_IMM(0, REG_SP, i * 8 + 4);
745 M_ILD(EAX, REG_SP, disp);
747 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
751 if (IS_2_WORD_TYPE(t)) {
752 M_DLD(REG_NULL, REG_SP, disp);
753 M_DST(REG_NULL, REG_SP, i * 8);
756 M_FLD(REG_NULL, REG_SP, disp);
757 M_FST(REG_NULL, REG_SP, i * 8);
758 M_IST_IMM(0, REG_SP, i * 8 + 4);
762 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
765 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
767 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
770 /* restore temporary registers for leaf methods */
772 for (i = 0; i < INT_TMP_CNT; i++)
773 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
775 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
777 /* mark trace code */
781 #endif /* !defined(NDEBUG) */
784 /* emit_verbosecall_exit *******************************************************
786 Generates the code for the call trace.
788 *******************************************************************************/
791 void emit_verbosecall_exit(jitdata *jd)
797 /* get required compiler data */
803 /* mark trace code */
807 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
809 M_AST_IMM(m, REG_SP, 0 * 4);
811 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
813 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
814 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
816 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
819 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
821 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
823 /* mark trace code */
827 #endif /* !defined(NDEBUG) */
830 /* code generation functions **************************************************/
832 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
834 if (basereg == ESP) {
836 emit_address_byte(0, dreg, ESP);
837 emit_address_byte(0, ESP, ESP);
839 else if (IS_IMM8(disp)) {
840 emit_address_byte(1, dreg, ESP);
841 emit_address_byte(0, ESP, ESP);
845 emit_address_byte(2, dreg, ESP);
846 emit_address_byte(0, ESP, ESP);
850 else if ((disp == 0) && (basereg != EBP)) {
851 emit_address_byte(0, dreg, basereg);
853 else if (IS_IMM8(disp)) {
854 emit_address_byte(1, dreg, basereg);
858 emit_address_byte(2, dreg, basereg);
864 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
866 if (basereg == ESP) {
867 emit_address_byte(2, dreg, ESP);
868 emit_address_byte(0, ESP, ESP);
872 emit_address_byte(2, dreg, basereg);
878 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
881 emit_address_byte(0, reg, 4);
882 emit_address_byte(scale, indexreg, 5);
885 else if ((disp == 0) && (basereg != EBP)) {
886 emit_address_byte(0, reg, 4);
887 emit_address_byte(scale, indexreg, basereg);
889 else if (IS_IMM8(disp)) {
890 emit_address_byte(1, reg, 4);
891 emit_address_byte(scale, indexreg, basereg);
895 emit_address_byte(2, reg, 4);
896 emit_address_byte(scale, indexreg, basereg);
902 /* low-level code emitter functions *******************************************/
904 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
906 COUNT(count_mov_reg_reg);
907 *(cd->mcodeptr++) = 0x89;
908 emit_reg((reg),(dreg));
912 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
914 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
919 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
921 *(cd->mcodeptr++) = 0xc6;
927 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
929 COUNT(count_mov_mem_reg);
930 *(cd->mcodeptr++) = 0x8b;
931 emit_membase(cd, (basereg),(disp),(reg));
936 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
937 * constant membase immediate length of 32bit
939 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
941 COUNT(count_mov_mem_reg);
942 *(cd->mcodeptr++) = 0x8b;
943 emit_membase32(cd, (basereg),(disp),(reg));
947 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
949 COUNT(count_mov_reg_mem);
950 *(cd->mcodeptr++) = 0x89;
951 emit_membase(cd, (basereg),(disp),(reg));
955 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
957 COUNT(count_mov_reg_mem);
958 *(cd->mcodeptr++) = 0x89;
959 emit_membase32(cd, (basereg),(disp),(reg));
963 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
965 COUNT(count_mov_mem_reg);
966 *(cd->mcodeptr++) = 0x8b;
967 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
971 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
973 COUNT(count_mov_reg_mem);
974 *(cd->mcodeptr++) = 0x89;
975 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
979 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
981 COUNT(count_mov_reg_mem);
982 *(cd->mcodeptr++) = 0x66;
983 *(cd->mcodeptr++) = 0x89;
984 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
988 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
990 COUNT(count_mov_reg_mem);
991 *(cd->mcodeptr++) = 0x88;
992 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
996 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
998 COUNT(count_mov_reg_mem);
999 *(cd->mcodeptr++) = 0x89;
1000 emit_mem((reg),(mem));
1004 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
1006 COUNT(count_mov_mem_reg);
1007 *(cd->mcodeptr++) = 0x8b;
1008 emit_mem((dreg),(mem));
1012 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
1014 *(cd->mcodeptr++) = 0xc7;
1020 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1022 *(cd->mcodeptr++) = 0xc7;
1023 emit_membase(cd, (basereg),(disp),0);
1028 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1030 *(cd->mcodeptr++) = 0xc7;
1031 emit_membase32(cd, (basereg),(disp),0);
1036 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1038 *(cd->mcodeptr++) = 0xc6;
1039 emit_membase(cd, (basereg),(disp),0);
1044 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1046 COUNT(count_mov_mem_reg);
1047 *(cd->mcodeptr++) = 0x0f;
1048 *(cd->mcodeptr++) = 0xbe;
1049 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1053 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1055 *(cd->mcodeptr++) = 0x0f;
1056 *(cd->mcodeptr++) = 0xbf;
1061 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1063 COUNT(count_mov_mem_reg);
1064 *(cd->mcodeptr++) = 0x0f;
1065 *(cd->mcodeptr++) = 0xbf;
1066 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1070 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1072 *(cd->mcodeptr++) = 0x0f;
1073 *(cd->mcodeptr++) = 0xb7;
1078 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1080 COUNT(count_mov_mem_reg);
1081 *(cd->mcodeptr++) = 0x0f;
1082 *(cd->mcodeptr++) = 0xb7;
1083 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1087 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1089 *(cd->mcodeptr++) = 0xc7;
1090 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1095 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1097 *(cd->mcodeptr++) = 0x66;
1098 *(cd->mcodeptr++) = 0xc7;
1099 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1104 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1106 *(cd->mcodeptr++) = 0xc6;
1107 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1115 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1117 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1118 emit_reg((reg),(dreg));
1122 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1124 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1125 emit_membase(cd, (basereg),(disp),(reg));
1129 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1131 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1132 emit_membase(cd, (basereg),(disp),(reg));
1136 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1139 *(cd->mcodeptr++) = 0x83;
1140 emit_reg((opc),(dreg));
1143 *(cd->mcodeptr++) = 0x81;
1144 emit_reg((opc),(dreg));
1150 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1152 *(cd->mcodeptr++) = 0x81;
1153 emit_reg((opc),(dreg));
1158 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1161 *(cd->mcodeptr++) = 0x83;
1162 emit_membase(cd, (basereg),(disp),(opc));
1165 *(cd->mcodeptr++) = 0x81;
1166 emit_membase(cd, (basereg),(disp),(opc));
1172 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1174 *(cd->mcodeptr++) = 0x85;
1175 emit_reg((reg),(dreg));
1179 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1181 *(cd->mcodeptr++) = 0xf7;
1189 * inc, dec operations
1191 void emit_dec_mem(codegendata *cd, s4 mem)
1193 *(cd->mcodeptr++) = 0xff;
1198 void emit_cltd(codegendata *cd)
1200 *(cd->mcodeptr++) = 0x99;
1204 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1206 *(cd->mcodeptr++) = 0x0f;
1207 *(cd->mcodeptr++) = 0xaf;
1208 emit_reg((dreg),(reg));
1212 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1214 *(cd->mcodeptr++) = 0x0f;
1215 *(cd->mcodeptr++) = 0xaf;
1216 emit_membase(cd, (basereg),(disp),(dreg));
1220 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1222 if (IS_IMM8((imm))) {
1223 *(cd->mcodeptr++) = 0x6b;
1227 *(cd->mcodeptr++) = 0x69;
1234 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1236 if (IS_IMM8((imm))) {
1237 *(cd->mcodeptr++) = 0x6b;
1238 emit_reg((dreg),(reg));
1241 *(cd->mcodeptr++) = 0x69;
1242 emit_reg((dreg),(reg));
1248 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1250 if (IS_IMM8((imm))) {
1251 *(cd->mcodeptr++) = 0x6b;
1252 emit_membase(cd, (basereg),(disp),(dreg));
1255 *(cd->mcodeptr++) = 0x69;
1256 emit_membase(cd, (basereg),(disp),(dreg));
1262 void emit_mul_reg(codegendata *cd, s4 reg)
1264 *(cd->mcodeptr++) = 0xf7;
1269 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1271 *(cd->mcodeptr++) = 0xf7;
1272 emit_membase(cd, (basereg),(disp),4);
1276 void emit_idiv_reg(codegendata *cd, s4 reg)
1278 *(cd->mcodeptr++) = 0xf7;
1283 void emit_ret(codegendata *cd)
1285 *(cd->mcodeptr++) = 0xc3;
1293 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1295 *(cd->mcodeptr++) = 0xd3;
1296 emit_reg((opc),(reg));
1300 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1303 *(cd->mcodeptr++) = 0xd1;
1304 emit_reg((opc),(dreg));
1306 *(cd->mcodeptr++) = 0xc1;
1307 emit_reg((opc),(dreg));
1313 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1315 *(cd->mcodeptr++) = 0x0f;
1316 *(cd->mcodeptr++) = 0xa5;
1317 emit_reg((reg),(dreg));
1321 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1323 *(cd->mcodeptr++) = 0x0f;
1324 *(cd->mcodeptr++) = 0xa4;
1325 emit_reg((reg),(dreg));
1330 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1332 *(cd->mcodeptr++) = 0x0f;
1333 *(cd->mcodeptr++) = 0xa5;
1334 emit_membase(cd, (basereg),(disp),(reg));
1338 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1340 *(cd->mcodeptr++) = 0x0f;
1341 *(cd->mcodeptr++) = 0xad;
1342 emit_reg((reg),(dreg));
1346 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1348 *(cd->mcodeptr++) = 0x0f;
1349 *(cd->mcodeptr++) = 0xac;
1350 emit_reg((reg),(dreg));
1355 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1357 *(cd->mcodeptr++) = 0x0f;
1358 *(cd->mcodeptr++) = 0xad;
1359 emit_membase(cd, (basereg),(disp),(reg));
1367 void emit_jmp_imm(codegendata *cd, s4 imm)
1369 *(cd->mcodeptr++) = 0xe9;
1374 void emit_jmp_reg(codegendata *cd, s4 reg)
1376 *(cd->mcodeptr++) = 0xff;
1381 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1383 *(cd->mcodeptr++) = 0x0f;
1384 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1391 * conditional set operations
1393 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1395 *(cd->mcodeptr++) = 0x0f;
1396 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1401 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1403 *(cd->mcodeptr++) = 0x0f;
1404 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1405 emit_membase(cd, (basereg),(disp),0);
1409 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1411 *(cd->mcodeptr++) = 0x0f;
1412 *(cd->mcodeptr++) = 0xc1;
1413 emit_mem((reg),(mem));
1417 void emit_neg_reg(codegendata *cd, s4 reg)
1419 *(cd->mcodeptr++) = 0xf7;
1425 void emit_push_imm(codegendata *cd, s4 imm)
1427 *(cd->mcodeptr++) = 0x68;
1432 void emit_pop_reg(codegendata *cd, s4 reg)
1434 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1438 void emit_push_reg(codegendata *cd, s4 reg)
1440 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1444 void emit_nop(codegendata *cd)
1446 *(cd->mcodeptr++) = 0x90;
1450 void emit_lock(codegendata *cd)
1452 *(cd->mcodeptr++) = 0xf0;
1459 void emit_call_reg(codegendata *cd, s4 reg)
1461 *(cd->mcodeptr++) = 0xff;
1466 void emit_call_imm(codegendata *cd, s4 imm)
1468 *(cd->mcodeptr++) = 0xe8;
1475 * floating point instructions
1477 void emit_fld1(codegendata *cd)
1479 *(cd->mcodeptr++) = 0xd9;
1480 *(cd->mcodeptr++) = 0xe8;
1484 void emit_fldz(codegendata *cd)
1486 *(cd->mcodeptr++) = 0xd9;
1487 *(cd->mcodeptr++) = 0xee;
1491 void emit_fld_reg(codegendata *cd, s4 reg)
1493 *(cd->mcodeptr++) = 0xd9;
1494 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1498 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1500 *(cd->mcodeptr++) = 0xd9;
1501 emit_membase(cd, (basereg),(disp),0);
1505 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1507 *(cd->mcodeptr++) = 0xd9;
1508 emit_membase32(cd, (basereg),(disp),0);
1512 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1514 *(cd->mcodeptr++) = 0xdd;
1515 emit_membase(cd, (basereg),(disp),0);
1519 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1521 *(cd->mcodeptr++) = 0xdd;
1522 emit_membase32(cd, (basereg),(disp),0);
1526 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1528 *(cd->mcodeptr++) = 0xdb;
1529 emit_membase(cd, (basereg),(disp),5);
1533 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1535 *(cd->mcodeptr++) = 0xd9;
1536 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1540 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1542 *(cd->mcodeptr++) = 0xdd;
1543 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1547 void emit_flds_mem(codegendata *cd, s4 mem)
1549 *(cd->mcodeptr++) = 0xd9;
1554 void emit_fldl_mem(codegendata *cd, s4 mem)
1556 *(cd->mcodeptr++) = 0xdd;
1561 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1563 *(cd->mcodeptr++) = 0xdb;
1564 emit_membase(cd, (basereg),(disp),0);
1568 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1570 *(cd->mcodeptr++) = 0xdf;
1571 emit_membase(cd, (basereg),(disp),5);
1575 void emit_fst_reg(codegendata *cd, s4 reg)
1577 *(cd->mcodeptr++) = 0xdd;
1578 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1582 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1584 *(cd->mcodeptr++) = 0xd9;
1585 emit_membase(cd, (basereg),(disp),2);
1589 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1591 *(cd->mcodeptr++) = 0xdd;
1592 emit_membase(cd, (basereg),(disp),2);
1596 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1598 *(cd->mcodeptr++) = 0xd9;
1599 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1603 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1605 *(cd->mcodeptr++) = 0xdd;
1606 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1610 void emit_fstp_reg(codegendata *cd, s4 reg)
1612 *(cd->mcodeptr++) = 0xdd;
1613 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1617 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1619 *(cd->mcodeptr++) = 0xd9;
1620 emit_membase(cd, (basereg),(disp),3);
1624 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1626 *(cd->mcodeptr++) = 0xd9;
1627 emit_membase32(cd, (basereg),(disp),3);
1631 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1633 *(cd->mcodeptr++) = 0xdd;
1634 emit_membase(cd, (basereg),(disp),3);
1638 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1640 *(cd->mcodeptr++) = 0xdd;
1641 emit_membase32(cd, (basereg),(disp),3);
1645 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1647 *(cd->mcodeptr++) = 0xdb;
1648 emit_membase(cd, (basereg),(disp),7);
1652 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1654 *(cd->mcodeptr++) = 0xd9;
1655 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1659 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1661 *(cd->mcodeptr++) = 0xdd;
1662 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1666 void emit_fstps_mem(codegendata *cd, s4 mem)
1668 *(cd->mcodeptr++) = 0xd9;
1673 void emit_fstpl_mem(codegendata *cd, s4 mem)
1675 *(cd->mcodeptr++) = 0xdd;
1680 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1682 *(cd->mcodeptr++) = 0xdb;
1683 emit_membase(cd, (basereg),(disp),2);
1687 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1689 *(cd->mcodeptr++) = 0xdb;
1690 emit_membase(cd, (basereg),(disp),3);
1694 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1696 *(cd->mcodeptr++) = 0xdf;
1697 emit_membase(cd, (basereg),(disp),7);
1701 void emit_fchs(codegendata *cd)
1703 *(cd->mcodeptr++) = 0xd9;
1704 *(cd->mcodeptr++) = 0xe0;
1708 void emit_faddp(codegendata *cd)
1710 *(cd->mcodeptr++) = 0xde;
1711 *(cd->mcodeptr++) = 0xc1;
1715 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1717 *(cd->mcodeptr++) = 0xd8;
1718 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1722 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1724 *(cd->mcodeptr++) = 0xdc;
1725 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1729 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1731 *(cd->mcodeptr++) = 0xde;
1732 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1736 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1738 *(cd->mcodeptr++) = 0xd8;
1739 emit_membase(cd, (basereg),(disp),0);
1743 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1745 *(cd->mcodeptr++) = 0xdc;
1746 emit_membase(cd, (basereg),(disp),0);
1750 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1752 *(cd->mcodeptr++) = 0xd8;
1753 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1757 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1759 *(cd->mcodeptr++) = 0xdc;
1760 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1764 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1766 *(cd->mcodeptr++) = 0xde;
1767 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1771 void emit_fsubp(codegendata *cd)
1773 *(cd->mcodeptr++) = 0xde;
1774 *(cd->mcodeptr++) = 0xe9;
1778 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1780 *(cd->mcodeptr++) = 0xd8;
1781 emit_membase(cd, (basereg),(disp),4);
1785 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1787 *(cd->mcodeptr++) = 0xdc;
1788 emit_membase(cd, (basereg),(disp),4);
1792 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1794 *(cd->mcodeptr++) = 0xd8;
1795 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1799 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1801 *(cd->mcodeptr++) = 0xdc;
1802 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1806 void emit_fmulp(codegendata *cd)
1808 *(cd->mcodeptr++) = 0xde;
1809 *(cd->mcodeptr++) = 0xc9;
1813 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1815 *(cd->mcodeptr++) = 0xde;
1816 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1820 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1822 *(cd->mcodeptr++) = 0xd8;
1823 emit_membase(cd, (basereg),(disp),1);
1827 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1829 *(cd->mcodeptr++) = 0xdc;
1830 emit_membase(cd, (basereg),(disp),1);
1834 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1836 *(cd->mcodeptr++) = 0xd8;
1837 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1841 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1843 *(cd->mcodeptr++) = 0xdc;
1844 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1848 void emit_fdivp(codegendata *cd)
1850 *(cd->mcodeptr++) = 0xde;
1851 *(cd->mcodeptr++) = 0xf9;
1855 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1857 *(cd->mcodeptr++) = 0xde;
1858 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1862 void emit_fxch(codegendata *cd)
1864 *(cd->mcodeptr++) = 0xd9;
1865 *(cd->mcodeptr++) = 0xc9;
1869 void emit_fxch_reg(codegendata *cd, s4 reg)
1871 *(cd->mcodeptr++) = 0xd9;
1872 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1876 void emit_fprem(codegendata *cd)
1878 *(cd->mcodeptr++) = 0xd9;
1879 *(cd->mcodeptr++) = 0xf8;
1883 void emit_fprem1(codegendata *cd)
1885 *(cd->mcodeptr++) = 0xd9;
1886 *(cd->mcodeptr++) = 0xf5;
1890 void emit_fucom(codegendata *cd)
1892 *(cd->mcodeptr++) = 0xdd;
1893 *(cd->mcodeptr++) = 0xe1;
1897 void emit_fucom_reg(codegendata *cd, s4 reg)
1899 *(cd->mcodeptr++) = 0xdd;
1900 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1904 void emit_fucomp_reg(codegendata *cd, s4 reg)
1906 *(cd->mcodeptr++) = 0xdd;
1907 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1911 void emit_fucompp(codegendata *cd)
1913 *(cd->mcodeptr++) = 0xda;
1914 *(cd->mcodeptr++) = 0xe9;
1918 void emit_fnstsw(codegendata *cd)
1920 *(cd->mcodeptr++) = 0xdf;
1921 *(cd->mcodeptr++) = 0xe0;
1925 void emit_sahf(codegendata *cd)
1927 *(cd->mcodeptr++) = 0x9e;
1931 void emit_finit(codegendata *cd)
1933 *(cd->mcodeptr++) = 0x9b;
1934 *(cd->mcodeptr++) = 0xdb;
1935 *(cd->mcodeptr++) = 0xe3;
1939 void emit_fldcw_mem(codegendata *cd, s4 mem)
1941 *(cd->mcodeptr++) = 0xd9;
1946 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1948 *(cd->mcodeptr++) = 0xd9;
1949 emit_membase(cd, (basereg),(disp),5);
1953 void emit_wait(codegendata *cd)
1955 *(cd->mcodeptr++) = 0x9b;
1959 void emit_ffree_reg(codegendata *cd, s4 reg)
1961 *(cd->mcodeptr++) = 0xdd;
1962 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1966 void emit_fdecstp(codegendata *cd)
1968 *(cd->mcodeptr++) = 0xd9;
1969 *(cd->mcodeptr++) = 0xf6;
1973 void emit_fincstp(codegendata *cd)
1975 *(cd->mcodeptr++) = 0xd9;
1976 *(cd->mcodeptr++) = 0xf7;
1981 * These are local overrides for various environment variables in Emacs.
1982 * Please do not remove this and leave it at the end of the file, where
1983 * Emacs will automagically detect them.
1984 * ---------------------------------------------------------------------
1987 * indent-tabs-mode: t