1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008, 2009
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
33 #include "vm/jit/i386/codegen.h"
34 #include "vm/jit/i386/emit.h"
35 #include "vm/jit/i386/md-abi.h"
37 #include "mm/memory.hpp"
39 #include "threads/lock.hpp"
41 #include "vm/options.h"
42 #include "vm/statistics.h"
44 #include "vm/jit/abi.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/dseg.h"
47 #include "vm/jit/emit-common.hpp"
48 #include "vm/jit/jit.hpp"
49 #include "vm/jit/patcher-common.hpp"
50 #include "vm/jit/replace.hpp"
51 #include "vm/jit/trace.hpp"
52 #include "vm/jit/trap.hpp"
55 /* emit_load ******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff;
79 M_ILD(tempreg, REG_SP, disp);
82 M_LLD(tempreg, REG_SP, disp);
85 M_FLD(tempreg, REG_SP, disp);
88 M_DLD(tempreg, REG_SP, disp);
91 vm_abort("emit_load: unknown type %d", src->type);
103 /* emit_load_low ************************************************************
105 Emits a possible load of the low 32-bits of an operand.
107 *******************************************************************************/
109 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
115 assert(src->type == TYPE_LNG);
117 /* get required compiler data */
122 if (IS_INMEMORY(src->flags)) {
125 disp = src->vv.regoff;
127 M_ILD(tempreg, REG_SP, disp);
132 reg = GET_LOW_REG(src->vv.regoff);
138 /* emit_load_high ***********************************************************
140 Emits a possible load of the high 32-bits of an operand.
142 *******************************************************************************/
144 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
150 /* get required compiler data */
152 assert(src->type == TYPE_LNG);
156 if (IS_INMEMORY(src->flags)) {
159 disp = src->vv.regoff;
161 M_ILD(tempreg, REG_SP, disp + 4);
166 reg = GET_HIGH_REG(src->vv.regoff);
172 /* emit_store ******************************************************************
174 Emits a possible store of the destination operand.
176 *******************************************************************************/
178 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
183 /* get required compiler data */
187 if (IS_INMEMORY(dst->flags)) {
190 disp = dst->vv.regoff;
195 M_IST(d, REG_SP, disp);
198 M_LST(d, REG_SP, disp);
201 M_FST(d, REG_SP, disp);
204 M_DST(d, REG_SP, disp);
207 vm_abort("emit_store: unknown type %d", dst->type);
213 /* emit_store_low **************************************************************
215 Emits a possible store of the low 32-bits of the destination
218 *******************************************************************************/
220 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
224 assert(dst->type == TYPE_LNG);
226 /* get required compiler data */
230 if (IS_INMEMORY(dst->flags)) {
232 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
237 /* emit_store_high *************************************************************
239 Emits a possible store of the high 32-bits of the destination
242 *******************************************************************************/
244 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
248 assert(dst->type == TYPE_LNG);
250 /* get required compiler data */
254 if (IS_INMEMORY(dst->flags)) {
256 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
261 /* emit_copy *******************************************************************
263 Generates a register/memory to register/memory copy.
265 *******************************************************************************/
267 void emit_copy(jitdata *jd, instruction *iptr)
274 /* get required compiler data */
278 /* get source and destination variables */
280 src = VAROP(iptr->s1);
281 dst = VAROP(iptr->dst);
283 if ((src->vv.regoff != dst->vv.regoff) ||
284 ((src->flags ^ dst->flags) & INMEMORY)) {
286 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
287 /* emit nothing, as the value won't be used anyway */
291 /* If one of the variables resides in memory, we can eliminate
292 the register move from/to the temporary register with the
293 order of getting the destination register and the load. */
295 if (IS_INMEMORY(src->flags)) {
296 if (IS_LNG_TYPE(src->type))
297 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
301 s1 = emit_load(jd, iptr, src, d);
304 if (IS_LNG_TYPE(src->type))
305 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
307 s1 = emit_load(jd, iptr, src, REG_ITMP1);
309 d = codegen_reg_of_var(iptr->opc, dst, s1);
326 vm_abort("emit_copy: unknown type %d", src->type);
330 emit_store(jd, iptr, dst, d);
335 /* emit_branch *****************************************************************
337 Emits the code for conditional and unconditional branchs.
339 *******************************************************************************/
341 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
345 /* ATTENTION: a displacement overflow cannot happen */
347 /* check which branch to generate */
349 if (condition == BRANCH_UNCONDITIONAL) {
351 /* calculate the different displacements */
353 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
355 M_JMP_IMM(branchdisp);
358 /* calculate the different displacements */
360 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
394 vm_abort("emit_branch: unknown condition %d", condition);
400 /* emit_arithmetic_check *******************************************************
402 Emit an ArithmeticException check.
404 *******************************************************************************/
406 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
408 if (INSTRUCTION_MUST_CHECK(iptr)) {
411 M_ALD_MEM(reg, TRAP_ArithmeticException);
416 /* emit_arrayindexoutofbounds_check ********************************************
418 Emit a ArrayIndexOutOfBoundsException check.
420 *******************************************************************************/
422 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
424 if (INSTRUCTION_MUST_CHECK(iptr)) {
425 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
426 M_CMP(REG_ITMP3, s2);
428 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
433 /* emit_arraystore_check *******************************************************
435 Emit an ArrayStoreException check.
437 *******************************************************************************/
439 void emit_arraystore_check(codegendata *cd, instruction *iptr)
441 if (INSTRUCTION_MUST_CHECK(iptr)) {
444 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
449 /* emit_classcast_check ********************************************************
451 Emit a ClassCastException check.
453 *******************************************************************************/
455 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
457 if (INSTRUCTION_MUST_CHECK(iptr)) {
475 vm_abort("emit_classcast_check: unknown condition %d", condition);
477 M_ALD_MEM(s1, TRAP_ClassCastException);
482 /* emit_nullpointer_check ******************************************************
484 Emit a NullPointerException check.
486 *******************************************************************************/
488 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
490 if (INSTRUCTION_MUST_CHECK(iptr)) {
493 M_ALD_MEM(reg, TRAP_NullPointerException);
498 /* emit_exception_check ********************************************************
500 Emit an Exception check.
502 *******************************************************************************/
504 void emit_exception_check(codegendata *cd, instruction *iptr)
506 if (INSTRUCTION_MUST_CHECK(iptr)) {
509 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
514 /* emit_trap_compiler **********************************************************
516 Emit a trap instruction which calls the JIT compiler.
518 *******************************************************************************/
520 void emit_trap_compiler(codegendata *cd)
522 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
525 /* emit_trap_countdown *********************************************************
527 Emit a countdown trap.
529 counter....absolute address of the counter variable
531 *******************************************************************************/
533 void emit_trap_countdown(codegendata *cd, s4 *counter)
535 M_ISUB_IMM_MEMABS(1, (s4) counter);
537 M_ALD_MEM(REG_METHODPTR, TRAP_COUNTDOWN);
540 /* emit_trap *******************************************************************
542 Emit a trap instruction and return the original machine code.
544 *******************************************************************************/
546 uint32_t emit_trap(codegendata *cd)
550 /* Get machine code which is patched back in later. The
551 trap is 2 bytes long. */
553 mcode = *((uint16_t *) cd->mcodeptr);
556 /* XXX this breaks GDB, so we disable it for now */
557 *(cd->mcodeptr++) = 0xcc;
563 return (uint32_t) mcode;
567 /* emit_verbosecall_enter ******************************************************
569 Generates the code for the call trace.
571 *******************************************************************************/
574 void emit_verbosecall_enter(jitdata *jd)
581 int32_t stackframesize;
583 int align_off; /* offset for alignment compensation */
585 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
588 /* get required compiler data */
597 /* mark trace code */
601 /* keep stack 16-byte aligned */
603 stackframesize = 2 + TMP_CNT;
604 ALIGN_2(stackframesize);
606 M_ASUB_IMM(stackframesize * 8, REG_SP);
608 /* save temporary registers for leaf methods */
610 if (code_is_leafmethod(code)) {
611 for (i = 0; i < INT_TMP_CNT; i++)
612 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
615 /* no argument registers to save */
617 align_off = cd->stackframesize ? 4 : 0;
618 M_AST_IMM(m, REG_SP, 0 * 4);
619 M_AST_IMM(0, REG_SP, 1 * 4);
620 M_AST(REG_SP, REG_SP, 2 * 4);
621 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
622 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
625 /* no argument registers to restore */
627 /* restore temporary registers for leaf methods */
629 if (code_is_leafmethod(code)) {
630 for (i = 0; i < INT_TMP_CNT; i++)
631 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
634 M_AADD_IMM(stackframesize * 8, REG_SP);
636 /* mark trace code */
640 #endif /* !defined(NDEBUG) */
643 /* emit_verbosecall_exit *******************************************************
645 Generates the code for the call trace.
647 *******************************************************************************/
650 void emit_verbosecall_exit(jitdata *jd)
657 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
660 /* get required compiler data */
668 /* mark trace code */
672 /* keep stack 16-byte aligned */
674 M_ASUB_IMM(4 + 4 + 8, REG_SP);
676 /* save return value */
678 switch (md->returntype.type) {
681 M_IST(REG_RESULT, REG_SP, 2 * 4);
684 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
687 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
690 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
694 M_AST_IMM(m, REG_SP, 0 * 4);
695 M_AST(REG_SP, REG_SP, 1 * 4);
696 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
697 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
700 /* restore return value */
702 switch (md->returntype.type) {
705 M_ILD(REG_RESULT, REG_SP, 2 * 4);
708 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
712 M_AADD_IMM(4 + 4 + 8, REG_SP);
714 /* mark trace code */
718 #endif /* !defined(NDEBUG) */
721 /* code generation functions **************************************************/
723 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
725 if (basereg == ESP) {
727 emit_address_byte(0, dreg, ESP);
728 emit_address_byte(0, ESP, ESP);
730 else if (IS_IMM8(disp)) {
731 emit_address_byte(1, dreg, ESP);
732 emit_address_byte(0, ESP, ESP);
736 emit_address_byte(2, dreg, ESP);
737 emit_address_byte(0, ESP, ESP);
741 else if ((disp == 0) && (basereg != EBP)) {
742 emit_address_byte(0, dreg, basereg);
744 else if (IS_IMM8(disp)) {
745 emit_address_byte(1, dreg, basereg);
749 emit_address_byte(2, dreg, basereg);
755 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
757 if (basereg == ESP) {
758 emit_address_byte(2, dreg, ESP);
759 emit_address_byte(0, ESP, ESP);
763 emit_address_byte(2, dreg, basereg);
769 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
772 emit_address_byte(0, reg, 4);
773 emit_address_byte(scale, indexreg, 5);
776 else if ((disp == 0) && (basereg != EBP)) {
777 emit_address_byte(0, reg, 4);
778 emit_address_byte(scale, indexreg, basereg);
780 else if (IS_IMM8(disp)) {
781 emit_address_byte(1, reg, 4);
782 emit_address_byte(scale, indexreg, basereg);
786 emit_address_byte(2, reg, 4);
787 emit_address_byte(scale, indexreg, basereg);
793 /* low-level code emitter functions *******************************************/
795 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
797 COUNT(count_mov_reg_reg);
798 *(cd->mcodeptr++) = 0x89;
799 emit_reg((reg),(dreg));
803 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
805 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
809 /* 2-byte opcode for use with patchers */
810 void emit_mov_imm2_reg(codegendata *cd, s4 imm, s4 reg)
812 *(cd->mcodeptr++) = 0xc7;
813 emit_address_byte(3, 0, reg);
819 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
821 *(cd->mcodeptr++) = 0xc6;
827 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
829 COUNT(count_mov_mem_reg);
830 *(cd->mcodeptr++) = 0x8b;
831 emit_membase(cd, (basereg),(disp),(reg));
836 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
837 * constant membase immediate length of 32bit
839 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
841 COUNT(count_mov_mem_reg);
842 *(cd->mcodeptr++) = 0x8b;
843 emit_membase32(cd, (basereg),(disp),(reg));
847 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
849 COUNT(count_mov_reg_mem);
850 *(cd->mcodeptr++) = 0x89;
851 emit_membase(cd, (basereg),(disp),(reg));
855 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
857 COUNT(count_mov_reg_mem);
858 *(cd->mcodeptr++) = 0x89;
859 emit_membase32(cd, (basereg),(disp),(reg));
863 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
865 COUNT(count_mov_mem_reg);
866 *(cd->mcodeptr++) = 0x8b;
867 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
871 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
873 COUNT(count_mov_reg_mem);
874 *(cd->mcodeptr++) = 0x89;
875 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
879 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
881 COUNT(count_mov_reg_mem);
882 *(cd->mcodeptr++) = 0x66;
883 *(cd->mcodeptr++) = 0x89;
884 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
888 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
890 COUNT(count_mov_reg_mem);
891 *(cd->mcodeptr++) = 0x88;
892 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
896 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
898 COUNT(count_mov_reg_mem);
899 *(cd->mcodeptr++) = 0x89;
900 emit_mem((reg),(mem));
904 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
906 COUNT(count_mov_mem_reg);
907 *(cd->mcodeptr++) = 0x8b;
908 emit_mem((dreg),(mem));
912 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
914 *(cd->mcodeptr++) = 0xc7;
920 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
922 *(cd->mcodeptr++) = 0xc7;
923 emit_membase(cd, (basereg),(disp),0);
928 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
930 *(cd->mcodeptr++) = 0xc7;
931 emit_membase32(cd, (basereg),(disp),0);
936 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
938 *(cd->mcodeptr++) = 0xc6;
939 emit_membase(cd, (basereg),(disp),0);
944 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
946 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
947 *(cd->mcodeptr++) = 0x0f;
948 *(cd->mcodeptr++) = 0xbe;
953 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
955 COUNT(count_mov_mem_reg);
956 *(cd->mcodeptr++) = 0x0f;
957 *(cd->mcodeptr++) = 0xbe;
958 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
962 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
964 *(cd->mcodeptr++) = 0x0f;
965 *(cd->mcodeptr++) = 0xbf;
970 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
972 COUNT(count_mov_mem_reg);
973 *(cd->mcodeptr++) = 0x0f;
974 *(cd->mcodeptr++) = 0xbf;
975 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
979 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
981 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
982 *(cd->mcodeptr++) = 0x0f;
983 *(cd->mcodeptr++) = 0xb6;
988 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
990 *(cd->mcodeptr++) = 0x0f;
991 *(cd->mcodeptr++) = 0xb7;
996 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
998 COUNT(count_mov_mem_reg);
999 *(cd->mcodeptr++) = 0x0f;
1000 *(cd->mcodeptr++) = 0xb7;
1001 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1005 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1007 *(cd->mcodeptr++) = 0xc7;
1008 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1013 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1015 *(cd->mcodeptr++) = 0x66;
1016 *(cd->mcodeptr++) = 0xc7;
1017 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1022 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1024 *(cd->mcodeptr++) = 0xc6;
1025 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1033 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1035 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1036 emit_reg((reg),(dreg));
1040 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1042 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1043 emit_membase(cd, (basereg),(disp),(reg));
1047 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1049 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1050 emit_membase(cd, (basereg),(disp),(reg));
1054 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1057 *(cd->mcodeptr++) = 0x83;
1058 emit_reg((opc),(dreg));
1061 *(cd->mcodeptr++) = 0x81;
1062 emit_reg((opc),(dreg));
1068 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1070 *(cd->mcodeptr++) = 0x81;
1071 emit_reg((opc),(dreg));
1076 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1079 *(cd->mcodeptr++) = 0x83;
1080 emit_membase(cd, (basereg),(disp),(opc));
1083 *(cd->mcodeptr++) = 0x81;
1084 emit_membase(cd, (basereg),(disp),(opc));
1090 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1093 *(cd->mcodeptr++) = 0x83;
1094 emit_mem(opc, disp);
1097 *(cd->mcodeptr++) = 0x81;
1098 emit_mem(opc, disp);
1103 void emit_alu_memindex_reg(codegendata *cd, s4 opc, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1105 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1106 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1109 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1111 *(cd->mcodeptr++) = 0x85;
1112 emit_reg((reg),(dreg));
1116 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1118 *(cd->mcodeptr++) = 0xf7;
1126 * inc, dec operations
1128 void emit_inc_reg(codegendata *cd, s4 reg)
1130 *(cd->mcodeptr++) = 0xff;
1134 void emit_dec_mem(codegendata *cd, s4 mem)
1136 *(cd->mcodeptr++) = 0xff;
1141 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1143 *(cd->mcodeptr++) = 0x0f;
1144 *(cd->mcodeptr++) = 0xaf;
1145 emit_reg((dreg),(reg));
1149 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1151 *(cd->mcodeptr++) = 0x0f;
1152 *(cd->mcodeptr++) = 0xaf;
1153 emit_membase(cd, (basereg),(disp),(dreg));
1157 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1159 if (IS_IMM8((imm))) {
1160 *(cd->mcodeptr++) = 0x6b;
1164 *(cd->mcodeptr++) = 0x69;
1171 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1173 if (IS_IMM8((imm))) {
1174 *(cd->mcodeptr++) = 0x6b;
1175 emit_reg((dreg),(reg));
1178 *(cd->mcodeptr++) = 0x69;
1179 emit_reg((dreg),(reg));
1185 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1187 if (IS_IMM8((imm))) {
1188 *(cd->mcodeptr++) = 0x6b;
1189 emit_membase(cd, (basereg),(disp),(dreg));
1192 *(cd->mcodeptr++) = 0x69;
1193 emit_membase(cd, (basereg),(disp),(dreg));
1199 void emit_mul_reg(codegendata *cd, s4 reg)
1201 *(cd->mcodeptr++) = 0xf7;
1206 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1208 *(cd->mcodeptr++) = 0xf7;
1209 emit_membase(cd, (basereg),(disp),4);
1213 void emit_idiv_reg(codegendata *cd, s4 reg)
1215 *(cd->mcodeptr++) = 0xf7;
1224 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1226 *(cd->mcodeptr++) = 0xd3;
1227 emit_reg((opc),(reg));
1231 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1234 *(cd->mcodeptr++) = 0xd1;
1235 emit_reg((opc),(dreg));
1237 *(cd->mcodeptr++) = 0xc1;
1238 emit_reg((opc),(dreg));
1244 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1246 *(cd->mcodeptr++) = 0x0f;
1247 *(cd->mcodeptr++) = 0xa5;
1248 emit_reg((reg),(dreg));
1252 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1254 *(cd->mcodeptr++) = 0x0f;
1255 *(cd->mcodeptr++) = 0xa4;
1256 emit_reg((reg),(dreg));
1261 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1263 *(cd->mcodeptr++) = 0x0f;
1264 *(cd->mcodeptr++) = 0xa5;
1265 emit_membase(cd, (basereg),(disp),(reg));
1269 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1271 *(cd->mcodeptr++) = 0x0f;
1272 *(cd->mcodeptr++) = 0xad;
1273 emit_reg((reg),(dreg));
1277 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1279 *(cd->mcodeptr++) = 0x0f;
1280 *(cd->mcodeptr++) = 0xac;
1281 emit_reg((reg),(dreg));
1286 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1288 *(cd->mcodeptr++) = 0x0f;
1289 *(cd->mcodeptr++) = 0xad;
1290 emit_membase(cd, (basereg),(disp),(reg));
1298 void emit_jmp_imm(codegendata *cd, s4 imm)
1300 *(cd->mcodeptr++) = 0xe9;
1305 void emit_jmp_reg(codegendata *cd, s4 reg)
1307 *(cd->mcodeptr++) = 0xff;
1312 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1314 *(cd->mcodeptr++) = 0x0f;
1315 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1322 * conditional set operations
1324 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1326 assert(reg < 4); /* Can only operate on al, bl, cl, dl. */
1327 *(cd->mcodeptr++) = 0x0f;
1328 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1333 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1335 *(cd->mcodeptr++) = 0x0f;
1336 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1337 emit_membase(cd, (basereg),(disp),0);
1341 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1343 *(cd->mcodeptr++) = 0x0f;
1344 *(cd->mcodeptr++) = 0xc1;
1345 emit_mem((reg),(mem));
1349 void emit_neg_reg(codegendata *cd, s4 reg)
1351 *(cd->mcodeptr++) = 0xf7;
1357 void emit_push_imm(codegendata *cd, s4 imm)
1359 *(cd->mcodeptr++) = 0x68;
1364 void emit_pop_reg(codegendata *cd, s4 reg)
1366 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1370 void emit_push_reg(codegendata *cd, s4 reg)
1372 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1376 void emit_lock(codegendata *cd)
1378 *(cd->mcodeptr++) = 0xf0;
1385 void emit_call_reg(codegendata *cd, s4 reg)
1387 *(cd->mcodeptr++) = 0xff;
1392 void emit_call_imm(codegendata *cd, s4 imm)
1394 *(cd->mcodeptr++) = 0xe8;
1401 * floating point instructions
1403 void emit_fld1(codegendata *cd)
1405 *(cd->mcodeptr++) = 0xd9;
1406 *(cd->mcodeptr++) = 0xe8;
1410 void emit_fldz(codegendata *cd)
1412 *(cd->mcodeptr++) = 0xd9;
1413 *(cd->mcodeptr++) = 0xee;
1417 void emit_fld_reg(codegendata *cd, s4 reg)
1419 *(cd->mcodeptr++) = 0xd9;
1420 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1424 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1426 *(cd->mcodeptr++) = 0xd9;
1427 emit_membase(cd, (basereg),(disp),0);
1431 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1433 *(cd->mcodeptr++) = 0xd9;
1434 emit_membase32(cd, (basereg),(disp),0);
1438 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1440 *(cd->mcodeptr++) = 0xdd;
1441 emit_membase(cd, (basereg),(disp),0);
1445 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1447 *(cd->mcodeptr++) = 0xdd;
1448 emit_membase32(cd, (basereg),(disp),0);
1452 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1454 *(cd->mcodeptr++) = 0xdb;
1455 emit_membase(cd, (basereg),(disp),5);
1459 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1461 *(cd->mcodeptr++) = 0xd9;
1462 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1466 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1468 *(cd->mcodeptr++) = 0xdd;
1469 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1473 void emit_flds_mem(codegendata *cd, s4 mem)
1475 *(cd->mcodeptr++) = 0xd9;
1480 void emit_fldl_mem(codegendata *cd, s4 mem)
1482 *(cd->mcodeptr++) = 0xdd;
1487 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1489 *(cd->mcodeptr++) = 0xdb;
1490 emit_membase(cd, (basereg),(disp),0);
1494 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1496 *(cd->mcodeptr++) = 0xdf;
1497 emit_membase(cd, (basereg),(disp),5);
1501 void emit_fst_reg(codegendata *cd, s4 reg)
1503 *(cd->mcodeptr++) = 0xdd;
1504 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1508 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1510 *(cd->mcodeptr++) = 0xd9;
1511 emit_membase(cd, (basereg),(disp),2);
1515 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1517 *(cd->mcodeptr++) = 0xdd;
1518 emit_membase(cd, (basereg),(disp),2);
1522 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1524 *(cd->mcodeptr++) = 0xd9;
1525 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1529 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1531 *(cd->mcodeptr++) = 0xdd;
1532 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1536 void emit_fstp_reg(codegendata *cd, s4 reg)
1538 *(cd->mcodeptr++) = 0xdd;
1539 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1543 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1545 *(cd->mcodeptr++) = 0xd9;
1546 emit_membase(cd, (basereg),(disp),3);
1550 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1552 *(cd->mcodeptr++) = 0xd9;
1553 emit_membase32(cd, (basereg),(disp),3);
1557 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1559 *(cd->mcodeptr++) = 0xdd;
1560 emit_membase(cd, (basereg),(disp),3);
1564 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1566 *(cd->mcodeptr++) = 0xdd;
1567 emit_membase32(cd, (basereg),(disp),3);
1571 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1573 *(cd->mcodeptr++) = 0xdb;
1574 emit_membase(cd, (basereg),(disp),7);
1578 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1580 *(cd->mcodeptr++) = 0xd9;
1581 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1585 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1587 *(cd->mcodeptr++) = 0xdd;
1588 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1592 void emit_fstps_mem(codegendata *cd, s4 mem)
1594 *(cd->mcodeptr++) = 0xd9;
1599 void emit_fstpl_mem(codegendata *cd, s4 mem)
1601 *(cd->mcodeptr++) = 0xdd;
1606 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1608 *(cd->mcodeptr++) = 0xdb;
1609 emit_membase(cd, (basereg),(disp),2);
1613 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1615 *(cd->mcodeptr++) = 0xdb;
1616 emit_membase(cd, (basereg),(disp),3);
1620 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1622 *(cd->mcodeptr++) = 0xdf;
1623 emit_membase(cd, (basereg),(disp),7);
1627 void emit_fchs(codegendata *cd)
1629 *(cd->mcodeptr++) = 0xd9;
1630 *(cd->mcodeptr++) = 0xe0;
1634 void emit_faddp(codegendata *cd)
1636 *(cd->mcodeptr++) = 0xde;
1637 *(cd->mcodeptr++) = 0xc1;
1641 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1643 *(cd->mcodeptr++) = 0xd8;
1644 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1648 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1650 *(cd->mcodeptr++) = 0xdc;
1651 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1655 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1657 *(cd->mcodeptr++) = 0xde;
1658 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1662 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1664 *(cd->mcodeptr++) = 0xd8;
1665 emit_membase(cd, (basereg),(disp),0);
1669 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1671 *(cd->mcodeptr++) = 0xdc;
1672 emit_membase(cd, (basereg),(disp),0);
1676 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1678 *(cd->mcodeptr++) = 0xd8;
1679 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1683 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1685 *(cd->mcodeptr++) = 0xdc;
1686 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1690 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1692 *(cd->mcodeptr++) = 0xde;
1693 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1697 void emit_fsubp(codegendata *cd)
1699 *(cd->mcodeptr++) = 0xde;
1700 *(cd->mcodeptr++) = 0xe9;
1704 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1706 *(cd->mcodeptr++) = 0xd8;
1707 emit_membase(cd, (basereg),(disp),4);
1711 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1713 *(cd->mcodeptr++) = 0xdc;
1714 emit_membase(cd, (basereg),(disp),4);
1718 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1720 *(cd->mcodeptr++) = 0xd8;
1721 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1725 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1727 *(cd->mcodeptr++) = 0xdc;
1728 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1732 void emit_fmulp(codegendata *cd)
1734 *(cd->mcodeptr++) = 0xde;
1735 *(cd->mcodeptr++) = 0xc9;
1739 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1741 *(cd->mcodeptr++) = 0xde;
1742 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1746 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1748 *(cd->mcodeptr++) = 0xd8;
1749 emit_membase(cd, (basereg),(disp),1);
1753 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1755 *(cd->mcodeptr++) = 0xdc;
1756 emit_membase(cd, (basereg),(disp),1);
1760 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1762 *(cd->mcodeptr++) = 0xd8;
1763 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1767 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1769 *(cd->mcodeptr++) = 0xdc;
1770 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1774 void emit_fdivp(codegendata *cd)
1776 *(cd->mcodeptr++) = 0xde;
1777 *(cd->mcodeptr++) = 0xf9;
1781 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1783 *(cd->mcodeptr++) = 0xde;
1784 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1788 void emit_fxch(codegendata *cd)
1790 *(cd->mcodeptr++) = 0xd9;
1791 *(cd->mcodeptr++) = 0xc9;
1795 void emit_fxch_reg(codegendata *cd, s4 reg)
1797 *(cd->mcodeptr++) = 0xd9;
1798 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1802 void emit_fprem(codegendata *cd)
1804 *(cd->mcodeptr++) = 0xd9;
1805 *(cd->mcodeptr++) = 0xf8;
1809 void emit_fprem1(codegendata *cd)
1811 *(cd->mcodeptr++) = 0xd9;
1812 *(cd->mcodeptr++) = 0xf5;
1816 void emit_fucom(codegendata *cd)
1818 *(cd->mcodeptr++) = 0xdd;
1819 *(cd->mcodeptr++) = 0xe1;
1823 void emit_fucom_reg(codegendata *cd, s4 reg)
1825 *(cd->mcodeptr++) = 0xdd;
1826 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1830 void emit_fucomp_reg(codegendata *cd, s4 reg)
1832 *(cd->mcodeptr++) = 0xdd;
1833 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1837 void emit_fucompp(codegendata *cd)
1839 *(cd->mcodeptr++) = 0xda;
1840 *(cd->mcodeptr++) = 0xe9;
1844 void emit_fnstsw(codegendata *cd)
1846 *(cd->mcodeptr++) = 0xdf;
1847 *(cd->mcodeptr++) = 0xe0;
1851 void emit_sahf(codegendata *cd)
1853 *(cd->mcodeptr++) = 0x9e;
1857 void emit_finit(codegendata *cd)
1859 *(cd->mcodeptr++) = 0x9b;
1860 *(cd->mcodeptr++) = 0xdb;
1861 *(cd->mcodeptr++) = 0xe3;
1865 void emit_fldcw_mem(codegendata *cd, s4 mem)
1867 *(cd->mcodeptr++) = 0xd9;
1872 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1874 *(cd->mcodeptr++) = 0xd9;
1875 emit_membase(cd, (basereg),(disp),5);
1879 void emit_wait(codegendata *cd)
1881 *(cd->mcodeptr++) = 0x9b;
1885 void emit_ffree_reg(codegendata *cd, s4 reg)
1887 *(cd->mcodeptr++) = 0xdd;
1888 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1892 void emit_fdecstp(codegendata *cd)
1894 *(cd->mcodeptr++) = 0xd9;
1895 *(cd->mcodeptr++) = 0xf6;
1899 void emit_fincstp(codegendata *cd)
1901 *(cd->mcodeptr++) = 0xd9;
1902 *(cd->mcodeptr++) = 0xf7;
1905 #if defined(ENABLE_ESCAPE_CHECK)
1906 void emit_escape_check(codegendata *cd, s4 reg) {
1908 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1910 M_IADD_IMM(4, REG_SP);
1915 * These are local overrides for various environment variables in Emacs.
1916 * Please do not remove this and leave it at the end of the file, where
1917 * Emacs will automagically detect them.
1918 * ---------------------------------------------------------------------
1921 * indent-tabs-mode: t