1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 8211 2007-07-18 19:52:23Z michi $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #include "threads/lock-common.h"
44 #include "vm/builtin.h"
45 #include "vm/exceptions.h"
47 #include "vm/jit/abi.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/dseg.h"
50 #include "vm/jit/emit-common.h"
51 #include "vm/jit/jit.h"
52 #include "vm/jit/replace.h"
54 #include "vmcore/options.h"
55 #include "vmcore/statistics.h"
58 /* emit_load ******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (IS_INMEMORY(src->flags)) {
77 disp = src->vv.regoff;
82 M_ILD(tempreg, REG_SP, disp);
85 M_LLD(tempreg, REG_SP, disp);
88 M_FLD(tempreg, REG_SP, disp);
91 M_DLD(tempreg, REG_SP, disp);
94 vm_abort("emit_load: unknown type %d", src->type);
100 reg = src->vv.regoff;
106 /* emit_load_low ************************************************************
108 Emits a possible load of the low 32-bits of an operand.
110 *******************************************************************************/
112 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
118 assert(src->type == TYPE_LNG);
120 /* get required compiler data */
125 if (IS_INMEMORY(src->flags)) {
128 disp = src->vv.regoff;
130 M_ILD(tempreg, REG_SP, disp);
135 reg = GET_LOW_REG(src->vv.regoff);
141 /* emit_load_high ***********************************************************
143 Emits a possible load of the high 32-bits of an operand.
145 *******************************************************************************/
147 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
153 /* get required compiler data */
155 assert(src->type == TYPE_LNG);
159 if (IS_INMEMORY(src->flags)) {
162 disp = src->vv.regoff;
164 M_ILD(tempreg, REG_SP, disp + 4);
169 reg = GET_HIGH_REG(src->vv.regoff);
175 /* emit_store ******************************************************************
177 Emits a possible store of the destination operand.
179 *******************************************************************************/
181 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
186 /* get required compiler data */
190 if (IS_INMEMORY(dst->flags)) {
193 disp = dst->vv.regoff;
198 M_IST(d, REG_SP, disp);
201 M_LST(d, REG_SP, disp);
204 M_FST(d, REG_SP, disp);
207 M_DST(d, REG_SP, disp);
210 vm_abort("emit_store: unknown type %d", dst->type);
216 /* emit_store_low **************************************************************
218 Emits a possible store of the low 32-bits of the destination
221 *******************************************************************************/
223 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
227 assert(dst->type == TYPE_LNG);
229 /* get required compiler data */
233 if (IS_INMEMORY(dst->flags)) {
235 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
240 /* emit_store_high *************************************************************
242 Emits a possible store of the high 32-bits of the destination
245 *******************************************************************************/
247 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
251 assert(dst->type == TYPE_LNG);
253 /* get required compiler data */
257 if (IS_INMEMORY(dst->flags)) {
259 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
264 /* emit_copy *******************************************************************
266 Generates a register/memory to register/memory copy.
268 *******************************************************************************/
270 void emit_copy(jitdata *jd, instruction *iptr)
277 /* get required compiler data */
281 /* get source and destination variables */
283 src = VAROP(iptr->s1);
284 dst = VAROP(iptr->dst);
286 if ((src->vv.regoff != dst->vv.regoff) ||
287 ((src->flags ^ dst->flags) & INMEMORY)) {
289 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
290 /* emit nothing, as the value won't be used anyway */
294 /* If one of the variables resides in memory, we can eliminate
295 the register move from/to the temporary register with the
296 order of getting the destination register and the load. */
298 if (IS_INMEMORY(src->flags)) {
299 if (IS_LNG_TYPE(src->type))
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
302 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
304 s1 = emit_load(jd, iptr, src, d);
307 if (IS_LNG_TYPE(src->type))
308 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
310 s1 = emit_load(jd, iptr, src, REG_ITMP1);
312 d = codegen_reg_of_var(iptr->opc, dst, s1);
329 vm_abort("emit_copy: unknown type %d", src->type);
333 emit_store(jd, iptr, dst, d);
338 /* emit_branch *****************************************************************
340 Emits the code for conditional and unconditional branchs.
342 *******************************************************************************/
344 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
348 /* ATTENTION: a displacement overflow cannot happen */
350 /* check which branch to generate */
352 if (condition == BRANCH_UNCONDITIONAL) {
354 /* calculate the different displacements */
356 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
358 M_JMP_IMM(branchdisp);
361 /* calculate the different displacements */
363 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
397 vm_abort("emit_branch: unknown condition %d", condition);
403 /* emit_arithmetic_check *******************************************************
405 Emit an ArithmeticException check.
407 *******************************************************************************/
409 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
411 if (INSTRUCTION_MUST_CHECK(iptr)) {
414 M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
419 /* emit_arrayindexoutofbounds_check ********************************************
421 Emit a ArrayIndexOutOfBoundsException check.
423 *******************************************************************************/
425 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
427 if (INSTRUCTION_MUST_CHECK(iptr)) {
428 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
429 M_CMP(REG_ITMP3, s2);
431 M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
436 /* emit_classcast_check ********************************************************
438 Emit a ClassCastException check.
440 *******************************************************************************/
442 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
444 if (INSTRUCTION_MUST_CHECK(iptr)) {
456 vm_abort("emit_classcast_check: unknown condition %d", condition);
458 M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
463 /* emit_nullpointer_check ******************************************************
465 Emit a NullPointerException check.
467 *******************************************************************************/
469 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
471 if (INSTRUCTION_MUST_CHECK(iptr)) {
474 M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
479 /* emit_exception_check ********************************************************
481 Emit an Exception check.
483 *******************************************************************************/
485 void emit_exception_check(codegendata *cd, instruction *iptr)
487 if (INSTRUCTION_MUST_CHECK(iptr)) {
490 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
495 /* emit_patcher_stubs **********************************************************
497 Generates the code for the patcher stubs.
499 *******************************************************************************/
501 void emit_patcher_stubs(jitdata *jd)
511 /* get required compiler data */
515 /* generate code patching stub call code */
519 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
520 /* check code segment size */
524 /* Get machine code which is patched back in later. A
525 `call rel32' is 5 bytes long. */
527 savedmcodeptr = cd->mcodebase + pref->branchpos;
528 mcode = *((u8 *) savedmcodeptr);
530 /* patch in `call rel32' to call the following code */
532 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
533 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
535 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
537 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
543 /* move pointer to java_objectheader onto stack */
545 #if defined(ENABLE_THREADS)
546 (void) dseg_add_unique_address(cd, NULL); /* flcword */
547 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
548 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
550 M_MOV_IMM(0, REG_ITMP3);
552 M_AADD_IMM(disp, REG_ITMP3);
558 /* move machine code bytes and classinfo pointer into registers */
560 M_PUSH_IMM(mcode >> 32);
562 M_PUSH_IMM(pref->ref);
563 M_PUSH_IMM(pref->patcher);
565 if (targetdisp == 0) {
566 targetdisp = cd->mcodeptr - cd->mcodebase;
568 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
572 M_JMP_IMM((cd->mcodebase + targetdisp) -
573 (cd->mcodeptr + PATCHER_CALL_SIZE));
579 /* emit_verbosecall_enter ******************************************************
581 Generates the code for the call trace.
583 *******************************************************************************/
586 void emit_verbosecall_enter(jitdata *jd)
596 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
599 /* get required compiler data */
607 /* mark trace code */
611 /* methodinfo* + arguments + return address */
613 disp = (TRACE_ARGS_NUM + 1 + TMP_CNT) * 8 + cd->stackframesize * 8 + 4;
615 M_ASUB_IMM((TRACE_ARGS_NUM + 1 + TMP_CNT) * 8, REG_SP);
617 /* save temporary registers for leaf methods */
619 for (i = 0; i < INT_TMP_CNT; i++)
620 M_IST(rd->tmpintregs[i], REG_SP, (TRACE_ARGS_NUM + 1 + i) * 8);
622 /* save argument registers */
624 for (i = 0; i < md->paramcount; i++) {
627 switch (md->paramtypes[i].type) {
629 M_ILD(EAX, REG_SP, disp);
631 M_LST(EAX_EDX_PACKED, REG_SP, d);
634 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
635 M_LST(REG_ITMP12_PACKED, REG_SP, d);
638 M_ALD(REG_ITMP1, REG_SP, disp);
639 M_AST(REG_ITMP1, REG_SP, d);
640 M_IST_IMM(0, REG_SP, d + 4); /* high-bits are zero */
643 M_FLD(REG_NULL, REG_SP, disp);
644 M_FST(REG_NULL, REG_SP, d);
645 M_IST_IMM(0, REG_SP, d + 4); /* high-bits are zero */
648 M_DLD(REG_NULL, REG_SP, disp);
649 M_DST(REG_NULL, REG_SP, d);
656 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
658 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
661 /* restore temporary registers for leaf methods */
663 for (i = 0; i < INT_TMP_CNT; i++)
664 M_ILD(rd->tmpintregs[i], REG_SP, (TRACE_ARGS_NUM + 1 + i) * 8);
666 M_AADD_IMM((TRACE_ARGS_NUM + 1 + TMP_CNT) * 8, REG_SP);
668 /* mark trace code */
672 #endif /* !defined(NDEBUG) */
675 /* emit_verbosecall_exit *******************************************************
677 Generates the code for the call trace.
679 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
681 *******************************************************************************/
684 void emit_verbosecall_exit(jitdata *jd)
690 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
693 /* get required compiler data */
699 /* mark trace code */
703 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
705 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
707 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
708 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
710 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
712 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
715 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
717 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
719 /* mark trace code */
723 #endif /* !defined(NDEBUG) */
726 /* code generation functions **************************************************/
728 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
730 if (basereg == ESP) {
732 emit_address_byte(0, dreg, ESP);
733 emit_address_byte(0, ESP, ESP);
735 else if (IS_IMM8(disp)) {
736 emit_address_byte(1, dreg, ESP);
737 emit_address_byte(0, ESP, ESP);
741 emit_address_byte(2, dreg, ESP);
742 emit_address_byte(0, ESP, ESP);
746 else if ((disp == 0) && (basereg != EBP)) {
747 emit_address_byte(0, dreg, basereg);
749 else if (IS_IMM8(disp)) {
750 emit_address_byte(1, dreg, basereg);
754 emit_address_byte(2, dreg, basereg);
760 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
762 if (basereg == ESP) {
763 emit_address_byte(2, dreg, ESP);
764 emit_address_byte(0, ESP, ESP);
768 emit_address_byte(2, dreg, basereg);
774 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
777 emit_address_byte(0, reg, 4);
778 emit_address_byte(scale, indexreg, 5);
781 else if ((disp == 0) && (basereg != EBP)) {
782 emit_address_byte(0, reg, 4);
783 emit_address_byte(scale, indexreg, basereg);
785 else if (IS_IMM8(disp)) {
786 emit_address_byte(1, reg, 4);
787 emit_address_byte(scale, indexreg, basereg);
791 emit_address_byte(2, reg, 4);
792 emit_address_byte(scale, indexreg, basereg);
798 /* low-level code emitter functions *******************************************/
800 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
802 COUNT(count_mov_reg_reg);
803 *(cd->mcodeptr++) = 0x89;
804 emit_reg((reg),(dreg));
808 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
810 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
815 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
817 *(cd->mcodeptr++) = 0xc6;
823 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
825 COUNT(count_mov_mem_reg);
826 *(cd->mcodeptr++) = 0x8b;
827 emit_membase(cd, (basereg),(disp),(reg));
832 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
833 * constant membase immediate length of 32bit
835 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
837 COUNT(count_mov_mem_reg);
838 *(cd->mcodeptr++) = 0x8b;
839 emit_membase32(cd, (basereg),(disp),(reg));
843 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
845 COUNT(count_mov_reg_mem);
846 *(cd->mcodeptr++) = 0x89;
847 emit_membase(cd, (basereg),(disp),(reg));
851 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
853 COUNT(count_mov_reg_mem);
854 *(cd->mcodeptr++) = 0x89;
855 emit_membase32(cd, (basereg),(disp),(reg));
859 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
861 COUNT(count_mov_mem_reg);
862 *(cd->mcodeptr++) = 0x8b;
863 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
867 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
869 COUNT(count_mov_reg_mem);
870 *(cd->mcodeptr++) = 0x89;
871 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
875 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
877 COUNT(count_mov_reg_mem);
878 *(cd->mcodeptr++) = 0x66;
879 *(cd->mcodeptr++) = 0x89;
880 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
884 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
886 COUNT(count_mov_reg_mem);
887 *(cd->mcodeptr++) = 0x88;
888 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
892 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
894 COUNT(count_mov_reg_mem);
895 *(cd->mcodeptr++) = 0x89;
896 emit_mem((reg),(mem));
900 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
902 COUNT(count_mov_mem_reg);
903 *(cd->mcodeptr++) = 0x8b;
904 emit_mem((dreg),(mem));
908 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
910 *(cd->mcodeptr++) = 0xc7;
916 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
918 *(cd->mcodeptr++) = 0xc7;
919 emit_membase(cd, (basereg),(disp),0);
924 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
926 *(cd->mcodeptr++) = 0xc7;
927 emit_membase32(cd, (basereg),(disp),0);
932 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
934 *(cd->mcodeptr++) = 0xc6;
935 emit_membase(cd, (basereg),(disp),0);
940 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
942 COUNT(count_mov_mem_reg);
943 *(cd->mcodeptr++) = 0x0f;
944 *(cd->mcodeptr++) = 0xbe;
945 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
949 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
951 *(cd->mcodeptr++) = 0x0f;
952 *(cd->mcodeptr++) = 0xbf;
957 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
959 COUNT(count_mov_mem_reg);
960 *(cd->mcodeptr++) = 0x0f;
961 *(cd->mcodeptr++) = 0xbf;
962 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
966 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
968 *(cd->mcodeptr++) = 0x0f;
969 *(cd->mcodeptr++) = 0xb7;
974 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
976 COUNT(count_mov_mem_reg);
977 *(cd->mcodeptr++) = 0x0f;
978 *(cd->mcodeptr++) = 0xb7;
979 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
983 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
985 *(cd->mcodeptr++) = 0xc7;
986 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
991 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
993 *(cd->mcodeptr++) = 0x66;
994 *(cd->mcodeptr++) = 0xc7;
995 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1000 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1002 *(cd->mcodeptr++) = 0xc6;
1003 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1011 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1013 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1014 emit_reg((reg),(dreg));
1018 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1020 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1021 emit_membase(cd, (basereg),(disp),(reg));
1025 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1027 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1028 emit_membase(cd, (basereg),(disp),(reg));
1032 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1035 *(cd->mcodeptr++) = 0x83;
1036 emit_reg((opc),(dreg));
1039 *(cd->mcodeptr++) = 0x81;
1040 emit_reg((opc),(dreg));
1046 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1048 *(cd->mcodeptr++) = 0x81;
1049 emit_reg((opc),(dreg));
1054 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1057 *(cd->mcodeptr++) = 0x83;
1058 emit_membase(cd, (basereg),(disp),(opc));
1061 *(cd->mcodeptr++) = 0x81;
1062 emit_membase(cd, (basereg),(disp),(opc));
1068 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1071 *(cd->mcodeptr++) = 0x83;
1072 emit_mem(opc, disp);
1075 *(cd->mcodeptr++) = 0x81;
1076 emit_mem(opc, disp);
1082 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1084 *(cd->mcodeptr++) = 0x85;
1085 emit_reg((reg),(dreg));
1089 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1091 *(cd->mcodeptr++) = 0xf7;
1099 * inc, dec operations
1101 void emit_dec_mem(codegendata *cd, s4 mem)
1103 *(cd->mcodeptr++) = 0xff;
1108 void emit_cltd(codegendata *cd)
1110 *(cd->mcodeptr++) = 0x99;
1114 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1116 *(cd->mcodeptr++) = 0x0f;
1117 *(cd->mcodeptr++) = 0xaf;
1118 emit_reg((dreg),(reg));
1122 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1124 *(cd->mcodeptr++) = 0x0f;
1125 *(cd->mcodeptr++) = 0xaf;
1126 emit_membase(cd, (basereg),(disp),(dreg));
1130 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1132 if (IS_IMM8((imm))) {
1133 *(cd->mcodeptr++) = 0x6b;
1137 *(cd->mcodeptr++) = 0x69;
1144 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1146 if (IS_IMM8((imm))) {
1147 *(cd->mcodeptr++) = 0x6b;
1148 emit_reg((dreg),(reg));
1151 *(cd->mcodeptr++) = 0x69;
1152 emit_reg((dreg),(reg));
1158 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1160 if (IS_IMM8((imm))) {
1161 *(cd->mcodeptr++) = 0x6b;
1162 emit_membase(cd, (basereg),(disp),(dreg));
1165 *(cd->mcodeptr++) = 0x69;
1166 emit_membase(cd, (basereg),(disp),(dreg));
1172 void emit_mul_reg(codegendata *cd, s4 reg)
1174 *(cd->mcodeptr++) = 0xf7;
1179 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1181 *(cd->mcodeptr++) = 0xf7;
1182 emit_membase(cd, (basereg),(disp),4);
1186 void emit_idiv_reg(codegendata *cd, s4 reg)
1188 *(cd->mcodeptr++) = 0xf7;
1193 void emit_ret(codegendata *cd)
1195 *(cd->mcodeptr++) = 0xc3;
1203 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1205 *(cd->mcodeptr++) = 0xd3;
1206 emit_reg((opc),(reg));
1210 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1213 *(cd->mcodeptr++) = 0xd1;
1214 emit_reg((opc),(dreg));
1216 *(cd->mcodeptr++) = 0xc1;
1217 emit_reg((opc),(dreg));
1223 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1225 *(cd->mcodeptr++) = 0x0f;
1226 *(cd->mcodeptr++) = 0xa5;
1227 emit_reg((reg),(dreg));
1231 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1233 *(cd->mcodeptr++) = 0x0f;
1234 *(cd->mcodeptr++) = 0xa4;
1235 emit_reg((reg),(dreg));
1240 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1242 *(cd->mcodeptr++) = 0x0f;
1243 *(cd->mcodeptr++) = 0xa5;
1244 emit_membase(cd, (basereg),(disp),(reg));
1248 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1250 *(cd->mcodeptr++) = 0x0f;
1251 *(cd->mcodeptr++) = 0xad;
1252 emit_reg((reg),(dreg));
1256 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1258 *(cd->mcodeptr++) = 0x0f;
1259 *(cd->mcodeptr++) = 0xac;
1260 emit_reg((reg),(dreg));
1265 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1267 *(cd->mcodeptr++) = 0x0f;
1268 *(cd->mcodeptr++) = 0xad;
1269 emit_membase(cd, (basereg),(disp),(reg));
1277 void emit_jmp_imm(codegendata *cd, s4 imm)
1279 *(cd->mcodeptr++) = 0xe9;
1284 void emit_jmp_reg(codegendata *cd, s4 reg)
1286 *(cd->mcodeptr++) = 0xff;
1291 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1293 *(cd->mcodeptr++) = 0x0f;
1294 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1301 * conditional set operations
1303 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1305 *(cd->mcodeptr++) = 0x0f;
1306 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1311 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1313 *(cd->mcodeptr++) = 0x0f;
1314 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1315 emit_membase(cd, (basereg),(disp),0);
1319 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1321 *(cd->mcodeptr++) = 0x0f;
1322 *(cd->mcodeptr++) = 0xc1;
1323 emit_mem((reg),(mem));
1327 void emit_neg_reg(codegendata *cd, s4 reg)
1329 *(cd->mcodeptr++) = 0xf7;
1335 void emit_push_imm(codegendata *cd, s4 imm)
1337 *(cd->mcodeptr++) = 0x68;
1342 void emit_pop_reg(codegendata *cd, s4 reg)
1344 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1348 void emit_push_reg(codegendata *cd, s4 reg)
1350 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1354 void emit_nop(codegendata *cd)
1356 *(cd->mcodeptr++) = 0x90;
1360 void emit_lock(codegendata *cd)
1362 *(cd->mcodeptr++) = 0xf0;
1369 void emit_call_reg(codegendata *cd, s4 reg)
1371 *(cd->mcodeptr++) = 0xff;
1376 void emit_call_imm(codegendata *cd, s4 imm)
1378 *(cd->mcodeptr++) = 0xe8;
1385 * floating point instructions
1387 void emit_fld1(codegendata *cd)
1389 *(cd->mcodeptr++) = 0xd9;
1390 *(cd->mcodeptr++) = 0xe8;
1394 void emit_fldz(codegendata *cd)
1396 *(cd->mcodeptr++) = 0xd9;
1397 *(cd->mcodeptr++) = 0xee;
1401 void emit_fld_reg(codegendata *cd, s4 reg)
1403 *(cd->mcodeptr++) = 0xd9;
1404 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1408 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1410 *(cd->mcodeptr++) = 0xd9;
1411 emit_membase(cd, (basereg),(disp),0);
1415 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1417 *(cd->mcodeptr++) = 0xd9;
1418 emit_membase32(cd, (basereg),(disp),0);
1422 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1424 *(cd->mcodeptr++) = 0xdd;
1425 emit_membase(cd, (basereg),(disp),0);
1429 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1431 *(cd->mcodeptr++) = 0xdd;
1432 emit_membase32(cd, (basereg),(disp),0);
1436 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1438 *(cd->mcodeptr++) = 0xdb;
1439 emit_membase(cd, (basereg),(disp),5);
1443 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1445 *(cd->mcodeptr++) = 0xd9;
1446 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1450 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1452 *(cd->mcodeptr++) = 0xdd;
1453 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1457 void emit_flds_mem(codegendata *cd, s4 mem)
1459 *(cd->mcodeptr++) = 0xd9;
1464 void emit_fldl_mem(codegendata *cd, s4 mem)
1466 *(cd->mcodeptr++) = 0xdd;
1471 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1473 *(cd->mcodeptr++) = 0xdb;
1474 emit_membase(cd, (basereg),(disp),0);
1478 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1480 *(cd->mcodeptr++) = 0xdf;
1481 emit_membase(cd, (basereg),(disp),5);
1485 void emit_fst_reg(codegendata *cd, s4 reg)
1487 *(cd->mcodeptr++) = 0xdd;
1488 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1492 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1494 *(cd->mcodeptr++) = 0xd9;
1495 emit_membase(cd, (basereg),(disp),2);
1499 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1501 *(cd->mcodeptr++) = 0xdd;
1502 emit_membase(cd, (basereg),(disp),2);
1506 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1508 *(cd->mcodeptr++) = 0xd9;
1509 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1513 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1515 *(cd->mcodeptr++) = 0xdd;
1516 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1520 void emit_fstp_reg(codegendata *cd, s4 reg)
1522 *(cd->mcodeptr++) = 0xdd;
1523 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1527 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1529 *(cd->mcodeptr++) = 0xd9;
1530 emit_membase(cd, (basereg),(disp),3);
1534 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1536 *(cd->mcodeptr++) = 0xd9;
1537 emit_membase32(cd, (basereg),(disp),3);
1541 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1543 *(cd->mcodeptr++) = 0xdd;
1544 emit_membase(cd, (basereg),(disp),3);
1548 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1550 *(cd->mcodeptr++) = 0xdd;
1551 emit_membase32(cd, (basereg),(disp),3);
1555 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1557 *(cd->mcodeptr++) = 0xdb;
1558 emit_membase(cd, (basereg),(disp),7);
1562 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1564 *(cd->mcodeptr++) = 0xd9;
1565 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1569 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1571 *(cd->mcodeptr++) = 0xdd;
1572 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1576 void emit_fstps_mem(codegendata *cd, s4 mem)
1578 *(cd->mcodeptr++) = 0xd9;
1583 void emit_fstpl_mem(codegendata *cd, s4 mem)
1585 *(cd->mcodeptr++) = 0xdd;
1590 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1592 *(cd->mcodeptr++) = 0xdb;
1593 emit_membase(cd, (basereg),(disp),2);
1597 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1599 *(cd->mcodeptr++) = 0xdb;
1600 emit_membase(cd, (basereg),(disp),3);
1604 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1606 *(cd->mcodeptr++) = 0xdf;
1607 emit_membase(cd, (basereg),(disp),7);
1611 void emit_fchs(codegendata *cd)
1613 *(cd->mcodeptr++) = 0xd9;
1614 *(cd->mcodeptr++) = 0xe0;
1618 void emit_faddp(codegendata *cd)
1620 *(cd->mcodeptr++) = 0xde;
1621 *(cd->mcodeptr++) = 0xc1;
1625 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1627 *(cd->mcodeptr++) = 0xd8;
1628 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1632 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1634 *(cd->mcodeptr++) = 0xdc;
1635 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1639 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1641 *(cd->mcodeptr++) = 0xde;
1642 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1646 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1648 *(cd->mcodeptr++) = 0xd8;
1649 emit_membase(cd, (basereg),(disp),0);
1653 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1655 *(cd->mcodeptr++) = 0xdc;
1656 emit_membase(cd, (basereg),(disp),0);
1660 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1662 *(cd->mcodeptr++) = 0xd8;
1663 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1667 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1669 *(cd->mcodeptr++) = 0xdc;
1670 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1674 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1676 *(cd->mcodeptr++) = 0xde;
1677 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1681 void emit_fsubp(codegendata *cd)
1683 *(cd->mcodeptr++) = 0xde;
1684 *(cd->mcodeptr++) = 0xe9;
1688 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1690 *(cd->mcodeptr++) = 0xd8;
1691 emit_membase(cd, (basereg),(disp),4);
1695 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1697 *(cd->mcodeptr++) = 0xdc;
1698 emit_membase(cd, (basereg),(disp),4);
1702 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1704 *(cd->mcodeptr++) = 0xd8;
1705 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1709 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1711 *(cd->mcodeptr++) = 0xdc;
1712 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1716 void emit_fmulp(codegendata *cd)
1718 *(cd->mcodeptr++) = 0xde;
1719 *(cd->mcodeptr++) = 0xc9;
1723 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1725 *(cd->mcodeptr++) = 0xde;
1726 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1730 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1732 *(cd->mcodeptr++) = 0xd8;
1733 emit_membase(cd, (basereg),(disp),1);
1737 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1739 *(cd->mcodeptr++) = 0xdc;
1740 emit_membase(cd, (basereg),(disp),1);
1744 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1746 *(cd->mcodeptr++) = 0xd8;
1747 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1751 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1753 *(cd->mcodeptr++) = 0xdc;
1754 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1758 void emit_fdivp(codegendata *cd)
1760 *(cd->mcodeptr++) = 0xde;
1761 *(cd->mcodeptr++) = 0xf9;
1765 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1767 *(cd->mcodeptr++) = 0xde;
1768 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1772 void emit_fxch(codegendata *cd)
1774 *(cd->mcodeptr++) = 0xd9;
1775 *(cd->mcodeptr++) = 0xc9;
1779 void emit_fxch_reg(codegendata *cd, s4 reg)
1781 *(cd->mcodeptr++) = 0xd9;
1782 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1786 void emit_fprem(codegendata *cd)
1788 *(cd->mcodeptr++) = 0xd9;
1789 *(cd->mcodeptr++) = 0xf8;
1793 void emit_fprem1(codegendata *cd)
1795 *(cd->mcodeptr++) = 0xd9;
1796 *(cd->mcodeptr++) = 0xf5;
1800 void emit_fucom(codegendata *cd)
1802 *(cd->mcodeptr++) = 0xdd;
1803 *(cd->mcodeptr++) = 0xe1;
1807 void emit_fucom_reg(codegendata *cd, s4 reg)
1809 *(cd->mcodeptr++) = 0xdd;
1810 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1814 void emit_fucomp_reg(codegendata *cd, s4 reg)
1816 *(cd->mcodeptr++) = 0xdd;
1817 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1821 void emit_fucompp(codegendata *cd)
1823 *(cd->mcodeptr++) = 0xda;
1824 *(cd->mcodeptr++) = 0xe9;
1828 void emit_fnstsw(codegendata *cd)
1830 *(cd->mcodeptr++) = 0xdf;
1831 *(cd->mcodeptr++) = 0xe0;
1835 void emit_sahf(codegendata *cd)
1837 *(cd->mcodeptr++) = 0x9e;
1841 void emit_finit(codegendata *cd)
1843 *(cd->mcodeptr++) = 0x9b;
1844 *(cd->mcodeptr++) = 0xdb;
1845 *(cd->mcodeptr++) = 0xe3;
1849 void emit_fldcw_mem(codegendata *cd, s4 mem)
1851 *(cd->mcodeptr++) = 0xd9;
1856 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1858 *(cd->mcodeptr++) = 0xd9;
1859 emit_membase(cd, (basereg),(disp),5);
1863 void emit_wait(codegendata *cd)
1865 *(cd->mcodeptr++) = 0x9b;
1869 void emit_ffree_reg(codegendata *cd, s4 reg)
1871 *(cd->mcodeptr++) = 0xdd;
1872 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1876 void emit_fdecstp(codegendata *cd)
1878 *(cd->mcodeptr++) = 0xd9;
1879 *(cd->mcodeptr++) = 0xf6;
1883 void emit_fincstp(codegendata *cd)
1885 *(cd->mcodeptr++) = 0xd9;
1886 *(cd->mcodeptr++) = 0xf7;
1891 * These are local overrides for various environment variables in Emacs.
1892 * Please do not remove this and leave it at the end of the file, where
1893 * Emacs will automagically detect them.
1894 * ---------------------------------------------------------------------
1897 * indent-tabs-mode: t