1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 7514 2007-03-13 20:31:51Z twisti $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/dseg.h"
50 #include "vm/jit/emit-common.h"
51 #include "vm/jit/jit.h"
52 #include "vm/jit/replace.h"
54 #include "vmcore/options.h"
55 #include "vmcore/statistics.h"
58 /* emit_load ******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (IS_INMEMORY(src->flags)) {
77 disp = src->vv.regoff * 4;
82 M_ILD(tempreg, REG_SP, disp);
85 M_LLD(tempreg, REG_SP, disp);
88 M_FLD(tempreg, REG_SP, disp);
91 M_DLD(tempreg, REG_SP, disp);
94 vm_abort("emit_load: unknown type %d", src->type);
100 reg = src->vv.regoff;
106 /* emit_load_low ************************************************************
108 Emits a possible load of the low 32-bits of an operand.
110 *******************************************************************************/
112 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
118 assert(src->type == TYPE_LNG);
120 /* get required compiler data */
125 if (IS_INMEMORY(src->flags)) {
128 disp = src->vv.regoff * 4;
130 M_ILD(tempreg, REG_SP, disp);
135 reg = GET_LOW_REG(src->vv.regoff);
141 /* emit_load_high ***********************************************************
143 Emits a possible load of the high 32-bits of an operand.
145 *******************************************************************************/
147 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
153 /* get required compiler data */
155 assert(src->type == TYPE_LNG);
159 if (IS_INMEMORY(src->flags)) {
162 disp = src->vv.regoff * 4;
164 M_ILD(tempreg, REG_SP, disp + 4);
169 reg = GET_HIGH_REG(src->vv.regoff);
175 /* emit_store ******************************************************************
177 Emits a possible store of the destination operand.
179 *******************************************************************************/
181 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
186 /* get required compiler data */
190 if (IS_INMEMORY(dst->flags)) {
193 disp = dst->vv.regoff * 4;
198 M_IST(d, REG_SP, disp);
201 M_LST(d, REG_SP, disp);
204 M_FST(d, REG_SP, disp);
207 M_DST(d, REG_SP, disp);
210 vm_abort("emit_store: unknown type %d", dst->type);
216 /* emit_store_low **************************************************************
218 Emits a possible store of the low 32-bits of the destination
221 *******************************************************************************/
223 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
227 assert(dst->type == TYPE_LNG);
229 /* get required compiler data */
233 if (IS_INMEMORY(dst->flags)) {
235 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
240 /* emit_store_high *************************************************************
242 Emits a possible store of the high 32-bits of the destination
245 *******************************************************************************/
247 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
251 assert(dst->type == TYPE_LNG);
253 /* get required compiler data */
257 if (IS_INMEMORY(dst->flags)) {
259 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
264 /* emit_copy *******************************************************************
266 Generates a register/memory to register/memory copy.
268 *******************************************************************************/
270 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
275 /* get required compiler data */
279 if ((src->vv.regoff != dst->vv.regoff) ||
280 ((src->flags ^ dst->flags) & INMEMORY)) {
282 /* If one of the variables resides in memory, we can eliminate
283 the register move from/to the temporary register with the
284 order of getting the destination register and the load. */
286 if (IS_INMEMORY(src->flags)) {
287 if (IS_LNG_TYPE(src->type))
288 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
290 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
292 s1 = emit_load(jd, iptr, src, d);
295 if (IS_LNG_TYPE(src->type))
296 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
298 s1 = emit_load(jd, iptr, src, REG_ITMP1);
300 d = codegen_reg_of_var(iptr->opc, dst, s1);
317 vm_abort("emit_copy: unknown type %d", src->type);
321 emit_store(jd, iptr, dst, d);
326 /* emit_arithmetic_check *******************************************************
328 Emit an ArithmeticException check.
330 *******************************************************************************/
332 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
334 if (INSTRUCTION_MUST_CHECK(iptr)) {
337 codegen_add_arithmeticexception_ref(cd);
342 /* emit_arrayindexoutofbounds_check ********************************************
344 Emit a ArrayIndexOutOfBoundsException check.
346 *******************************************************************************/
348 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
350 if (INSTRUCTION_MUST_CHECK(iptr)) {
351 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
352 M_CMP(REG_ITMP3, s2);
354 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
359 /* emit_classcast_check ********************************************************
361 Emit a ClassCastException check.
363 *******************************************************************************/
365 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
367 vm_abort("IMPLEMENT ME!");
371 /* emit_nullpointer_check ******************************************************
373 Emit a NullPointerException check.
375 *******************************************************************************/
377 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
379 if (INSTRUCTION_MUST_CHECK(iptr)) {
382 codegen_add_nullpointerexception_ref(cd);
387 /* emit_exception_stubs ********************************************************
389 Generates the code for the exception stubs.
391 *******************************************************************************/
393 void emit_exception_stubs(jitdata *jd)
402 /* get required compiler data */
407 /* generate exception stubs */
411 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
412 /* back-patch the branch to this exception code */
414 branchmpc = er->branchpos;
415 targetmpc = cd->mcodeptr - cd->mcodebase;
417 md_codegen_patch_branch(cd, branchmpc, targetmpc);
421 /* Check if the exception is an
422 ArrayIndexOutOfBoundsException. If so, move index register
426 M_INTMOVE(er->reg, REG_ITMP1);
428 /* calcuate exception address */
430 M_MOV_IMM(0, REG_ITMP2_XPC);
432 M_AADD_IMM32(er->branchpos - 6, REG_ITMP2_XPC);
434 /* move function to call into REG_ITMP3 */
436 M_MOV_IMM(er->function, REG_ITMP3);
438 if (targetdisp == 0) {
439 targetdisp = cd->mcodeptr - cd->mcodebase;
441 M_ASUB_IMM(5 * 4, REG_SP);
443 /* first store REG_ITMP1 so we can use it */
445 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
447 M_AST_IMM(0, REG_SP, 0 * 4);
449 M_MOV(REG_SP, REG_ITMP1);
450 M_AADD_IMM(5 * 4, REG_ITMP1);
451 M_AST(REG_ITMP1, REG_SP, 1 * 4);
452 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
453 M_AST(REG_ITMP1, REG_SP, 2 * 4);
454 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
458 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
459 M_AADD_IMM(5 * 4, REG_SP);
461 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
465 M_JMP_IMM((cd->mcodebase + targetdisp) -
466 (cd->mcodeptr + PATCHER_CALL_SIZE));
472 /* emit_patcher_stubs **********************************************************
474 Generates the code for the patcher stubs.
476 *******************************************************************************/
478 void emit_patcher_stubs(jitdata *jd)
488 /* get required compiler data */
492 /* generate code patching stub call code */
496 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
497 /* check code segment size */
501 /* Get machine code which is patched back in later. A
502 `call rel32' is 5 bytes long. */
504 savedmcodeptr = cd->mcodebase + pref->branchpos;
505 mcode = *((u8 *) savedmcodeptr);
507 /* patch in `call rel32' to call the following code */
509 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
510 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
512 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
514 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
520 /* move pointer to java_objectheader onto stack */
522 #if defined(ENABLE_THREADS)
523 (void) dseg_add_unique_address(cd, NULL); /* flcword */
524 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
525 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
527 M_MOV_IMM(0, REG_ITMP3);
529 M_AADD_IMM(disp, REG_ITMP3);
535 /* move machine code bytes and classinfo pointer into registers */
537 M_PUSH_IMM(mcode >> 32);
539 M_PUSH_IMM(pref->ref);
540 M_PUSH_IMM(pref->patcher);
542 if (targetdisp == 0) {
543 targetdisp = cd->mcodeptr - cd->mcodebase;
545 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
549 M_JMP_IMM((cd->mcodebase + targetdisp) -
550 (cd->mcodeptr + PATCHER_CALL_SIZE));
556 /* emit_replacement_stubs ******************************************************
558 Generates the code for the replacement stubs.
560 *******************************************************************************/
562 #if defined(ENABLE_REPLACEMENT)
563 void emit_replacement_stubs(jitdata *jd)
573 /* get required compiler data */
578 rplp = code->rplpoints;
580 /* store beginning of replacement stubs */
582 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
584 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
585 /* do not generate stubs for non-trappable points */
587 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
590 /* check code segment size */
594 /* note start of stub code */
596 outcode = (s4) (cd->mcodeptr - cd->mcodebase);
598 /* push address of `rplpoint` struct */
602 /* jump to replacement function */
604 M_PUSH_IMM(asm_replacement_out);
607 /* add jump reference for COUNTDOWN points */
609 if (rplp->flags & RPLPOINT_FLAG_COUNTDOWN) {
611 branchmpc = (s4)rplp->pc + (7 + 6);
613 md_codegen_patch_branch(cd, branchmpc, (s4) outcode);
616 assert(((cd->mcodeptr - cd->mcodebase) - outcode) == REPLACEMENT_STUB_SIZE);
619 #endif /* defined(ENABLE_REPLACEMENT) */
622 /* emit_verbosecall_enter ******************************************************
624 Generates the code for the call trace.
626 *******************************************************************************/
629 void emit_verbosecall_enter(jitdata *jd)
638 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
641 /* get required compiler data */
649 /* mark trace code */
653 /* methodinfo* + arguments + return address */
655 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
656 cd->stackframesize * 4 + 4;
658 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
660 /* save temporary registers for leaf methods */
662 for (i = 0; i < INT_TMP_CNT; i++)
663 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
665 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
666 t = md->paramtypes[i].type;
668 if (IS_INT_LNG_TYPE(t)) {
669 if (IS_2_WORD_TYPE(t)) {
670 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
671 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
673 else if (IS_ADR_TYPE(t)) {
674 M_ALD(REG_ITMP1, REG_SP, disp);
675 M_AST(REG_ITMP1, REG_SP, i * 8);
676 M_IST_IMM(0, REG_SP, i * 8 + 4);
679 M_ILD(EAX, REG_SP, disp);
681 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
685 if (IS_2_WORD_TYPE(t)) {
686 M_DLD(REG_NULL, REG_SP, disp);
687 M_DST(REG_NULL, REG_SP, i * 8);
690 M_FLD(REG_NULL, REG_SP, disp);
691 M_FST(REG_NULL, REG_SP, i * 8);
692 M_IST_IMM(0, REG_SP, i * 8 + 4);
696 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
699 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
701 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
704 /* restore temporary registers for leaf methods */
706 for (i = 0; i < INT_TMP_CNT; i++)
707 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
709 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
711 /* mark trace code */
715 #endif /* !defined(NDEBUG) */
718 /* emit_verbosecall_exit *******************************************************
720 Generates the code for the call trace.
722 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
724 *******************************************************************************/
727 void emit_verbosecall_exit(jitdata *jd)
733 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
736 /* get required compiler data */
742 /* mark trace code */
746 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
748 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
750 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
751 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
753 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
755 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
758 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
760 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
762 /* mark trace code */
766 #endif /* !defined(NDEBUG) */
769 /* code generation functions **************************************************/
771 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
773 if (basereg == ESP) {
775 emit_address_byte(0, dreg, ESP);
776 emit_address_byte(0, ESP, ESP);
778 else if (IS_IMM8(disp)) {
779 emit_address_byte(1, dreg, ESP);
780 emit_address_byte(0, ESP, ESP);
784 emit_address_byte(2, dreg, ESP);
785 emit_address_byte(0, ESP, ESP);
789 else if ((disp == 0) && (basereg != EBP)) {
790 emit_address_byte(0, dreg, basereg);
792 else if (IS_IMM8(disp)) {
793 emit_address_byte(1, dreg, basereg);
797 emit_address_byte(2, dreg, basereg);
803 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
805 if (basereg == ESP) {
806 emit_address_byte(2, dreg, ESP);
807 emit_address_byte(0, ESP, ESP);
811 emit_address_byte(2, dreg, basereg);
817 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
820 emit_address_byte(0, reg, 4);
821 emit_address_byte(scale, indexreg, 5);
824 else if ((disp == 0) && (basereg != EBP)) {
825 emit_address_byte(0, reg, 4);
826 emit_address_byte(scale, indexreg, basereg);
828 else if (IS_IMM8(disp)) {
829 emit_address_byte(1, reg, 4);
830 emit_address_byte(scale, indexreg, basereg);
834 emit_address_byte(2, reg, 4);
835 emit_address_byte(scale, indexreg, basereg);
841 /* low-level code emitter functions *******************************************/
843 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
845 COUNT(count_mov_reg_reg);
846 *(cd->mcodeptr++) = 0x89;
847 emit_reg((reg),(dreg));
851 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
853 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
858 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
860 *(cd->mcodeptr++) = 0xc6;
866 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
868 COUNT(count_mov_mem_reg);
869 *(cd->mcodeptr++) = 0x8b;
870 emit_membase(cd, (basereg),(disp),(reg));
875 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
876 * constant membase immediate length of 32bit
878 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
880 COUNT(count_mov_mem_reg);
881 *(cd->mcodeptr++) = 0x8b;
882 emit_membase32(cd, (basereg),(disp),(reg));
886 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
888 COUNT(count_mov_reg_mem);
889 *(cd->mcodeptr++) = 0x89;
890 emit_membase(cd, (basereg),(disp),(reg));
894 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
896 COUNT(count_mov_reg_mem);
897 *(cd->mcodeptr++) = 0x89;
898 emit_membase32(cd, (basereg),(disp),(reg));
902 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
904 COUNT(count_mov_mem_reg);
905 *(cd->mcodeptr++) = 0x8b;
906 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
910 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
912 COUNT(count_mov_reg_mem);
913 *(cd->mcodeptr++) = 0x89;
914 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
918 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
920 COUNT(count_mov_reg_mem);
921 *(cd->mcodeptr++) = 0x66;
922 *(cd->mcodeptr++) = 0x89;
923 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
927 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
929 COUNT(count_mov_reg_mem);
930 *(cd->mcodeptr++) = 0x88;
931 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
935 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
937 COUNT(count_mov_reg_mem);
938 *(cd->mcodeptr++) = 0x89;
939 emit_mem((reg),(mem));
943 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
945 COUNT(count_mov_mem_reg);
946 *(cd->mcodeptr++) = 0x8b;
947 emit_mem((dreg),(mem));
951 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
953 *(cd->mcodeptr++) = 0xc7;
959 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
961 *(cd->mcodeptr++) = 0xc7;
962 emit_membase(cd, (basereg),(disp),0);
967 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
969 *(cd->mcodeptr++) = 0xc7;
970 emit_membase32(cd, (basereg),(disp),0);
975 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
977 *(cd->mcodeptr++) = 0xc6;
978 emit_membase(cd, (basereg),(disp),0);
983 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
985 COUNT(count_mov_mem_reg);
986 *(cd->mcodeptr++) = 0x0f;
987 *(cd->mcodeptr++) = 0xbe;
988 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
992 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
994 *(cd->mcodeptr++) = 0x0f;
995 *(cd->mcodeptr++) = 0xbf;
1000 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1002 COUNT(count_mov_mem_reg);
1003 *(cd->mcodeptr++) = 0x0f;
1004 *(cd->mcodeptr++) = 0xbf;
1005 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1009 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1011 *(cd->mcodeptr++) = 0x0f;
1012 *(cd->mcodeptr++) = 0xb7;
1017 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1019 COUNT(count_mov_mem_reg);
1020 *(cd->mcodeptr++) = 0x0f;
1021 *(cd->mcodeptr++) = 0xb7;
1022 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1026 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1028 *(cd->mcodeptr++) = 0xc7;
1029 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1034 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1036 *(cd->mcodeptr++) = 0x66;
1037 *(cd->mcodeptr++) = 0xc7;
1038 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1043 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1045 *(cd->mcodeptr++) = 0xc6;
1046 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1054 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1056 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1057 emit_reg((reg),(dreg));
1061 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1063 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1064 emit_membase(cd, (basereg),(disp),(reg));
1068 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1070 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1071 emit_membase(cd, (basereg),(disp),(reg));
1075 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1078 *(cd->mcodeptr++) = 0x83;
1079 emit_reg((opc),(dreg));
1082 *(cd->mcodeptr++) = 0x81;
1083 emit_reg((opc),(dreg));
1089 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1091 *(cd->mcodeptr++) = 0x81;
1092 emit_reg((opc),(dreg));
1097 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1100 *(cd->mcodeptr++) = 0x83;
1101 emit_membase(cd, (basereg),(disp),(opc));
1104 *(cd->mcodeptr++) = 0x81;
1105 emit_membase(cd, (basereg),(disp),(opc));
1111 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1114 *(cd->mcodeptr++) = 0x83;
1115 emit_mem(opc, disp);
1118 *(cd->mcodeptr++) = 0x81;
1119 emit_mem(opc, disp);
1125 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1127 *(cd->mcodeptr++) = 0x85;
1128 emit_reg((reg),(dreg));
1132 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1134 *(cd->mcodeptr++) = 0xf7;
1142 * inc, dec operations
1144 void emit_dec_mem(codegendata *cd, s4 mem)
1146 *(cd->mcodeptr++) = 0xff;
1151 void emit_cltd(codegendata *cd)
1153 *(cd->mcodeptr++) = 0x99;
1157 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1159 *(cd->mcodeptr++) = 0x0f;
1160 *(cd->mcodeptr++) = 0xaf;
1161 emit_reg((dreg),(reg));
1165 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1167 *(cd->mcodeptr++) = 0x0f;
1168 *(cd->mcodeptr++) = 0xaf;
1169 emit_membase(cd, (basereg),(disp),(dreg));
1173 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1175 if (IS_IMM8((imm))) {
1176 *(cd->mcodeptr++) = 0x6b;
1180 *(cd->mcodeptr++) = 0x69;
1187 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1189 if (IS_IMM8((imm))) {
1190 *(cd->mcodeptr++) = 0x6b;
1191 emit_reg((dreg),(reg));
1194 *(cd->mcodeptr++) = 0x69;
1195 emit_reg((dreg),(reg));
1201 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1203 if (IS_IMM8((imm))) {
1204 *(cd->mcodeptr++) = 0x6b;
1205 emit_membase(cd, (basereg),(disp),(dreg));
1208 *(cd->mcodeptr++) = 0x69;
1209 emit_membase(cd, (basereg),(disp),(dreg));
1215 void emit_mul_reg(codegendata *cd, s4 reg)
1217 *(cd->mcodeptr++) = 0xf7;
1222 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1224 *(cd->mcodeptr++) = 0xf7;
1225 emit_membase(cd, (basereg),(disp),4);
1229 void emit_idiv_reg(codegendata *cd, s4 reg)
1231 *(cd->mcodeptr++) = 0xf7;
1236 void emit_ret(codegendata *cd)
1238 *(cd->mcodeptr++) = 0xc3;
1246 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1248 *(cd->mcodeptr++) = 0xd3;
1249 emit_reg((opc),(reg));
1253 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1256 *(cd->mcodeptr++) = 0xd1;
1257 emit_reg((opc),(dreg));
1259 *(cd->mcodeptr++) = 0xc1;
1260 emit_reg((opc),(dreg));
1266 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1268 *(cd->mcodeptr++) = 0x0f;
1269 *(cd->mcodeptr++) = 0xa5;
1270 emit_reg((reg),(dreg));
1274 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1276 *(cd->mcodeptr++) = 0x0f;
1277 *(cd->mcodeptr++) = 0xa4;
1278 emit_reg((reg),(dreg));
1283 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1285 *(cd->mcodeptr++) = 0x0f;
1286 *(cd->mcodeptr++) = 0xa5;
1287 emit_membase(cd, (basereg),(disp),(reg));
1291 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1293 *(cd->mcodeptr++) = 0x0f;
1294 *(cd->mcodeptr++) = 0xad;
1295 emit_reg((reg),(dreg));
1299 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1301 *(cd->mcodeptr++) = 0x0f;
1302 *(cd->mcodeptr++) = 0xac;
1303 emit_reg((reg),(dreg));
1308 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1310 *(cd->mcodeptr++) = 0x0f;
1311 *(cd->mcodeptr++) = 0xad;
1312 emit_membase(cd, (basereg),(disp),(reg));
1320 void emit_jmp_imm(codegendata *cd, s4 imm)
1322 *(cd->mcodeptr++) = 0xe9;
1327 void emit_jmp_reg(codegendata *cd, s4 reg)
1329 *(cd->mcodeptr++) = 0xff;
1334 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1336 *(cd->mcodeptr++) = 0x0f;
1337 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1344 * conditional set operations
1346 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1348 *(cd->mcodeptr++) = 0x0f;
1349 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1354 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1356 *(cd->mcodeptr++) = 0x0f;
1357 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1358 emit_membase(cd, (basereg),(disp),0);
1362 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1364 *(cd->mcodeptr++) = 0x0f;
1365 *(cd->mcodeptr++) = 0xc1;
1366 emit_mem((reg),(mem));
1370 void emit_neg_reg(codegendata *cd, s4 reg)
1372 *(cd->mcodeptr++) = 0xf7;
1378 void emit_push_imm(codegendata *cd, s4 imm)
1380 *(cd->mcodeptr++) = 0x68;
1385 void emit_pop_reg(codegendata *cd, s4 reg)
1387 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1391 void emit_push_reg(codegendata *cd, s4 reg)
1393 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1397 void emit_nop(codegendata *cd)
1399 *(cd->mcodeptr++) = 0x90;
1403 void emit_lock(codegendata *cd)
1405 *(cd->mcodeptr++) = 0xf0;
1412 void emit_call_reg(codegendata *cd, s4 reg)
1414 *(cd->mcodeptr++) = 0xff;
1419 void emit_call_imm(codegendata *cd, s4 imm)
1421 *(cd->mcodeptr++) = 0xe8;
1428 * floating point instructions
1430 void emit_fld1(codegendata *cd)
1432 *(cd->mcodeptr++) = 0xd9;
1433 *(cd->mcodeptr++) = 0xe8;
1437 void emit_fldz(codegendata *cd)
1439 *(cd->mcodeptr++) = 0xd9;
1440 *(cd->mcodeptr++) = 0xee;
1444 void emit_fld_reg(codegendata *cd, s4 reg)
1446 *(cd->mcodeptr++) = 0xd9;
1447 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1451 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1453 *(cd->mcodeptr++) = 0xd9;
1454 emit_membase(cd, (basereg),(disp),0);
1458 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1460 *(cd->mcodeptr++) = 0xd9;
1461 emit_membase32(cd, (basereg),(disp),0);
1465 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1467 *(cd->mcodeptr++) = 0xdd;
1468 emit_membase(cd, (basereg),(disp),0);
1472 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1474 *(cd->mcodeptr++) = 0xdd;
1475 emit_membase32(cd, (basereg),(disp),0);
1479 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1481 *(cd->mcodeptr++) = 0xdb;
1482 emit_membase(cd, (basereg),(disp),5);
1486 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1488 *(cd->mcodeptr++) = 0xd9;
1489 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1493 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1495 *(cd->mcodeptr++) = 0xdd;
1496 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1500 void emit_flds_mem(codegendata *cd, s4 mem)
1502 *(cd->mcodeptr++) = 0xd9;
1507 void emit_fldl_mem(codegendata *cd, s4 mem)
1509 *(cd->mcodeptr++) = 0xdd;
1514 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1516 *(cd->mcodeptr++) = 0xdb;
1517 emit_membase(cd, (basereg),(disp),0);
1521 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1523 *(cd->mcodeptr++) = 0xdf;
1524 emit_membase(cd, (basereg),(disp),5);
1528 void emit_fst_reg(codegendata *cd, s4 reg)
1530 *(cd->mcodeptr++) = 0xdd;
1531 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1535 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1537 *(cd->mcodeptr++) = 0xd9;
1538 emit_membase(cd, (basereg),(disp),2);
1542 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1544 *(cd->mcodeptr++) = 0xdd;
1545 emit_membase(cd, (basereg),(disp),2);
1549 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1551 *(cd->mcodeptr++) = 0xd9;
1552 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1556 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1558 *(cd->mcodeptr++) = 0xdd;
1559 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1563 void emit_fstp_reg(codegendata *cd, s4 reg)
1565 *(cd->mcodeptr++) = 0xdd;
1566 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1570 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1572 *(cd->mcodeptr++) = 0xd9;
1573 emit_membase(cd, (basereg),(disp),3);
1577 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1579 *(cd->mcodeptr++) = 0xd9;
1580 emit_membase32(cd, (basereg),(disp),3);
1584 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1586 *(cd->mcodeptr++) = 0xdd;
1587 emit_membase(cd, (basereg),(disp),3);
1591 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1593 *(cd->mcodeptr++) = 0xdd;
1594 emit_membase32(cd, (basereg),(disp),3);
1598 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1600 *(cd->mcodeptr++) = 0xdb;
1601 emit_membase(cd, (basereg),(disp),7);
1605 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1607 *(cd->mcodeptr++) = 0xd9;
1608 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1612 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1614 *(cd->mcodeptr++) = 0xdd;
1615 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1619 void emit_fstps_mem(codegendata *cd, s4 mem)
1621 *(cd->mcodeptr++) = 0xd9;
1626 void emit_fstpl_mem(codegendata *cd, s4 mem)
1628 *(cd->mcodeptr++) = 0xdd;
1633 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1635 *(cd->mcodeptr++) = 0xdb;
1636 emit_membase(cd, (basereg),(disp),2);
1640 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1642 *(cd->mcodeptr++) = 0xdb;
1643 emit_membase(cd, (basereg),(disp),3);
1647 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1649 *(cd->mcodeptr++) = 0xdf;
1650 emit_membase(cd, (basereg),(disp),7);
1654 void emit_fchs(codegendata *cd)
1656 *(cd->mcodeptr++) = 0xd9;
1657 *(cd->mcodeptr++) = 0xe0;
1661 void emit_faddp(codegendata *cd)
1663 *(cd->mcodeptr++) = 0xde;
1664 *(cd->mcodeptr++) = 0xc1;
1668 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1670 *(cd->mcodeptr++) = 0xd8;
1671 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1675 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1677 *(cd->mcodeptr++) = 0xdc;
1678 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1682 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1684 *(cd->mcodeptr++) = 0xde;
1685 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1689 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1691 *(cd->mcodeptr++) = 0xd8;
1692 emit_membase(cd, (basereg),(disp),0);
1696 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1698 *(cd->mcodeptr++) = 0xdc;
1699 emit_membase(cd, (basereg),(disp),0);
1703 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1705 *(cd->mcodeptr++) = 0xd8;
1706 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1710 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1712 *(cd->mcodeptr++) = 0xdc;
1713 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1717 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1719 *(cd->mcodeptr++) = 0xde;
1720 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1724 void emit_fsubp(codegendata *cd)
1726 *(cd->mcodeptr++) = 0xde;
1727 *(cd->mcodeptr++) = 0xe9;
1731 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1733 *(cd->mcodeptr++) = 0xd8;
1734 emit_membase(cd, (basereg),(disp),4);
1738 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1740 *(cd->mcodeptr++) = 0xdc;
1741 emit_membase(cd, (basereg),(disp),4);
1745 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1747 *(cd->mcodeptr++) = 0xd8;
1748 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1752 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1754 *(cd->mcodeptr++) = 0xdc;
1755 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1759 void emit_fmulp(codegendata *cd)
1761 *(cd->mcodeptr++) = 0xde;
1762 *(cd->mcodeptr++) = 0xc9;
1766 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1768 *(cd->mcodeptr++) = 0xde;
1769 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1773 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1775 *(cd->mcodeptr++) = 0xd8;
1776 emit_membase(cd, (basereg),(disp),1);
1780 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1782 *(cd->mcodeptr++) = 0xdc;
1783 emit_membase(cd, (basereg),(disp),1);
1787 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1789 *(cd->mcodeptr++) = 0xd8;
1790 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1794 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1796 *(cd->mcodeptr++) = 0xdc;
1797 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1801 void emit_fdivp(codegendata *cd)
1803 *(cd->mcodeptr++) = 0xde;
1804 *(cd->mcodeptr++) = 0xf9;
1808 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1810 *(cd->mcodeptr++) = 0xde;
1811 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1815 void emit_fxch(codegendata *cd)
1817 *(cd->mcodeptr++) = 0xd9;
1818 *(cd->mcodeptr++) = 0xc9;
1822 void emit_fxch_reg(codegendata *cd, s4 reg)
1824 *(cd->mcodeptr++) = 0xd9;
1825 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1829 void emit_fprem(codegendata *cd)
1831 *(cd->mcodeptr++) = 0xd9;
1832 *(cd->mcodeptr++) = 0xf8;
1836 void emit_fprem1(codegendata *cd)
1838 *(cd->mcodeptr++) = 0xd9;
1839 *(cd->mcodeptr++) = 0xf5;
1843 void emit_fucom(codegendata *cd)
1845 *(cd->mcodeptr++) = 0xdd;
1846 *(cd->mcodeptr++) = 0xe1;
1850 void emit_fucom_reg(codegendata *cd, s4 reg)
1852 *(cd->mcodeptr++) = 0xdd;
1853 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1857 void emit_fucomp_reg(codegendata *cd, s4 reg)
1859 *(cd->mcodeptr++) = 0xdd;
1860 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1864 void emit_fucompp(codegendata *cd)
1866 *(cd->mcodeptr++) = 0xda;
1867 *(cd->mcodeptr++) = 0xe9;
1871 void emit_fnstsw(codegendata *cd)
1873 *(cd->mcodeptr++) = 0xdf;
1874 *(cd->mcodeptr++) = 0xe0;
1878 void emit_sahf(codegendata *cd)
1880 *(cd->mcodeptr++) = 0x9e;
1884 void emit_finit(codegendata *cd)
1886 *(cd->mcodeptr++) = 0x9b;
1887 *(cd->mcodeptr++) = 0xdb;
1888 *(cd->mcodeptr++) = 0xe3;
1892 void emit_fldcw_mem(codegendata *cd, s4 mem)
1894 *(cd->mcodeptr++) = 0xd9;
1899 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1901 *(cd->mcodeptr++) = 0xd9;
1902 emit_membase(cd, (basereg),(disp),5);
1906 void emit_wait(codegendata *cd)
1908 *(cd->mcodeptr++) = 0x9b;
1912 void emit_ffree_reg(codegendata *cd, s4 reg)
1914 *(cd->mcodeptr++) = 0xdd;
1915 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1919 void emit_fdecstp(codegendata *cd)
1921 *(cd->mcodeptr++) = 0xd9;
1922 *(cd->mcodeptr++) = 0xf6;
1926 void emit_fincstp(codegendata *cd)
1928 *(cd->mcodeptr++) = 0xd9;
1929 *(cd->mcodeptr++) = 0xf7;
1934 * These are local overrides for various environment variables in Emacs.
1935 * Please do not remove this and leave it at the end of the file, where
1936 * Emacs will automagically detect them.
1937 * ---------------------------------------------------------------------
1940 * indent-tabs-mode: t