1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "vm/jit/i386/codegen.h"
33 #include "vm/jit/i386/emit.h"
34 #include "vm/jit/i386/md-abi.h"
36 #include "mm/memory.h"
38 #include "threads/lock-common.h"
40 #include "vm/exceptions.h"
42 #include "vm/jit/abi.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/dseg.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/trace.h"
50 #include "vm/jit/trap.h"
52 #include "vmcore/options.h"
53 #include "vmcore/statistics.h"
56 /* emit_load ******************************************************************
58 Emits a possible load of an operand.
60 *******************************************************************************/
62 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
68 /* get required compiler data */
72 if (IS_INMEMORY(src->flags)) {
75 disp = src->vv.regoff;
80 M_ILD(tempreg, REG_SP, disp);
83 M_LLD(tempreg, REG_SP, disp);
86 M_FLD(tempreg, REG_SP, disp);
89 M_DLD(tempreg, REG_SP, disp);
92 vm_abort("emit_load: unknown type %d", src->type);
104 /* emit_load_low ************************************************************
106 Emits a possible load of the low 32-bits of an operand.
108 *******************************************************************************/
110 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
116 assert(src->type == TYPE_LNG);
118 /* get required compiler data */
123 if (IS_INMEMORY(src->flags)) {
126 disp = src->vv.regoff;
128 M_ILD(tempreg, REG_SP, disp);
133 reg = GET_LOW_REG(src->vv.regoff);
139 /* emit_load_high ***********************************************************
141 Emits a possible load of the high 32-bits of an operand.
143 *******************************************************************************/
145 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
151 /* get required compiler data */
153 assert(src->type == TYPE_LNG);
157 if (IS_INMEMORY(src->flags)) {
160 disp = src->vv.regoff;
162 M_ILD(tempreg, REG_SP, disp + 4);
167 reg = GET_HIGH_REG(src->vv.regoff);
173 /* emit_store ******************************************************************
175 Emits a possible store of the destination operand.
177 *******************************************************************************/
179 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
184 /* get required compiler data */
188 if (IS_INMEMORY(dst->flags)) {
191 disp = dst->vv.regoff;
196 M_IST(d, REG_SP, disp);
199 M_LST(d, REG_SP, disp);
202 M_FST(d, REG_SP, disp);
205 M_DST(d, REG_SP, disp);
208 vm_abort("emit_store: unknown type %d", dst->type);
214 /* emit_store_low **************************************************************
216 Emits a possible store of the low 32-bits of the destination
219 *******************************************************************************/
221 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
225 assert(dst->type == TYPE_LNG);
227 /* get required compiler data */
231 if (IS_INMEMORY(dst->flags)) {
233 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
238 /* emit_store_high *************************************************************
240 Emits a possible store of the high 32-bits of the destination
243 *******************************************************************************/
245 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
249 assert(dst->type == TYPE_LNG);
251 /* get required compiler data */
255 if (IS_INMEMORY(dst->flags)) {
257 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
262 /* emit_copy *******************************************************************
264 Generates a register/memory to register/memory copy.
266 *******************************************************************************/
268 void emit_copy(jitdata *jd, instruction *iptr)
275 /* get required compiler data */
279 /* get source and destination variables */
281 src = VAROP(iptr->s1);
282 dst = VAROP(iptr->dst);
284 if ((src->vv.regoff != dst->vv.regoff) ||
285 ((src->flags ^ dst->flags) & INMEMORY)) {
287 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
288 /* emit nothing, as the value won't be used anyway */
292 /* If one of the variables resides in memory, we can eliminate
293 the register move from/to the temporary register with the
294 order of getting the destination register and the load. */
296 if (IS_INMEMORY(src->flags)) {
297 if (IS_LNG_TYPE(src->type))
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 if (IS_LNG_TYPE(src->type))
306 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
308 s1 = emit_load(jd, iptr, src, REG_ITMP1);
310 d = codegen_reg_of_var(iptr->opc, dst, s1);
327 vm_abort("emit_copy: unknown type %d", src->type);
331 emit_store(jd, iptr, dst, d);
336 /* emit_branch *****************************************************************
338 Emits the code for conditional and unconditional branchs.
340 *******************************************************************************/
342 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
346 /* ATTENTION: a displacement overflow cannot happen */
348 /* check which branch to generate */
350 if (condition == BRANCH_UNCONDITIONAL) {
352 /* calculate the different displacements */
354 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
356 M_JMP_IMM(branchdisp);
359 /* calculate the different displacements */
361 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
395 vm_abort("emit_branch: unknown condition %d", condition);
401 /* emit_arithmetic_check *******************************************************
403 Emit an ArithmeticException check.
405 *******************************************************************************/
407 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
409 if (INSTRUCTION_MUST_CHECK(iptr)) {
412 M_ALD_MEM(reg, TRAP_ArithmeticException);
417 /* emit_arrayindexoutofbounds_check ********************************************
419 Emit a ArrayIndexOutOfBoundsException check.
421 *******************************************************************************/
423 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
425 if (INSTRUCTION_MUST_CHECK(iptr)) {
426 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
427 M_CMP(REG_ITMP3, s2);
429 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
434 /* emit_arraystore_check *******************************************************
436 Emit an ArrayStoreException check.
438 *******************************************************************************/
440 void emit_arraystore_check(codegendata *cd, instruction *iptr)
442 if (INSTRUCTION_MUST_CHECK(iptr)) {
445 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
450 /* emit_classcast_check ********************************************************
452 Emit a ClassCastException check.
454 *******************************************************************************/
456 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
458 if (INSTRUCTION_MUST_CHECK(iptr)) {
470 vm_abort("emit_classcast_check: unknown condition %d", condition);
472 M_ALD_MEM(s1, TRAP_ClassCastException);
477 /* emit_nullpointer_check ******************************************************
479 Emit a NullPointerException check.
481 *******************************************************************************/
483 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
485 if (INSTRUCTION_MUST_CHECK(iptr)) {
488 M_ALD_MEM(reg, TRAP_NullPointerException);
493 /* emit_exception_check ********************************************************
495 Emit an Exception check.
497 *******************************************************************************/
499 void emit_exception_check(codegendata *cd, instruction *iptr)
501 if (INSTRUCTION_MUST_CHECK(iptr)) {
504 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
509 /* emit_trap_compiler **********************************************************
511 Emit a trap instruction which calls the JIT compiler.
513 *******************************************************************************/
515 void emit_trap_compiler(codegendata *cd)
517 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
520 /* emit_trap_countdown *********************************************************
522 Emit a countdown trap.
524 counter....absolute address of the counter variable
526 *******************************************************************************/
528 void emit_trap_countdown(codegendata *cd, s4 *counter)
530 M_ISUB_IMM_MEMABS(1, (s4) counter);
532 M_ALD_MEM(REG_METHODPTR, TRAP_COUNTDOWN);
535 /* emit_trap *******************************************************************
537 Emit a trap instruction and return the original machine code.
539 *******************************************************************************/
541 uint32_t emit_trap(codegendata *cd)
545 /* Get machine code which is patched back in later. The
546 trap is 2 bytes long. */
548 mcode = *((uint16_t *) cd->mcodeptr);
551 /* XXX this breaks GDB, so we disable it for now */
552 *(cd->mcodeptr++) = 0xcc;
558 return (uint32_t) mcode;
562 /* emit_verbosecall_enter ******************************************************
564 Generates the code for the call trace.
566 *******************************************************************************/
569 void emit_verbosecall_enter(jitdata *jd)
576 int32_t stackframesize;
578 int align_off; /* offset for alignment compensation */
580 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
583 /* get required compiler data */
592 /* mark trace code */
596 /* keep stack 16-byte aligned */
598 stackframesize = 2 + TMP_CNT;
599 ALIGN_2(stackframesize);
601 M_ASUB_IMM(stackframesize * 8, REG_SP);
603 /* save temporary registers for leaf methods */
605 if (code_is_leafmethod(code)) {
606 for (i = 0; i < INT_TMP_CNT; i++)
607 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
610 /* no argument registers to save */
612 align_off = cd->stackframesize ? 4 : 0;
613 M_AST_IMM(m, REG_SP, 0 * 4);
614 M_AST_IMM(0, REG_SP, 1 * 4);
615 M_AST(REG_SP, REG_SP, 2 * 4);
616 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
617 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
620 /* no argument registers to restore */
622 /* restore temporary registers for leaf methods */
624 if (code_is_leafmethod(code)) {
625 for (i = 0; i < INT_TMP_CNT; i++)
626 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
629 M_AADD_IMM(stackframesize * 8, REG_SP);
631 /* mark trace code */
635 #endif /* !defined(NDEBUG) */
638 /* emit_verbosecall_exit *******************************************************
640 Generates the code for the call trace.
642 *******************************************************************************/
645 void emit_verbosecall_exit(jitdata *jd)
652 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
655 /* get required compiler data */
663 /* mark trace code */
667 /* keep stack 16-byte aligned */
669 M_ASUB_IMM(4 + 4 + 8, REG_SP);
671 /* save return value */
673 switch (md->returntype.type) {
676 M_IST(REG_RESULT, REG_SP, 2 * 4);
679 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
682 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
685 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
689 M_AST_IMM(m, REG_SP, 0 * 4);
690 M_AST(REG_SP, REG_SP, 1 * 4);
691 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
692 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
695 /* restore return value */
697 switch (md->returntype.type) {
700 M_ILD(REG_RESULT, REG_SP, 2 * 4);
703 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
707 M_AADD_IMM(4 + 4 + 8, REG_SP);
709 /* mark trace code */
713 #endif /* !defined(NDEBUG) */
716 /* code generation functions **************************************************/
718 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
720 if (basereg == ESP) {
722 emit_address_byte(0, dreg, ESP);
723 emit_address_byte(0, ESP, ESP);
725 else if (IS_IMM8(disp)) {
726 emit_address_byte(1, dreg, ESP);
727 emit_address_byte(0, ESP, ESP);
731 emit_address_byte(2, dreg, ESP);
732 emit_address_byte(0, ESP, ESP);
736 else if ((disp == 0) && (basereg != EBP)) {
737 emit_address_byte(0, dreg, basereg);
739 else if (IS_IMM8(disp)) {
740 emit_address_byte(1, dreg, basereg);
744 emit_address_byte(2, dreg, basereg);
750 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
752 if (basereg == ESP) {
753 emit_address_byte(2, dreg, ESP);
754 emit_address_byte(0, ESP, ESP);
758 emit_address_byte(2, dreg, basereg);
764 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
767 emit_address_byte(0, reg, 4);
768 emit_address_byte(scale, indexreg, 5);
771 else if ((disp == 0) && (basereg != EBP)) {
772 emit_address_byte(0, reg, 4);
773 emit_address_byte(scale, indexreg, basereg);
775 else if (IS_IMM8(disp)) {
776 emit_address_byte(1, reg, 4);
777 emit_address_byte(scale, indexreg, basereg);
781 emit_address_byte(2, reg, 4);
782 emit_address_byte(scale, indexreg, basereg);
788 /* low-level code emitter functions *******************************************/
790 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
792 COUNT(count_mov_reg_reg);
793 *(cd->mcodeptr++) = 0x89;
794 emit_reg((reg),(dreg));
798 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
800 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
805 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
807 *(cd->mcodeptr++) = 0xc6;
813 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
815 COUNT(count_mov_mem_reg);
816 *(cd->mcodeptr++) = 0x8b;
817 emit_membase(cd, (basereg),(disp),(reg));
822 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
823 * constant membase immediate length of 32bit
825 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
827 COUNT(count_mov_mem_reg);
828 *(cd->mcodeptr++) = 0x8b;
829 emit_membase32(cd, (basereg),(disp),(reg));
833 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
835 COUNT(count_mov_reg_mem);
836 *(cd->mcodeptr++) = 0x89;
837 emit_membase(cd, (basereg),(disp),(reg));
841 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
843 COUNT(count_mov_reg_mem);
844 *(cd->mcodeptr++) = 0x89;
845 emit_membase32(cd, (basereg),(disp),(reg));
849 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
851 COUNT(count_mov_mem_reg);
852 *(cd->mcodeptr++) = 0x8b;
853 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
857 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
859 COUNT(count_mov_reg_mem);
860 *(cd->mcodeptr++) = 0x89;
861 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
865 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
867 COUNT(count_mov_reg_mem);
868 *(cd->mcodeptr++) = 0x66;
869 *(cd->mcodeptr++) = 0x89;
870 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
874 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
876 COUNT(count_mov_reg_mem);
877 *(cd->mcodeptr++) = 0x88;
878 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
882 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
884 COUNT(count_mov_reg_mem);
885 *(cd->mcodeptr++) = 0x89;
886 emit_mem((reg),(mem));
890 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
892 COUNT(count_mov_mem_reg);
893 *(cd->mcodeptr++) = 0x8b;
894 emit_mem((dreg),(mem));
898 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
900 *(cd->mcodeptr++) = 0xc7;
906 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
908 *(cd->mcodeptr++) = 0xc7;
909 emit_membase(cd, (basereg),(disp),0);
914 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
916 *(cd->mcodeptr++) = 0xc7;
917 emit_membase32(cd, (basereg),(disp),0);
922 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
924 *(cd->mcodeptr++) = 0xc6;
925 emit_membase(cd, (basereg),(disp),0);
930 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
932 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
933 *(cd->mcodeptr++) = 0x0f;
934 *(cd->mcodeptr++) = 0xbe;
939 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
941 COUNT(count_mov_mem_reg);
942 *(cd->mcodeptr++) = 0x0f;
943 *(cd->mcodeptr++) = 0xbe;
944 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
948 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
950 *(cd->mcodeptr++) = 0x0f;
951 *(cd->mcodeptr++) = 0xbf;
956 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
958 COUNT(count_mov_mem_reg);
959 *(cd->mcodeptr++) = 0x0f;
960 *(cd->mcodeptr++) = 0xbf;
961 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
965 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
967 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
968 *(cd->mcodeptr++) = 0x0f;
969 *(cd->mcodeptr++) = 0xb6;
974 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
976 *(cd->mcodeptr++) = 0x0f;
977 *(cd->mcodeptr++) = 0xb7;
982 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
984 COUNT(count_mov_mem_reg);
985 *(cd->mcodeptr++) = 0x0f;
986 *(cd->mcodeptr++) = 0xb7;
987 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
991 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
993 *(cd->mcodeptr++) = 0xc7;
994 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
999 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1001 *(cd->mcodeptr++) = 0x66;
1002 *(cd->mcodeptr++) = 0xc7;
1003 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1008 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1010 *(cd->mcodeptr++) = 0xc6;
1011 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1019 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1021 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1022 emit_reg((reg),(dreg));
1026 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1028 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1029 emit_membase(cd, (basereg),(disp),(reg));
1033 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1035 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1036 emit_membase(cd, (basereg),(disp),(reg));
1040 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1043 *(cd->mcodeptr++) = 0x83;
1044 emit_reg((opc),(dreg));
1047 *(cd->mcodeptr++) = 0x81;
1048 emit_reg((opc),(dreg));
1054 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1056 *(cd->mcodeptr++) = 0x81;
1057 emit_reg((opc),(dreg));
1062 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1065 *(cd->mcodeptr++) = 0x83;
1066 emit_membase(cd, (basereg),(disp),(opc));
1069 *(cd->mcodeptr++) = 0x81;
1070 emit_membase(cd, (basereg),(disp),(opc));
1076 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1079 *(cd->mcodeptr++) = 0x83;
1080 emit_mem(opc, disp);
1083 *(cd->mcodeptr++) = 0x81;
1084 emit_mem(opc, disp);
1090 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1092 *(cd->mcodeptr++) = 0x85;
1093 emit_reg((reg),(dreg));
1097 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1099 *(cd->mcodeptr++) = 0xf7;
1107 * inc, dec operations
1109 void emit_dec_mem(codegendata *cd, s4 mem)
1111 *(cd->mcodeptr++) = 0xff;
1116 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1118 *(cd->mcodeptr++) = 0x0f;
1119 *(cd->mcodeptr++) = 0xaf;
1120 emit_reg((dreg),(reg));
1124 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1126 *(cd->mcodeptr++) = 0x0f;
1127 *(cd->mcodeptr++) = 0xaf;
1128 emit_membase(cd, (basereg),(disp),(dreg));
1132 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1134 if (IS_IMM8((imm))) {
1135 *(cd->mcodeptr++) = 0x6b;
1139 *(cd->mcodeptr++) = 0x69;
1146 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1148 if (IS_IMM8((imm))) {
1149 *(cd->mcodeptr++) = 0x6b;
1150 emit_reg((dreg),(reg));
1153 *(cd->mcodeptr++) = 0x69;
1154 emit_reg((dreg),(reg));
1160 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1162 if (IS_IMM8((imm))) {
1163 *(cd->mcodeptr++) = 0x6b;
1164 emit_membase(cd, (basereg),(disp),(dreg));
1167 *(cd->mcodeptr++) = 0x69;
1168 emit_membase(cd, (basereg),(disp),(dreg));
1174 void emit_mul_reg(codegendata *cd, s4 reg)
1176 *(cd->mcodeptr++) = 0xf7;
1181 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1183 *(cd->mcodeptr++) = 0xf7;
1184 emit_membase(cd, (basereg),(disp),4);
1188 void emit_idiv_reg(codegendata *cd, s4 reg)
1190 *(cd->mcodeptr++) = 0xf7;
1199 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1201 *(cd->mcodeptr++) = 0xd3;
1202 emit_reg((opc),(reg));
1206 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1209 *(cd->mcodeptr++) = 0xd1;
1210 emit_reg((opc),(dreg));
1212 *(cd->mcodeptr++) = 0xc1;
1213 emit_reg((opc),(dreg));
1219 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1221 *(cd->mcodeptr++) = 0x0f;
1222 *(cd->mcodeptr++) = 0xa5;
1223 emit_reg((reg),(dreg));
1227 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1229 *(cd->mcodeptr++) = 0x0f;
1230 *(cd->mcodeptr++) = 0xa4;
1231 emit_reg((reg),(dreg));
1236 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1238 *(cd->mcodeptr++) = 0x0f;
1239 *(cd->mcodeptr++) = 0xa5;
1240 emit_membase(cd, (basereg),(disp),(reg));
1244 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1246 *(cd->mcodeptr++) = 0x0f;
1247 *(cd->mcodeptr++) = 0xad;
1248 emit_reg((reg),(dreg));
1252 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1254 *(cd->mcodeptr++) = 0x0f;
1255 *(cd->mcodeptr++) = 0xac;
1256 emit_reg((reg),(dreg));
1261 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1263 *(cd->mcodeptr++) = 0x0f;
1264 *(cd->mcodeptr++) = 0xad;
1265 emit_membase(cd, (basereg),(disp),(reg));
1273 void emit_jmp_imm(codegendata *cd, s4 imm)
1275 *(cd->mcodeptr++) = 0xe9;
1280 void emit_jmp_reg(codegendata *cd, s4 reg)
1282 *(cd->mcodeptr++) = 0xff;
1287 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1289 *(cd->mcodeptr++) = 0x0f;
1290 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1297 * conditional set operations
1299 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1301 *(cd->mcodeptr++) = 0x0f;
1302 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1307 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1309 *(cd->mcodeptr++) = 0x0f;
1310 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1311 emit_membase(cd, (basereg),(disp),0);
1315 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1317 *(cd->mcodeptr++) = 0x0f;
1318 *(cd->mcodeptr++) = 0xc1;
1319 emit_mem((reg),(mem));
1323 void emit_neg_reg(codegendata *cd, s4 reg)
1325 *(cd->mcodeptr++) = 0xf7;
1331 void emit_push_imm(codegendata *cd, s4 imm)
1333 *(cd->mcodeptr++) = 0x68;
1338 void emit_pop_reg(codegendata *cd, s4 reg)
1340 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1344 void emit_push_reg(codegendata *cd, s4 reg)
1346 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1350 void emit_lock(codegendata *cd)
1352 *(cd->mcodeptr++) = 0xf0;
1359 void emit_call_reg(codegendata *cd, s4 reg)
1361 *(cd->mcodeptr++) = 0xff;
1366 void emit_call_imm(codegendata *cd, s4 imm)
1368 *(cd->mcodeptr++) = 0xe8;
1375 * floating point instructions
1377 void emit_fld1(codegendata *cd)
1379 *(cd->mcodeptr++) = 0xd9;
1380 *(cd->mcodeptr++) = 0xe8;
1384 void emit_fldz(codegendata *cd)
1386 *(cd->mcodeptr++) = 0xd9;
1387 *(cd->mcodeptr++) = 0xee;
1391 void emit_fld_reg(codegendata *cd, s4 reg)
1393 *(cd->mcodeptr++) = 0xd9;
1394 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1398 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1400 *(cd->mcodeptr++) = 0xd9;
1401 emit_membase(cd, (basereg),(disp),0);
1405 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1407 *(cd->mcodeptr++) = 0xd9;
1408 emit_membase32(cd, (basereg),(disp),0);
1412 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1414 *(cd->mcodeptr++) = 0xdd;
1415 emit_membase(cd, (basereg),(disp),0);
1419 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1421 *(cd->mcodeptr++) = 0xdd;
1422 emit_membase32(cd, (basereg),(disp),0);
1426 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1428 *(cd->mcodeptr++) = 0xdb;
1429 emit_membase(cd, (basereg),(disp),5);
1433 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1435 *(cd->mcodeptr++) = 0xd9;
1436 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1440 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1442 *(cd->mcodeptr++) = 0xdd;
1443 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1447 void emit_flds_mem(codegendata *cd, s4 mem)
1449 *(cd->mcodeptr++) = 0xd9;
1454 void emit_fldl_mem(codegendata *cd, s4 mem)
1456 *(cd->mcodeptr++) = 0xdd;
1461 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1463 *(cd->mcodeptr++) = 0xdb;
1464 emit_membase(cd, (basereg),(disp),0);
1468 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1470 *(cd->mcodeptr++) = 0xdf;
1471 emit_membase(cd, (basereg),(disp),5);
1475 void emit_fst_reg(codegendata *cd, s4 reg)
1477 *(cd->mcodeptr++) = 0xdd;
1478 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1482 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1484 *(cd->mcodeptr++) = 0xd9;
1485 emit_membase(cd, (basereg),(disp),2);
1489 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1491 *(cd->mcodeptr++) = 0xdd;
1492 emit_membase(cd, (basereg),(disp),2);
1496 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1498 *(cd->mcodeptr++) = 0xd9;
1499 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1503 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1505 *(cd->mcodeptr++) = 0xdd;
1506 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1510 void emit_fstp_reg(codegendata *cd, s4 reg)
1512 *(cd->mcodeptr++) = 0xdd;
1513 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1517 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1519 *(cd->mcodeptr++) = 0xd9;
1520 emit_membase(cd, (basereg),(disp),3);
1524 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1526 *(cd->mcodeptr++) = 0xd9;
1527 emit_membase32(cd, (basereg),(disp),3);
1531 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1533 *(cd->mcodeptr++) = 0xdd;
1534 emit_membase(cd, (basereg),(disp),3);
1538 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1540 *(cd->mcodeptr++) = 0xdd;
1541 emit_membase32(cd, (basereg),(disp),3);
1545 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1547 *(cd->mcodeptr++) = 0xdb;
1548 emit_membase(cd, (basereg),(disp),7);
1552 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1554 *(cd->mcodeptr++) = 0xd9;
1555 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1559 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1561 *(cd->mcodeptr++) = 0xdd;
1562 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1566 void emit_fstps_mem(codegendata *cd, s4 mem)
1568 *(cd->mcodeptr++) = 0xd9;
1573 void emit_fstpl_mem(codegendata *cd, s4 mem)
1575 *(cd->mcodeptr++) = 0xdd;
1580 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1582 *(cd->mcodeptr++) = 0xdb;
1583 emit_membase(cd, (basereg),(disp),2);
1587 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1589 *(cd->mcodeptr++) = 0xdb;
1590 emit_membase(cd, (basereg),(disp),3);
1594 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1596 *(cd->mcodeptr++) = 0xdf;
1597 emit_membase(cd, (basereg),(disp),7);
1601 void emit_fchs(codegendata *cd)
1603 *(cd->mcodeptr++) = 0xd9;
1604 *(cd->mcodeptr++) = 0xe0;
1608 void emit_faddp(codegendata *cd)
1610 *(cd->mcodeptr++) = 0xde;
1611 *(cd->mcodeptr++) = 0xc1;
1615 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1617 *(cd->mcodeptr++) = 0xd8;
1618 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1622 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1624 *(cd->mcodeptr++) = 0xdc;
1625 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1629 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1631 *(cd->mcodeptr++) = 0xde;
1632 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1636 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1638 *(cd->mcodeptr++) = 0xd8;
1639 emit_membase(cd, (basereg),(disp),0);
1643 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1645 *(cd->mcodeptr++) = 0xdc;
1646 emit_membase(cd, (basereg),(disp),0);
1650 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1652 *(cd->mcodeptr++) = 0xd8;
1653 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1657 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1659 *(cd->mcodeptr++) = 0xdc;
1660 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1664 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1666 *(cd->mcodeptr++) = 0xde;
1667 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1671 void emit_fsubp(codegendata *cd)
1673 *(cd->mcodeptr++) = 0xde;
1674 *(cd->mcodeptr++) = 0xe9;
1678 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1680 *(cd->mcodeptr++) = 0xd8;
1681 emit_membase(cd, (basereg),(disp),4);
1685 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1687 *(cd->mcodeptr++) = 0xdc;
1688 emit_membase(cd, (basereg),(disp),4);
1692 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1694 *(cd->mcodeptr++) = 0xd8;
1695 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1699 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1701 *(cd->mcodeptr++) = 0xdc;
1702 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1706 void emit_fmulp(codegendata *cd)
1708 *(cd->mcodeptr++) = 0xde;
1709 *(cd->mcodeptr++) = 0xc9;
1713 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1715 *(cd->mcodeptr++) = 0xde;
1716 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1720 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1722 *(cd->mcodeptr++) = 0xd8;
1723 emit_membase(cd, (basereg),(disp),1);
1727 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1729 *(cd->mcodeptr++) = 0xdc;
1730 emit_membase(cd, (basereg),(disp),1);
1734 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1736 *(cd->mcodeptr++) = 0xd8;
1737 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1741 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1743 *(cd->mcodeptr++) = 0xdc;
1744 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1748 void emit_fdivp(codegendata *cd)
1750 *(cd->mcodeptr++) = 0xde;
1751 *(cd->mcodeptr++) = 0xf9;
1755 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1757 *(cd->mcodeptr++) = 0xde;
1758 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1762 void emit_fxch(codegendata *cd)
1764 *(cd->mcodeptr++) = 0xd9;
1765 *(cd->mcodeptr++) = 0xc9;
1769 void emit_fxch_reg(codegendata *cd, s4 reg)
1771 *(cd->mcodeptr++) = 0xd9;
1772 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1776 void emit_fprem(codegendata *cd)
1778 *(cd->mcodeptr++) = 0xd9;
1779 *(cd->mcodeptr++) = 0xf8;
1783 void emit_fprem1(codegendata *cd)
1785 *(cd->mcodeptr++) = 0xd9;
1786 *(cd->mcodeptr++) = 0xf5;
1790 void emit_fucom(codegendata *cd)
1792 *(cd->mcodeptr++) = 0xdd;
1793 *(cd->mcodeptr++) = 0xe1;
1797 void emit_fucom_reg(codegendata *cd, s4 reg)
1799 *(cd->mcodeptr++) = 0xdd;
1800 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1804 void emit_fucomp_reg(codegendata *cd, s4 reg)
1806 *(cd->mcodeptr++) = 0xdd;
1807 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1811 void emit_fucompp(codegendata *cd)
1813 *(cd->mcodeptr++) = 0xda;
1814 *(cd->mcodeptr++) = 0xe9;
1818 void emit_fnstsw(codegendata *cd)
1820 *(cd->mcodeptr++) = 0xdf;
1821 *(cd->mcodeptr++) = 0xe0;
1825 void emit_sahf(codegendata *cd)
1827 *(cd->mcodeptr++) = 0x9e;
1831 void emit_finit(codegendata *cd)
1833 *(cd->mcodeptr++) = 0x9b;
1834 *(cd->mcodeptr++) = 0xdb;
1835 *(cd->mcodeptr++) = 0xe3;
1839 void emit_fldcw_mem(codegendata *cd, s4 mem)
1841 *(cd->mcodeptr++) = 0xd9;
1846 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1848 *(cd->mcodeptr++) = 0xd9;
1849 emit_membase(cd, (basereg),(disp),5);
1853 void emit_wait(codegendata *cd)
1855 *(cd->mcodeptr++) = 0x9b;
1859 void emit_ffree_reg(codegendata *cd, s4 reg)
1861 *(cd->mcodeptr++) = 0xdd;
1862 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1866 void emit_fdecstp(codegendata *cd)
1868 *(cd->mcodeptr++) = 0xd9;
1869 *(cd->mcodeptr++) = 0xf6;
1873 void emit_fincstp(codegendata *cd)
1875 *(cd->mcodeptr++) = 0xd9;
1876 *(cd->mcodeptr++) = 0xf7;
1879 #if defined(ENABLE_ESCAPE_CHECK)
1880 void emit_escape_check(codegendata *cd, s4 reg) {
1882 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1884 M_IADD_IMM(4, REG_SP);
1889 * These are local overrides for various environment variables in Emacs.
1890 * Please do not remove this and leave it at the end of the file, where
1891 * Emacs will automagically detect them.
1892 * ---------------------------------------------------------------------
1895 * indent-tabs-mode: t