1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 7766 2007-04-19 13:24:48Z michi $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
47 #include "vm/exceptions.h"
49 #include "vm/jit/asmpart.h"
50 #include "vm/jit/dseg.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/replace.h"
55 #include "vmcore/options.h"
56 #include "vmcore/statistics.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->vv.regoff * 4;
83 M_ILD(tempreg, REG_SP, disp);
86 M_LLD(tempreg, REG_SP, disp);
89 M_FLD(tempreg, REG_SP, disp);
92 M_DLD(tempreg, REG_SP, disp);
95 vm_abort("emit_load: unknown type %d", src->type);
101 reg = src->vv.regoff;
107 /* emit_load_low ************************************************************
109 Emits a possible load of the low 32-bits of an operand.
111 *******************************************************************************/
113 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
119 assert(src->type == TYPE_LNG);
121 /* get required compiler data */
126 if (IS_INMEMORY(src->flags)) {
129 disp = src->vv.regoff * 4;
131 M_ILD(tempreg, REG_SP, disp);
136 reg = GET_LOW_REG(src->vv.regoff);
142 /* emit_load_high ***********************************************************
144 Emits a possible load of the high 32-bits of an operand.
146 *******************************************************************************/
148 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
154 /* get required compiler data */
156 assert(src->type == TYPE_LNG);
160 if (IS_INMEMORY(src->flags)) {
163 disp = src->vv.regoff * 4;
165 M_ILD(tempreg, REG_SP, disp + 4);
170 reg = GET_HIGH_REG(src->vv.regoff);
176 /* emit_store ******************************************************************
178 Emits a possible store of the destination operand.
180 *******************************************************************************/
182 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
187 /* get required compiler data */
191 if (IS_INMEMORY(dst->flags)) {
194 disp = dst->vv.regoff * 4;
199 M_IST(d, REG_SP, disp);
202 M_LST(d, REG_SP, disp);
205 M_FST(d, REG_SP, disp);
208 M_DST(d, REG_SP, disp);
211 vm_abort("emit_store: unknown type %d", dst->type);
217 /* emit_store_low **************************************************************
219 Emits a possible store of the low 32-bits of the destination
222 *******************************************************************************/
224 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
228 assert(dst->type == TYPE_LNG);
230 /* get required compiler data */
234 if (IS_INMEMORY(dst->flags)) {
236 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
241 /* emit_store_high *************************************************************
243 Emits a possible store of the high 32-bits of the destination
246 *******************************************************************************/
248 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
252 assert(dst->type == TYPE_LNG);
254 /* get required compiler data */
258 if (IS_INMEMORY(dst->flags)) {
260 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
265 /* emit_copy *******************************************************************
267 Generates a register/memory to register/memory copy.
269 *******************************************************************************/
271 void emit_copy(jitdata *jd, instruction *iptr)
278 /* get required compiler data */
282 /* get source and destination variables */
284 src = VAROP(iptr->s1);
285 dst = VAROP(iptr->dst);
287 if ((src->vv.regoff != dst->vv.regoff) ||
288 ((src->flags ^ dst->flags) & INMEMORY)) {
290 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
291 /* emit nothing, as the value won't be used anyway */
295 /* If one of the variables resides in memory, we can eliminate
296 the register move from/to the temporary register with the
297 order of getting the destination register and the load. */
299 if (IS_INMEMORY(src->flags)) {
300 if (IS_LNG_TYPE(src->type))
301 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
303 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
305 s1 = emit_load(jd, iptr, src, d);
308 if (IS_LNG_TYPE(src->type))
309 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
311 s1 = emit_load(jd, iptr, src, REG_ITMP1);
313 d = codegen_reg_of_var(iptr->opc, dst, s1);
330 vm_abort("emit_copy: unknown type %d", src->type);
334 emit_store(jd, iptr, dst, d);
339 /* emit_branch *****************************************************************
341 Emits the code for conditional and unconditional branchs.
343 *******************************************************************************/
345 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
349 /* ATTENTION: a displacement overflow cannot happen */
351 /* check which branch to generate */
353 if (condition == BRANCH_UNCONDITIONAL) {
355 /* calculate the different displacements */
357 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
359 M_JMP_IMM(branchdisp);
362 /* calculate the different displacements */
364 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
398 vm_abort("emit_branch: unknown condition %d", condition);
404 /* emit_arithmetic_check *******************************************************
406 Emit an ArithmeticException check.
408 *******************************************************************************/
410 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
412 if (INSTRUCTION_MUST_CHECK(iptr)) {
415 M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
420 /* emit_arrayindexoutofbounds_check ********************************************
422 Emit a ArrayIndexOutOfBoundsException check.
424 *******************************************************************************/
426 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
428 if (INSTRUCTION_MUST_CHECK(iptr)) {
429 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
430 M_CMP(REG_ITMP3, s2);
432 M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
437 /* emit_classcast_check ********************************************************
439 Emit a ClassCastException check.
441 *******************************************************************************/
443 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
445 if (INSTRUCTION_MUST_CHECK(iptr)) {
457 vm_abort("emit_classcast_check: unknown condition %d", condition);
459 M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
464 /* emit_nullpointer_check ******************************************************
466 Emit a NullPointerException check.
468 *******************************************************************************/
470 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
472 if (INSTRUCTION_MUST_CHECK(iptr)) {
475 M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
480 /* emit_exception_check ********************************************************
482 Emit an Exception check.
484 *******************************************************************************/
486 void emit_exception_check(codegendata *cd, instruction *iptr)
488 if (INSTRUCTION_MUST_CHECK(iptr)) {
491 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
496 /* emit_patcher_stubs **********************************************************
498 Generates the code for the patcher stubs.
500 *******************************************************************************/
502 void emit_patcher_stubs(jitdata *jd)
512 /* get required compiler data */
516 /* generate code patching stub call code */
520 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
521 /* check code segment size */
525 /* Get machine code which is patched back in later. A
526 `call rel32' is 5 bytes long. */
528 savedmcodeptr = cd->mcodebase + pref->branchpos;
529 mcode = *((u8 *) savedmcodeptr);
531 /* patch in `call rel32' to call the following code */
533 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
534 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
536 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
538 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
544 /* move pointer to java_objectheader onto stack */
546 #if defined(ENABLE_THREADS)
547 (void) dseg_add_unique_address(cd, NULL); /* flcword */
548 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
549 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
551 M_MOV_IMM(0, REG_ITMP3);
553 M_AADD_IMM(disp, REG_ITMP3);
559 /* move machine code bytes and classinfo pointer into registers */
561 M_PUSH_IMM(mcode >> 32);
563 M_PUSH_IMM(pref->ref);
564 M_PUSH_IMM(pref->patcher);
566 if (targetdisp == 0) {
567 targetdisp = cd->mcodeptr - cd->mcodebase;
569 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
573 M_JMP_IMM((cd->mcodebase + targetdisp) -
574 (cd->mcodeptr + PATCHER_CALL_SIZE));
580 /* emit_replacement_stubs ******************************************************
582 Generates the code for the replacement stubs.
584 *******************************************************************************/
586 #if defined(ENABLE_REPLACEMENT)
587 void emit_replacement_stubs(jitdata *jd)
597 /* get required compiler data */
602 rplp = code->rplpoints;
604 /* store beginning of replacement stubs */
606 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
608 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
609 /* do not generate stubs for non-trappable points */
611 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
614 /* check code segment size */
618 /* note start of stub code */
620 outcode = (s4) (cd->mcodeptr - cd->mcodebase);
622 /* push address of `rplpoint` struct */
626 /* jump to replacement function */
628 M_PUSH_IMM(asm_replacement_out);
631 /* add jump reference for COUNTDOWN points */
633 if (rplp->flags & RPLPOINT_FLAG_COUNTDOWN) {
635 branchmpc = (s4)rplp->pc + (7 + 6);
637 md_codegen_patch_branch(cd, branchmpc, (s4) outcode);
640 assert(((cd->mcodeptr - cd->mcodebase) - outcode) == REPLACEMENT_STUB_SIZE);
643 #endif /* defined(ENABLE_REPLACEMENT) */
646 /* emit_verbosecall_enter ******************************************************
648 Generates the code for the call trace.
650 *******************************************************************************/
653 void emit_verbosecall_enter(jitdata *jd)
662 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
665 /* get required compiler data */
673 /* mark trace code */
677 /* methodinfo* + arguments + return address */
679 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
680 cd->stackframesize * 4 + 4;
682 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
684 /* save temporary registers for leaf methods */
686 for (i = 0; i < INT_TMP_CNT; i++)
687 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
689 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
690 t = md->paramtypes[i].type;
692 if (IS_INT_LNG_TYPE(t)) {
693 if (IS_2_WORD_TYPE(t)) {
694 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
695 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
697 else if (IS_ADR_TYPE(t)) {
698 M_ALD(REG_ITMP1, REG_SP, disp);
699 M_AST(REG_ITMP1, REG_SP, i * 8);
700 M_IST_IMM(0, REG_SP, i * 8 + 4);
703 M_ILD(EAX, REG_SP, disp);
705 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
709 if (IS_2_WORD_TYPE(t)) {
710 M_DLD(REG_NULL, REG_SP, disp);
711 M_DST(REG_NULL, REG_SP, i * 8);
714 M_FLD(REG_NULL, REG_SP, disp);
715 M_FST(REG_NULL, REG_SP, i * 8);
716 M_IST_IMM(0, REG_SP, i * 8 + 4);
720 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
723 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
725 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
728 /* restore temporary registers for leaf methods */
730 for (i = 0; i < INT_TMP_CNT; i++)
731 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
733 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
735 /* mark trace code */
739 #endif /* !defined(NDEBUG) */
742 /* emit_verbosecall_exit *******************************************************
744 Generates the code for the call trace.
746 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
748 *******************************************************************************/
751 void emit_verbosecall_exit(jitdata *jd)
757 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
760 /* get required compiler data */
766 /* mark trace code */
770 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
772 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
774 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
775 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
777 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
779 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
782 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
784 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
786 /* mark trace code */
790 #endif /* !defined(NDEBUG) */
793 /* code generation functions **************************************************/
795 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
797 if (basereg == ESP) {
799 emit_address_byte(0, dreg, ESP);
800 emit_address_byte(0, ESP, ESP);
802 else if (IS_IMM8(disp)) {
803 emit_address_byte(1, dreg, ESP);
804 emit_address_byte(0, ESP, ESP);
808 emit_address_byte(2, dreg, ESP);
809 emit_address_byte(0, ESP, ESP);
813 else if ((disp == 0) && (basereg != EBP)) {
814 emit_address_byte(0, dreg, basereg);
816 else if (IS_IMM8(disp)) {
817 emit_address_byte(1, dreg, basereg);
821 emit_address_byte(2, dreg, basereg);
827 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
829 if (basereg == ESP) {
830 emit_address_byte(2, dreg, ESP);
831 emit_address_byte(0, ESP, ESP);
835 emit_address_byte(2, dreg, basereg);
841 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
844 emit_address_byte(0, reg, 4);
845 emit_address_byte(scale, indexreg, 5);
848 else if ((disp == 0) && (basereg != EBP)) {
849 emit_address_byte(0, reg, 4);
850 emit_address_byte(scale, indexreg, basereg);
852 else if (IS_IMM8(disp)) {
853 emit_address_byte(1, reg, 4);
854 emit_address_byte(scale, indexreg, basereg);
858 emit_address_byte(2, reg, 4);
859 emit_address_byte(scale, indexreg, basereg);
865 /* low-level code emitter functions *******************************************/
867 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
869 COUNT(count_mov_reg_reg);
870 *(cd->mcodeptr++) = 0x89;
871 emit_reg((reg),(dreg));
875 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
877 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
882 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
884 *(cd->mcodeptr++) = 0xc6;
890 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
892 COUNT(count_mov_mem_reg);
893 *(cd->mcodeptr++) = 0x8b;
894 emit_membase(cd, (basereg),(disp),(reg));
899 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
900 * constant membase immediate length of 32bit
902 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
904 COUNT(count_mov_mem_reg);
905 *(cd->mcodeptr++) = 0x8b;
906 emit_membase32(cd, (basereg),(disp),(reg));
910 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
912 COUNT(count_mov_reg_mem);
913 *(cd->mcodeptr++) = 0x89;
914 emit_membase(cd, (basereg),(disp),(reg));
918 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
920 COUNT(count_mov_reg_mem);
921 *(cd->mcodeptr++) = 0x89;
922 emit_membase32(cd, (basereg),(disp),(reg));
926 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
928 COUNT(count_mov_mem_reg);
929 *(cd->mcodeptr++) = 0x8b;
930 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
934 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
936 COUNT(count_mov_reg_mem);
937 *(cd->mcodeptr++) = 0x89;
938 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
942 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
944 COUNT(count_mov_reg_mem);
945 *(cd->mcodeptr++) = 0x66;
946 *(cd->mcodeptr++) = 0x89;
947 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
951 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
953 COUNT(count_mov_reg_mem);
954 *(cd->mcodeptr++) = 0x88;
955 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
959 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
961 COUNT(count_mov_reg_mem);
962 *(cd->mcodeptr++) = 0x89;
963 emit_mem((reg),(mem));
967 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
969 COUNT(count_mov_mem_reg);
970 *(cd->mcodeptr++) = 0x8b;
971 emit_mem((dreg),(mem));
975 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
977 *(cd->mcodeptr++) = 0xc7;
983 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
985 *(cd->mcodeptr++) = 0xc7;
986 emit_membase(cd, (basereg),(disp),0);
991 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
993 *(cd->mcodeptr++) = 0xc7;
994 emit_membase32(cd, (basereg),(disp),0);
999 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1001 *(cd->mcodeptr++) = 0xc6;
1002 emit_membase(cd, (basereg),(disp),0);
1007 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1009 COUNT(count_mov_mem_reg);
1010 *(cd->mcodeptr++) = 0x0f;
1011 *(cd->mcodeptr++) = 0xbe;
1012 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1016 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1018 *(cd->mcodeptr++) = 0x0f;
1019 *(cd->mcodeptr++) = 0xbf;
1024 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1026 COUNT(count_mov_mem_reg);
1027 *(cd->mcodeptr++) = 0x0f;
1028 *(cd->mcodeptr++) = 0xbf;
1029 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1033 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1035 *(cd->mcodeptr++) = 0x0f;
1036 *(cd->mcodeptr++) = 0xb7;
1041 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1043 COUNT(count_mov_mem_reg);
1044 *(cd->mcodeptr++) = 0x0f;
1045 *(cd->mcodeptr++) = 0xb7;
1046 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1050 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1052 *(cd->mcodeptr++) = 0xc7;
1053 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1058 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1060 *(cd->mcodeptr++) = 0x66;
1061 *(cd->mcodeptr++) = 0xc7;
1062 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1067 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1069 *(cd->mcodeptr++) = 0xc6;
1070 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1078 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1080 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1081 emit_reg((reg),(dreg));
1085 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1087 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1088 emit_membase(cd, (basereg),(disp),(reg));
1092 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1094 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1095 emit_membase(cd, (basereg),(disp),(reg));
1099 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1102 *(cd->mcodeptr++) = 0x83;
1103 emit_reg((opc),(dreg));
1106 *(cd->mcodeptr++) = 0x81;
1107 emit_reg((opc),(dreg));
1113 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1115 *(cd->mcodeptr++) = 0x81;
1116 emit_reg((opc),(dreg));
1121 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1124 *(cd->mcodeptr++) = 0x83;
1125 emit_membase(cd, (basereg),(disp),(opc));
1128 *(cd->mcodeptr++) = 0x81;
1129 emit_membase(cd, (basereg),(disp),(opc));
1135 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1138 *(cd->mcodeptr++) = 0x83;
1139 emit_mem(opc, disp);
1142 *(cd->mcodeptr++) = 0x81;
1143 emit_mem(opc, disp);
1149 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1151 *(cd->mcodeptr++) = 0x85;
1152 emit_reg((reg),(dreg));
1156 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1158 *(cd->mcodeptr++) = 0xf7;
1166 * inc, dec operations
1168 void emit_dec_mem(codegendata *cd, s4 mem)
1170 *(cd->mcodeptr++) = 0xff;
1175 void emit_cltd(codegendata *cd)
1177 *(cd->mcodeptr++) = 0x99;
1181 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1183 *(cd->mcodeptr++) = 0x0f;
1184 *(cd->mcodeptr++) = 0xaf;
1185 emit_reg((dreg),(reg));
1189 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1191 *(cd->mcodeptr++) = 0x0f;
1192 *(cd->mcodeptr++) = 0xaf;
1193 emit_membase(cd, (basereg),(disp),(dreg));
1197 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1199 if (IS_IMM8((imm))) {
1200 *(cd->mcodeptr++) = 0x6b;
1204 *(cd->mcodeptr++) = 0x69;
1211 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1213 if (IS_IMM8((imm))) {
1214 *(cd->mcodeptr++) = 0x6b;
1215 emit_reg((dreg),(reg));
1218 *(cd->mcodeptr++) = 0x69;
1219 emit_reg((dreg),(reg));
1225 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1227 if (IS_IMM8((imm))) {
1228 *(cd->mcodeptr++) = 0x6b;
1229 emit_membase(cd, (basereg),(disp),(dreg));
1232 *(cd->mcodeptr++) = 0x69;
1233 emit_membase(cd, (basereg),(disp),(dreg));
1239 void emit_mul_reg(codegendata *cd, s4 reg)
1241 *(cd->mcodeptr++) = 0xf7;
1246 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1248 *(cd->mcodeptr++) = 0xf7;
1249 emit_membase(cd, (basereg),(disp),4);
1253 void emit_idiv_reg(codegendata *cd, s4 reg)
1255 *(cd->mcodeptr++) = 0xf7;
1260 void emit_ret(codegendata *cd)
1262 *(cd->mcodeptr++) = 0xc3;
1270 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1272 *(cd->mcodeptr++) = 0xd3;
1273 emit_reg((opc),(reg));
1277 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1280 *(cd->mcodeptr++) = 0xd1;
1281 emit_reg((opc),(dreg));
1283 *(cd->mcodeptr++) = 0xc1;
1284 emit_reg((opc),(dreg));
1290 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1292 *(cd->mcodeptr++) = 0x0f;
1293 *(cd->mcodeptr++) = 0xa5;
1294 emit_reg((reg),(dreg));
1298 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1300 *(cd->mcodeptr++) = 0x0f;
1301 *(cd->mcodeptr++) = 0xa4;
1302 emit_reg((reg),(dreg));
1307 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1309 *(cd->mcodeptr++) = 0x0f;
1310 *(cd->mcodeptr++) = 0xa5;
1311 emit_membase(cd, (basereg),(disp),(reg));
1315 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1317 *(cd->mcodeptr++) = 0x0f;
1318 *(cd->mcodeptr++) = 0xad;
1319 emit_reg((reg),(dreg));
1323 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1325 *(cd->mcodeptr++) = 0x0f;
1326 *(cd->mcodeptr++) = 0xac;
1327 emit_reg((reg),(dreg));
1332 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1334 *(cd->mcodeptr++) = 0x0f;
1335 *(cd->mcodeptr++) = 0xad;
1336 emit_membase(cd, (basereg),(disp),(reg));
1344 void emit_jmp_imm(codegendata *cd, s4 imm)
1346 *(cd->mcodeptr++) = 0xe9;
1351 void emit_jmp_reg(codegendata *cd, s4 reg)
1353 *(cd->mcodeptr++) = 0xff;
1358 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1360 *(cd->mcodeptr++) = 0x0f;
1361 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1368 * conditional set operations
1370 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1372 *(cd->mcodeptr++) = 0x0f;
1373 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1378 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1380 *(cd->mcodeptr++) = 0x0f;
1381 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1382 emit_membase(cd, (basereg),(disp),0);
1386 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1388 *(cd->mcodeptr++) = 0x0f;
1389 *(cd->mcodeptr++) = 0xc1;
1390 emit_mem((reg),(mem));
1394 void emit_neg_reg(codegendata *cd, s4 reg)
1396 *(cd->mcodeptr++) = 0xf7;
1402 void emit_push_imm(codegendata *cd, s4 imm)
1404 *(cd->mcodeptr++) = 0x68;
1409 void emit_pop_reg(codegendata *cd, s4 reg)
1411 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1415 void emit_push_reg(codegendata *cd, s4 reg)
1417 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1421 void emit_nop(codegendata *cd)
1423 *(cd->mcodeptr++) = 0x90;
1427 void emit_lock(codegendata *cd)
1429 *(cd->mcodeptr++) = 0xf0;
1436 void emit_call_reg(codegendata *cd, s4 reg)
1438 *(cd->mcodeptr++) = 0xff;
1443 void emit_call_imm(codegendata *cd, s4 imm)
1445 *(cd->mcodeptr++) = 0xe8;
1452 * floating point instructions
1454 void emit_fld1(codegendata *cd)
1456 *(cd->mcodeptr++) = 0xd9;
1457 *(cd->mcodeptr++) = 0xe8;
1461 void emit_fldz(codegendata *cd)
1463 *(cd->mcodeptr++) = 0xd9;
1464 *(cd->mcodeptr++) = 0xee;
1468 void emit_fld_reg(codegendata *cd, s4 reg)
1470 *(cd->mcodeptr++) = 0xd9;
1471 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1475 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1477 *(cd->mcodeptr++) = 0xd9;
1478 emit_membase(cd, (basereg),(disp),0);
1482 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1484 *(cd->mcodeptr++) = 0xd9;
1485 emit_membase32(cd, (basereg),(disp),0);
1489 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1491 *(cd->mcodeptr++) = 0xdd;
1492 emit_membase(cd, (basereg),(disp),0);
1496 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1498 *(cd->mcodeptr++) = 0xdd;
1499 emit_membase32(cd, (basereg),(disp),0);
1503 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1505 *(cd->mcodeptr++) = 0xdb;
1506 emit_membase(cd, (basereg),(disp),5);
1510 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1512 *(cd->mcodeptr++) = 0xd9;
1513 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1517 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1519 *(cd->mcodeptr++) = 0xdd;
1520 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1524 void emit_flds_mem(codegendata *cd, s4 mem)
1526 *(cd->mcodeptr++) = 0xd9;
1531 void emit_fldl_mem(codegendata *cd, s4 mem)
1533 *(cd->mcodeptr++) = 0xdd;
1538 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1540 *(cd->mcodeptr++) = 0xdb;
1541 emit_membase(cd, (basereg),(disp),0);
1545 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1547 *(cd->mcodeptr++) = 0xdf;
1548 emit_membase(cd, (basereg),(disp),5);
1552 void emit_fst_reg(codegendata *cd, s4 reg)
1554 *(cd->mcodeptr++) = 0xdd;
1555 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1559 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1561 *(cd->mcodeptr++) = 0xd9;
1562 emit_membase(cd, (basereg),(disp),2);
1566 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1568 *(cd->mcodeptr++) = 0xdd;
1569 emit_membase(cd, (basereg),(disp),2);
1573 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1575 *(cd->mcodeptr++) = 0xd9;
1576 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1580 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1582 *(cd->mcodeptr++) = 0xdd;
1583 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1587 void emit_fstp_reg(codegendata *cd, s4 reg)
1589 *(cd->mcodeptr++) = 0xdd;
1590 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1594 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1596 *(cd->mcodeptr++) = 0xd9;
1597 emit_membase(cd, (basereg),(disp),3);
1601 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1603 *(cd->mcodeptr++) = 0xd9;
1604 emit_membase32(cd, (basereg),(disp),3);
1608 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1610 *(cd->mcodeptr++) = 0xdd;
1611 emit_membase(cd, (basereg),(disp),3);
1615 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1617 *(cd->mcodeptr++) = 0xdd;
1618 emit_membase32(cd, (basereg),(disp),3);
1622 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1624 *(cd->mcodeptr++) = 0xdb;
1625 emit_membase(cd, (basereg),(disp),7);
1629 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1631 *(cd->mcodeptr++) = 0xd9;
1632 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1636 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1638 *(cd->mcodeptr++) = 0xdd;
1639 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1643 void emit_fstps_mem(codegendata *cd, s4 mem)
1645 *(cd->mcodeptr++) = 0xd9;
1650 void emit_fstpl_mem(codegendata *cd, s4 mem)
1652 *(cd->mcodeptr++) = 0xdd;
1657 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1659 *(cd->mcodeptr++) = 0xdb;
1660 emit_membase(cd, (basereg),(disp),2);
1664 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1666 *(cd->mcodeptr++) = 0xdb;
1667 emit_membase(cd, (basereg),(disp),3);
1671 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1673 *(cd->mcodeptr++) = 0xdf;
1674 emit_membase(cd, (basereg),(disp),7);
1678 void emit_fchs(codegendata *cd)
1680 *(cd->mcodeptr++) = 0xd9;
1681 *(cd->mcodeptr++) = 0xe0;
1685 void emit_faddp(codegendata *cd)
1687 *(cd->mcodeptr++) = 0xde;
1688 *(cd->mcodeptr++) = 0xc1;
1692 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1694 *(cd->mcodeptr++) = 0xd8;
1695 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1699 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1701 *(cd->mcodeptr++) = 0xdc;
1702 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1706 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1708 *(cd->mcodeptr++) = 0xde;
1709 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1713 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1715 *(cd->mcodeptr++) = 0xd8;
1716 emit_membase(cd, (basereg),(disp),0);
1720 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1722 *(cd->mcodeptr++) = 0xdc;
1723 emit_membase(cd, (basereg),(disp),0);
1727 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1729 *(cd->mcodeptr++) = 0xd8;
1730 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1734 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1736 *(cd->mcodeptr++) = 0xdc;
1737 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1741 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1743 *(cd->mcodeptr++) = 0xde;
1744 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1748 void emit_fsubp(codegendata *cd)
1750 *(cd->mcodeptr++) = 0xde;
1751 *(cd->mcodeptr++) = 0xe9;
1755 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1757 *(cd->mcodeptr++) = 0xd8;
1758 emit_membase(cd, (basereg),(disp),4);
1762 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1764 *(cd->mcodeptr++) = 0xdc;
1765 emit_membase(cd, (basereg),(disp),4);
1769 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1771 *(cd->mcodeptr++) = 0xd8;
1772 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1776 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1778 *(cd->mcodeptr++) = 0xdc;
1779 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1783 void emit_fmulp(codegendata *cd)
1785 *(cd->mcodeptr++) = 0xde;
1786 *(cd->mcodeptr++) = 0xc9;
1790 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1792 *(cd->mcodeptr++) = 0xde;
1793 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1797 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1799 *(cd->mcodeptr++) = 0xd8;
1800 emit_membase(cd, (basereg),(disp),1);
1804 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1806 *(cd->mcodeptr++) = 0xdc;
1807 emit_membase(cd, (basereg),(disp),1);
1811 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1813 *(cd->mcodeptr++) = 0xd8;
1814 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1818 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1820 *(cd->mcodeptr++) = 0xdc;
1821 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1825 void emit_fdivp(codegendata *cd)
1827 *(cd->mcodeptr++) = 0xde;
1828 *(cd->mcodeptr++) = 0xf9;
1832 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1834 *(cd->mcodeptr++) = 0xde;
1835 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1839 void emit_fxch(codegendata *cd)
1841 *(cd->mcodeptr++) = 0xd9;
1842 *(cd->mcodeptr++) = 0xc9;
1846 void emit_fxch_reg(codegendata *cd, s4 reg)
1848 *(cd->mcodeptr++) = 0xd9;
1849 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1853 void emit_fprem(codegendata *cd)
1855 *(cd->mcodeptr++) = 0xd9;
1856 *(cd->mcodeptr++) = 0xf8;
1860 void emit_fprem1(codegendata *cd)
1862 *(cd->mcodeptr++) = 0xd9;
1863 *(cd->mcodeptr++) = 0xf5;
1867 void emit_fucom(codegendata *cd)
1869 *(cd->mcodeptr++) = 0xdd;
1870 *(cd->mcodeptr++) = 0xe1;
1874 void emit_fucom_reg(codegendata *cd, s4 reg)
1876 *(cd->mcodeptr++) = 0xdd;
1877 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1881 void emit_fucomp_reg(codegendata *cd, s4 reg)
1883 *(cd->mcodeptr++) = 0xdd;
1884 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1888 void emit_fucompp(codegendata *cd)
1890 *(cd->mcodeptr++) = 0xda;
1891 *(cd->mcodeptr++) = 0xe9;
1895 void emit_fnstsw(codegendata *cd)
1897 *(cd->mcodeptr++) = 0xdf;
1898 *(cd->mcodeptr++) = 0xe0;
1902 void emit_sahf(codegendata *cd)
1904 *(cd->mcodeptr++) = 0x9e;
1908 void emit_finit(codegendata *cd)
1910 *(cd->mcodeptr++) = 0x9b;
1911 *(cd->mcodeptr++) = 0xdb;
1912 *(cd->mcodeptr++) = 0xe3;
1916 void emit_fldcw_mem(codegendata *cd, s4 mem)
1918 *(cd->mcodeptr++) = 0xd9;
1923 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1925 *(cd->mcodeptr++) = 0xd9;
1926 emit_membase(cd, (basereg),(disp),5);
1930 void emit_wait(codegendata *cd)
1932 *(cd->mcodeptr++) = 0x9b;
1936 void emit_ffree_reg(codegendata *cd, s4 reg)
1938 *(cd->mcodeptr++) = 0xdd;
1939 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1943 void emit_fdecstp(codegendata *cd)
1945 *(cd->mcodeptr++) = 0xd9;
1946 *(cd->mcodeptr++) = 0xf6;
1950 void emit_fincstp(codegendata *cd)
1952 *(cd->mcodeptr++) = 0xd9;
1953 *(cd->mcodeptr++) = 0xf7;
1958 * These are local overrides for various environment variables in Emacs.
1959 * Please do not remove this and leave it at the end of the file, where
1960 * Emacs will automagically detect them.
1961 * ---------------------------------------------------------------------
1964 * indent-tabs-mode: t