1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "vm/jit/i386/codegen.h"
33 #include "vm/jit/i386/emit.h"
34 #include "vm/jit/i386/md-abi.h"
36 #include "mm/memory.h"
38 #include "threads/lock-common.h"
40 #include "vm/options.h"
41 #include "vm/statistics.h"
43 #include "vm/jit/abi.h"
44 #include "vm/jit/asmpart.h"
45 #include "vm/jit/dseg.h"
46 #include "vm/jit/emit-common.hpp"
47 #include "vm/jit/jit.hpp"
48 #include "vm/jit/patcher-common.hpp"
49 #include "vm/jit/replace.hpp"
50 #include "vm/jit/trace.hpp"
51 #include "vm/jit/trap.h"
54 /* emit_load ******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 /* get required compiler data */
70 if (IS_INMEMORY(src->flags)) {
73 disp = src->vv.regoff;
78 M_ILD(tempreg, REG_SP, disp);
81 M_LLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 M_DLD(tempreg, REG_SP, disp);
90 vm_abort("emit_load: unknown type %d", src->type);
102 /* emit_load_low ************************************************************
104 Emits a possible load of the low 32-bits of an operand.
106 *******************************************************************************/
108 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
121 if (IS_INMEMORY(src->flags)) {
124 disp = src->vv.regoff;
126 M_ILD(tempreg, REG_SP, disp);
131 reg = GET_LOW_REG(src->vv.regoff);
137 /* emit_load_high ***********************************************************
139 Emits a possible load of the high 32-bits of an operand.
141 *******************************************************************************/
143 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
149 /* get required compiler data */
151 assert(src->type == TYPE_LNG);
155 if (IS_INMEMORY(src->flags)) {
158 disp = src->vv.regoff;
160 M_ILD(tempreg, REG_SP, disp + 4);
165 reg = GET_HIGH_REG(src->vv.regoff);
171 /* emit_store ******************************************************************
173 Emits a possible store of the destination operand.
175 *******************************************************************************/
177 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
182 /* get required compiler data */
186 if (IS_INMEMORY(dst->flags)) {
189 disp = dst->vv.regoff;
194 M_IST(d, REG_SP, disp);
197 M_LST(d, REG_SP, disp);
200 M_FST(d, REG_SP, disp);
203 M_DST(d, REG_SP, disp);
206 vm_abort("emit_store: unknown type %d", dst->type);
212 /* emit_store_low **************************************************************
214 Emits a possible store of the low 32-bits of the destination
217 *******************************************************************************/
219 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
223 assert(dst->type == TYPE_LNG);
225 /* get required compiler data */
229 if (IS_INMEMORY(dst->flags)) {
231 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
236 /* emit_store_high *************************************************************
238 Emits a possible store of the high 32-bits of the destination
241 *******************************************************************************/
243 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
247 assert(dst->type == TYPE_LNG);
249 /* get required compiler data */
253 if (IS_INMEMORY(dst->flags)) {
255 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
260 /* emit_copy *******************************************************************
262 Generates a register/memory to register/memory copy.
264 *******************************************************************************/
266 void emit_copy(jitdata *jd, instruction *iptr)
273 /* get required compiler data */
277 /* get source and destination variables */
279 src = VAROP(iptr->s1);
280 dst = VAROP(iptr->dst);
282 if ((src->vv.regoff != dst->vv.regoff) ||
283 ((src->flags ^ dst->flags) & INMEMORY)) {
285 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
286 /* emit nothing, as the value won't be used anyway */
290 /* If one of the variables resides in memory, we can eliminate
291 the register move from/to the temporary register with the
292 order of getting the destination register and the load. */
294 if (IS_INMEMORY(src->flags)) {
295 if (IS_LNG_TYPE(src->type))
296 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
300 s1 = emit_load(jd, iptr, src, d);
303 if (IS_LNG_TYPE(src->type))
304 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
306 s1 = emit_load(jd, iptr, src, REG_ITMP1);
308 d = codegen_reg_of_var(iptr->opc, dst, s1);
325 vm_abort("emit_copy: unknown type %d", src->type);
329 emit_store(jd, iptr, dst, d);
334 /* emit_branch *****************************************************************
336 Emits the code for conditional and unconditional branchs.
338 *******************************************************************************/
340 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
344 /* ATTENTION: a displacement overflow cannot happen */
346 /* check which branch to generate */
348 if (condition == BRANCH_UNCONDITIONAL) {
350 /* calculate the different displacements */
352 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
354 M_JMP_IMM(branchdisp);
357 /* calculate the different displacements */
359 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
393 vm_abort("emit_branch: unknown condition %d", condition);
399 /* emit_arithmetic_check *******************************************************
401 Emit an ArithmeticException check.
403 *******************************************************************************/
405 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
407 if (INSTRUCTION_MUST_CHECK(iptr)) {
410 M_ALD_MEM(reg, TRAP_ArithmeticException);
415 /* emit_arrayindexoutofbounds_check ********************************************
417 Emit a ArrayIndexOutOfBoundsException check.
419 *******************************************************************************/
421 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
423 if (INSTRUCTION_MUST_CHECK(iptr)) {
424 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
425 M_CMP(REG_ITMP3, s2);
427 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
432 /* emit_arraystore_check *******************************************************
434 Emit an ArrayStoreException check.
436 *******************************************************************************/
438 void emit_arraystore_check(codegendata *cd, instruction *iptr)
440 if (INSTRUCTION_MUST_CHECK(iptr)) {
443 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
448 /* emit_classcast_check ********************************************************
450 Emit a ClassCastException check.
452 *******************************************************************************/
454 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
456 if (INSTRUCTION_MUST_CHECK(iptr)) {
474 vm_abort("emit_classcast_check: unknown condition %d", condition);
476 M_ALD_MEM(s1, TRAP_ClassCastException);
481 /* emit_nullpointer_check ******************************************************
483 Emit a NullPointerException check.
485 *******************************************************************************/
487 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
489 if (INSTRUCTION_MUST_CHECK(iptr)) {
492 M_ALD_MEM(reg, TRAP_NullPointerException);
497 /* emit_exception_check ********************************************************
499 Emit an Exception check.
501 *******************************************************************************/
503 void emit_exception_check(codegendata *cd, instruction *iptr)
505 if (INSTRUCTION_MUST_CHECK(iptr)) {
508 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
513 /* emit_trap_compiler **********************************************************
515 Emit a trap instruction which calls the JIT compiler.
517 *******************************************************************************/
519 void emit_trap_compiler(codegendata *cd)
521 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
524 /* emit_trap_countdown *********************************************************
526 Emit a countdown trap.
528 counter....absolute address of the counter variable
530 *******************************************************************************/
532 void emit_trap_countdown(codegendata *cd, s4 *counter)
534 M_ISUB_IMM_MEMABS(1, (s4) counter);
536 M_ALD_MEM(REG_METHODPTR, TRAP_COUNTDOWN);
539 /* emit_trap *******************************************************************
541 Emit a trap instruction and return the original machine code.
543 *******************************************************************************/
545 uint32_t emit_trap(codegendata *cd)
549 /* Get machine code which is patched back in later. The
550 trap is 2 bytes long. */
552 mcode = *((uint16_t *) cd->mcodeptr);
555 /* XXX this breaks GDB, so we disable it for now */
556 *(cd->mcodeptr++) = 0xcc;
562 return (uint32_t) mcode;
566 /* emit_verbosecall_enter ******************************************************
568 Generates the code for the call trace.
570 *******************************************************************************/
573 void emit_verbosecall_enter(jitdata *jd)
580 int32_t stackframesize;
582 int align_off; /* offset for alignment compensation */
584 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
587 /* get required compiler data */
596 /* mark trace code */
600 /* keep stack 16-byte aligned */
602 stackframesize = 2 + TMP_CNT;
603 ALIGN_2(stackframesize);
605 M_ASUB_IMM(stackframesize * 8, REG_SP);
607 /* save temporary registers for leaf methods */
609 if (code_is_leafmethod(code)) {
610 for (i = 0; i < INT_TMP_CNT; i++)
611 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
614 /* no argument registers to save */
616 align_off = cd->stackframesize ? 4 : 0;
617 M_AST_IMM(m, REG_SP, 0 * 4);
618 M_AST_IMM(0, REG_SP, 1 * 4);
619 M_AST(REG_SP, REG_SP, 2 * 4);
620 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
621 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
624 /* no argument registers to restore */
626 /* restore temporary registers for leaf methods */
628 if (code_is_leafmethod(code)) {
629 for (i = 0; i < INT_TMP_CNT; i++)
630 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
633 M_AADD_IMM(stackframesize * 8, REG_SP);
635 /* mark trace code */
639 #endif /* !defined(NDEBUG) */
642 /* emit_verbosecall_exit *******************************************************
644 Generates the code for the call trace.
646 *******************************************************************************/
649 void emit_verbosecall_exit(jitdata *jd)
656 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
659 /* get required compiler data */
667 /* mark trace code */
671 /* keep stack 16-byte aligned */
673 M_ASUB_IMM(4 + 4 + 8, REG_SP);
675 /* save return value */
677 switch (md->returntype.type) {
680 M_IST(REG_RESULT, REG_SP, 2 * 4);
683 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
686 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
689 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
693 M_AST_IMM(m, REG_SP, 0 * 4);
694 M_AST(REG_SP, REG_SP, 1 * 4);
695 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
696 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
699 /* restore return value */
701 switch (md->returntype.type) {
704 M_ILD(REG_RESULT, REG_SP, 2 * 4);
707 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
711 M_AADD_IMM(4 + 4 + 8, REG_SP);
713 /* mark trace code */
717 #endif /* !defined(NDEBUG) */
720 /* code generation functions **************************************************/
722 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
724 if (basereg == ESP) {
726 emit_address_byte(0, dreg, ESP);
727 emit_address_byte(0, ESP, ESP);
729 else if (IS_IMM8(disp)) {
730 emit_address_byte(1, dreg, ESP);
731 emit_address_byte(0, ESP, ESP);
735 emit_address_byte(2, dreg, ESP);
736 emit_address_byte(0, ESP, ESP);
740 else if ((disp == 0) && (basereg != EBP)) {
741 emit_address_byte(0, dreg, basereg);
743 else if (IS_IMM8(disp)) {
744 emit_address_byte(1, dreg, basereg);
748 emit_address_byte(2, dreg, basereg);
754 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
756 if (basereg == ESP) {
757 emit_address_byte(2, dreg, ESP);
758 emit_address_byte(0, ESP, ESP);
762 emit_address_byte(2, dreg, basereg);
768 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
771 emit_address_byte(0, reg, 4);
772 emit_address_byte(scale, indexreg, 5);
775 else if ((disp == 0) && (basereg != EBP)) {
776 emit_address_byte(0, reg, 4);
777 emit_address_byte(scale, indexreg, basereg);
779 else if (IS_IMM8(disp)) {
780 emit_address_byte(1, reg, 4);
781 emit_address_byte(scale, indexreg, basereg);
785 emit_address_byte(2, reg, 4);
786 emit_address_byte(scale, indexreg, basereg);
792 /* low-level code emitter functions *******************************************/
794 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
796 COUNT(count_mov_reg_reg);
797 *(cd->mcodeptr++) = 0x89;
798 emit_reg((reg),(dreg));
802 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
804 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
809 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
811 *(cd->mcodeptr++) = 0xc6;
817 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
819 COUNT(count_mov_mem_reg);
820 *(cd->mcodeptr++) = 0x8b;
821 emit_membase(cd, (basereg),(disp),(reg));
826 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
827 * constant membase immediate length of 32bit
829 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
831 COUNT(count_mov_mem_reg);
832 *(cd->mcodeptr++) = 0x8b;
833 emit_membase32(cd, (basereg),(disp),(reg));
837 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
839 COUNT(count_mov_reg_mem);
840 *(cd->mcodeptr++) = 0x89;
841 emit_membase(cd, (basereg),(disp),(reg));
845 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
847 COUNT(count_mov_reg_mem);
848 *(cd->mcodeptr++) = 0x89;
849 emit_membase32(cd, (basereg),(disp),(reg));
853 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
855 COUNT(count_mov_mem_reg);
856 *(cd->mcodeptr++) = 0x8b;
857 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
861 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
863 COUNT(count_mov_reg_mem);
864 *(cd->mcodeptr++) = 0x89;
865 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
869 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
871 COUNT(count_mov_reg_mem);
872 *(cd->mcodeptr++) = 0x66;
873 *(cd->mcodeptr++) = 0x89;
874 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
878 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
880 COUNT(count_mov_reg_mem);
881 *(cd->mcodeptr++) = 0x88;
882 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
886 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
888 COUNT(count_mov_reg_mem);
889 *(cd->mcodeptr++) = 0x89;
890 emit_mem((reg),(mem));
894 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
896 COUNT(count_mov_mem_reg);
897 *(cd->mcodeptr++) = 0x8b;
898 emit_mem((dreg),(mem));
902 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
904 *(cd->mcodeptr++) = 0xc7;
910 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
912 *(cd->mcodeptr++) = 0xc7;
913 emit_membase(cd, (basereg),(disp),0);
918 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
920 *(cd->mcodeptr++) = 0xc7;
921 emit_membase32(cd, (basereg),(disp),0);
926 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
928 *(cd->mcodeptr++) = 0xc6;
929 emit_membase(cd, (basereg),(disp),0);
934 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
936 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
937 *(cd->mcodeptr++) = 0x0f;
938 *(cd->mcodeptr++) = 0xbe;
943 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
945 COUNT(count_mov_mem_reg);
946 *(cd->mcodeptr++) = 0x0f;
947 *(cd->mcodeptr++) = 0xbe;
948 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
952 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
954 *(cd->mcodeptr++) = 0x0f;
955 *(cd->mcodeptr++) = 0xbf;
960 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
962 COUNT(count_mov_mem_reg);
963 *(cd->mcodeptr++) = 0x0f;
964 *(cd->mcodeptr++) = 0xbf;
965 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
969 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
971 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
972 *(cd->mcodeptr++) = 0x0f;
973 *(cd->mcodeptr++) = 0xb6;
978 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
980 *(cd->mcodeptr++) = 0x0f;
981 *(cd->mcodeptr++) = 0xb7;
986 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
988 COUNT(count_mov_mem_reg);
989 *(cd->mcodeptr++) = 0x0f;
990 *(cd->mcodeptr++) = 0xb7;
991 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
995 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
997 *(cd->mcodeptr++) = 0xc7;
998 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1003 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1005 *(cd->mcodeptr++) = 0x66;
1006 *(cd->mcodeptr++) = 0xc7;
1007 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1012 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1014 *(cd->mcodeptr++) = 0xc6;
1015 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1023 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1025 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1026 emit_reg((reg),(dreg));
1030 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1032 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1033 emit_membase(cd, (basereg),(disp),(reg));
1037 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1039 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1040 emit_membase(cd, (basereg),(disp),(reg));
1044 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1047 *(cd->mcodeptr++) = 0x83;
1048 emit_reg((opc),(dreg));
1051 *(cd->mcodeptr++) = 0x81;
1052 emit_reg((opc),(dreg));
1058 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1060 *(cd->mcodeptr++) = 0x81;
1061 emit_reg((opc),(dreg));
1066 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1069 *(cd->mcodeptr++) = 0x83;
1070 emit_membase(cd, (basereg),(disp),(opc));
1073 *(cd->mcodeptr++) = 0x81;
1074 emit_membase(cd, (basereg),(disp),(opc));
1080 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1083 *(cd->mcodeptr++) = 0x83;
1084 emit_mem(opc, disp);
1087 *(cd->mcodeptr++) = 0x81;
1088 emit_mem(opc, disp);
1093 void emit_alu_memindex_reg(codegendata *cd, s4 opc, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1095 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1096 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1099 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1101 *(cd->mcodeptr++) = 0x85;
1102 emit_reg((reg),(dreg));
1106 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1108 *(cd->mcodeptr++) = 0xf7;
1116 * inc, dec operations
1118 void emit_inc_reg(codegendata *cd, s4 reg)
1120 *(cd->mcodeptr++) = 0xff;
1124 void emit_dec_mem(codegendata *cd, s4 mem)
1126 *(cd->mcodeptr++) = 0xff;
1131 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1133 *(cd->mcodeptr++) = 0x0f;
1134 *(cd->mcodeptr++) = 0xaf;
1135 emit_reg((dreg),(reg));
1139 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1141 *(cd->mcodeptr++) = 0x0f;
1142 *(cd->mcodeptr++) = 0xaf;
1143 emit_membase(cd, (basereg),(disp),(dreg));
1147 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1149 if (IS_IMM8((imm))) {
1150 *(cd->mcodeptr++) = 0x6b;
1154 *(cd->mcodeptr++) = 0x69;
1161 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1163 if (IS_IMM8((imm))) {
1164 *(cd->mcodeptr++) = 0x6b;
1165 emit_reg((dreg),(reg));
1168 *(cd->mcodeptr++) = 0x69;
1169 emit_reg((dreg),(reg));
1175 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1177 if (IS_IMM8((imm))) {
1178 *(cd->mcodeptr++) = 0x6b;
1179 emit_membase(cd, (basereg),(disp),(dreg));
1182 *(cd->mcodeptr++) = 0x69;
1183 emit_membase(cd, (basereg),(disp),(dreg));
1189 void emit_mul_reg(codegendata *cd, s4 reg)
1191 *(cd->mcodeptr++) = 0xf7;
1196 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1198 *(cd->mcodeptr++) = 0xf7;
1199 emit_membase(cd, (basereg),(disp),4);
1203 void emit_idiv_reg(codegendata *cd, s4 reg)
1205 *(cd->mcodeptr++) = 0xf7;
1214 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1216 *(cd->mcodeptr++) = 0xd3;
1217 emit_reg((opc),(reg));
1221 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1224 *(cd->mcodeptr++) = 0xd1;
1225 emit_reg((opc),(dreg));
1227 *(cd->mcodeptr++) = 0xc1;
1228 emit_reg((opc),(dreg));
1234 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1236 *(cd->mcodeptr++) = 0x0f;
1237 *(cd->mcodeptr++) = 0xa5;
1238 emit_reg((reg),(dreg));
1242 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1244 *(cd->mcodeptr++) = 0x0f;
1245 *(cd->mcodeptr++) = 0xa4;
1246 emit_reg((reg),(dreg));
1251 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1253 *(cd->mcodeptr++) = 0x0f;
1254 *(cd->mcodeptr++) = 0xa5;
1255 emit_membase(cd, (basereg),(disp),(reg));
1259 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1261 *(cd->mcodeptr++) = 0x0f;
1262 *(cd->mcodeptr++) = 0xad;
1263 emit_reg((reg),(dreg));
1267 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1269 *(cd->mcodeptr++) = 0x0f;
1270 *(cd->mcodeptr++) = 0xac;
1271 emit_reg((reg),(dreg));
1276 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1278 *(cd->mcodeptr++) = 0x0f;
1279 *(cd->mcodeptr++) = 0xad;
1280 emit_membase(cd, (basereg),(disp),(reg));
1288 void emit_jmp_imm(codegendata *cd, s4 imm)
1290 *(cd->mcodeptr++) = 0xe9;
1295 void emit_jmp_reg(codegendata *cd, s4 reg)
1297 *(cd->mcodeptr++) = 0xff;
1302 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1304 *(cd->mcodeptr++) = 0x0f;
1305 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1312 * conditional set operations
1314 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1316 *(cd->mcodeptr++) = 0x0f;
1317 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1322 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1324 *(cd->mcodeptr++) = 0x0f;
1325 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1326 emit_membase(cd, (basereg),(disp),0);
1330 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1332 *(cd->mcodeptr++) = 0x0f;
1333 *(cd->mcodeptr++) = 0xc1;
1334 emit_mem((reg),(mem));
1338 void emit_neg_reg(codegendata *cd, s4 reg)
1340 *(cd->mcodeptr++) = 0xf7;
1346 void emit_push_imm(codegendata *cd, s4 imm)
1348 *(cd->mcodeptr++) = 0x68;
1353 void emit_pop_reg(codegendata *cd, s4 reg)
1355 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1359 void emit_push_reg(codegendata *cd, s4 reg)
1361 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1365 void emit_lock(codegendata *cd)
1367 *(cd->mcodeptr++) = 0xf0;
1374 void emit_call_reg(codegendata *cd, s4 reg)
1376 *(cd->mcodeptr++) = 0xff;
1381 void emit_call_imm(codegendata *cd, s4 imm)
1383 *(cd->mcodeptr++) = 0xe8;
1390 * floating point instructions
1392 void emit_fld1(codegendata *cd)
1394 *(cd->mcodeptr++) = 0xd9;
1395 *(cd->mcodeptr++) = 0xe8;
1399 void emit_fldz(codegendata *cd)
1401 *(cd->mcodeptr++) = 0xd9;
1402 *(cd->mcodeptr++) = 0xee;
1406 void emit_fld_reg(codegendata *cd, s4 reg)
1408 *(cd->mcodeptr++) = 0xd9;
1409 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1413 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1415 *(cd->mcodeptr++) = 0xd9;
1416 emit_membase(cd, (basereg),(disp),0);
1420 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1422 *(cd->mcodeptr++) = 0xd9;
1423 emit_membase32(cd, (basereg),(disp),0);
1427 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1429 *(cd->mcodeptr++) = 0xdd;
1430 emit_membase(cd, (basereg),(disp),0);
1434 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1436 *(cd->mcodeptr++) = 0xdd;
1437 emit_membase32(cd, (basereg),(disp),0);
1441 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1443 *(cd->mcodeptr++) = 0xdb;
1444 emit_membase(cd, (basereg),(disp),5);
1448 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1450 *(cd->mcodeptr++) = 0xd9;
1451 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1455 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1457 *(cd->mcodeptr++) = 0xdd;
1458 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1462 void emit_flds_mem(codegendata *cd, s4 mem)
1464 *(cd->mcodeptr++) = 0xd9;
1469 void emit_fldl_mem(codegendata *cd, s4 mem)
1471 *(cd->mcodeptr++) = 0xdd;
1476 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1478 *(cd->mcodeptr++) = 0xdb;
1479 emit_membase(cd, (basereg),(disp),0);
1483 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1485 *(cd->mcodeptr++) = 0xdf;
1486 emit_membase(cd, (basereg),(disp),5);
1490 void emit_fst_reg(codegendata *cd, s4 reg)
1492 *(cd->mcodeptr++) = 0xdd;
1493 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1497 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1499 *(cd->mcodeptr++) = 0xd9;
1500 emit_membase(cd, (basereg),(disp),2);
1504 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1506 *(cd->mcodeptr++) = 0xdd;
1507 emit_membase(cd, (basereg),(disp),2);
1511 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1513 *(cd->mcodeptr++) = 0xd9;
1514 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1518 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1520 *(cd->mcodeptr++) = 0xdd;
1521 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1525 void emit_fstp_reg(codegendata *cd, s4 reg)
1527 *(cd->mcodeptr++) = 0xdd;
1528 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1532 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1534 *(cd->mcodeptr++) = 0xd9;
1535 emit_membase(cd, (basereg),(disp),3);
1539 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1541 *(cd->mcodeptr++) = 0xd9;
1542 emit_membase32(cd, (basereg),(disp),3);
1546 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1548 *(cd->mcodeptr++) = 0xdd;
1549 emit_membase(cd, (basereg),(disp),3);
1553 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1555 *(cd->mcodeptr++) = 0xdd;
1556 emit_membase32(cd, (basereg),(disp),3);
1560 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1562 *(cd->mcodeptr++) = 0xdb;
1563 emit_membase(cd, (basereg),(disp),7);
1567 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1569 *(cd->mcodeptr++) = 0xd9;
1570 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1574 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1576 *(cd->mcodeptr++) = 0xdd;
1577 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1581 void emit_fstps_mem(codegendata *cd, s4 mem)
1583 *(cd->mcodeptr++) = 0xd9;
1588 void emit_fstpl_mem(codegendata *cd, s4 mem)
1590 *(cd->mcodeptr++) = 0xdd;
1595 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1597 *(cd->mcodeptr++) = 0xdb;
1598 emit_membase(cd, (basereg),(disp),2);
1602 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1604 *(cd->mcodeptr++) = 0xdb;
1605 emit_membase(cd, (basereg),(disp),3);
1609 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1611 *(cd->mcodeptr++) = 0xdf;
1612 emit_membase(cd, (basereg),(disp),7);
1616 void emit_fchs(codegendata *cd)
1618 *(cd->mcodeptr++) = 0xd9;
1619 *(cd->mcodeptr++) = 0xe0;
1623 void emit_faddp(codegendata *cd)
1625 *(cd->mcodeptr++) = 0xde;
1626 *(cd->mcodeptr++) = 0xc1;
1630 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1632 *(cd->mcodeptr++) = 0xd8;
1633 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1637 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1639 *(cd->mcodeptr++) = 0xdc;
1640 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1644 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1646 *(cd->mcodeptr++) = 0xde;
1647 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1651 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1653 *(cd->mcodeptr++) = 0xd8;
1654 emit_membase(cd, (basereg),(disp),0);
1658 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1660 *(cd->mcodeptr++) = 0xdc;
1661 emit_membase(cd, (basereg),(disp),0);
1665 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1667 *(cd->mcodeptr++) = 0xd8;
1668 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1672 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1674 *(cd->mcodeptr++) = 0xdc;
1675 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1679 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1681 *(cd->mcodeptr++) = 0xde;
1682 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1686 void emit_fsubp(codegendata *cd)
1688 *(cd->mcodeptr++) = 0xde;
1689 *(cd->mcodeptr++) = 0xe9;
1693 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1695 *(cd->mcodeptr++) = 0xd8;
1696 emit_membase(cd, (basereg),(disp),4);
1700 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1702 *(cd->mcodeptr++) = 0xdc;
1703 emit_membase(cd, (basereg),(disp),4);
1707 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1709 *(cd->mcodeptr++) = 0xd8;
1710 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1714 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1716 *(cd->mcodeptr++) = 0xdc;
1717 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1721 void emit_fmulp(codegendata *cd)
1723 *(cd->mcodeptr++) = 0xde;
1724 *(cd->mcodeptr++) = 0xc9;
1728 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1730 *(cd->mcodeptr++) = 0xde;
1731 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1735 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1737 *(cd->mcodeptr++) = 0xd8;
1738 emit_membase(cd, (basereg),(disp),1);
1742 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1744 *(cd->mcodeptr++) = 0xdc;
1745 emit_membase(cd, (basereg),(disp),1);
1749 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1751 *(cd->mcodeptr++) = 0xd8;
1752 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1756 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1758 *(cd->mcodeptr++) = 0xdc;
1759 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1763 void emit_fdivp(codegendata *cd)
1765 *(cd->mcodeptr++) = 0xde;
1766 *(cd->mcodeptr++) = 0xf9;
1770 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1772 *(cd->mcodeptr++) = 0xde;
1773 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1777 void emit_fxch(codegendata *cd)
1779 *(cd->mcodeptr++) = 0xd9;
1780 *(cd->mcodeptr++) = 0xc9;
1784 void emit_fxch_reg(codegendata *cd, s4 reg)
1786 *(cd->mcodeptr++) = 0xd9;
1787 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1791 void emit_fprem(codegendata *cd)
1793 *(cd->mcodeptr++) = 0xd9;
1794 *(cd->mcodeptr++) = 0xf8;
1798 void emit_fprem1(codegendata *cd)
1800 *(cd->mcodeptr++) = 0xd9;
1801 *(cd->mcodeptr++) = 0xf5;
1805 void emit_fucom(codegendata *cd)
1807 *(cd->mcodeptr++) = 0xdd;
1808 *(cd->mcodeptr++) = 0xe1;
1812 void emit_fucom_reg(codegendata *cd, s4 reg)
1814 *(cd->mcodeptr++) = 0xdd;
1815 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1819 void emit_fucomp_reg(codegendata *cd, s4 reg)
1821 *(cd->mcodeptr++) = 0xdd;
1822 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1826 void emit_fucompp(codegendata *cd)
1828 *(cd->mcodeptr++) = 0xda;
1829 *(cd->mcodeptr++) = 0xe9;
1833 void emit_fnstsw(codegendata *cd)
1835 *(cd->mcodeptr++) = 0xdf;
1836 *(cd->mcodeptr++) = 0xe0;
1840 void emit_sahf(codegendata *cd)
1842 *(cd->mcodeptr++) = 0x9e;
1846 void emit_finit(codegendata *cd)
1848 *(cd->mcodeptr++) = 0x9b;
1849 *(cd->mcodeptr++) = 0xdb;
1850 *(cd->mcodeptr++) = 0xe3;
1854 void emit_fldcw_mem(codegendata *cd, s4 mem)
1856 *(cd->mcodeptr++) = 0xd9;
1861 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1863 *(cd->mcodeptr++) = 0xd9;
1864 emit_membase(cd, (basereg),(disp),5);
1868 void emit_wait(codegendata *cd)
1870 *(cd->mcodeptr++) = 0x9b;
1874 void emit_ffree_reg(codegendata *cd, s4 reg)
1876 *(cd->mcodeptr++) = 0xdd;
1877 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1881 void emit_fdecstp(codegendata *cd)
1883 *(cd->mcodeptr++) = 0xd9;
1884 *(cd->mcodeptr++) = 0xf6;
1888 void emit_fincstp(codegendata *cd)
1890 *(cd->mcodeptr++) = 0xd9;
1891 *(cd->mcodeptr++) = 0xf7;
1894 #if defined(ENABLE_ESCAPE_CHECK)
1895 void emit_escape_check(codegendata *cd, s4 reg) {
1897 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1899 M_IADD_IMM(4, REG_SP);
1904 * These are local overrides for various environment variables in Emacs.
1905 * Please do not remove this and leave it at the end of the file, where
1906 * Emacs will automagically detect them.
1907 * ---------------------------------------------------------------------
1910 * indent-tabs-mode: t