1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 7483 2007-03-08 13:17:40Z michi $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/dseg.h"
50 #include "vm/jit/emit-common.h"
51 #include "vm/jit/jit.h"
52 #include "vm/jit/replace.h"
54 #include "vmcore/options.h"
55 #include "vmcore/statistics.h"
58 /* emit_load ******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (IS_INMEMORY(src->flags)) {
77 disp = src->vv.regoff * 4;
79 if (IS_FLT_DBL_TYPE(src->type)) {
80 if (IS_2_WORD_TYPE(src->type))
81 M_DLD(tempreg, REG_SP, disp);
83 M_FLD(tempreg, REG_SP, disp);
86 if (IS_2_WORD_TYPE(src->type))
87 M_LLD(tempreg, REG_SP, disp);
89 M_ILD(tempreg, REG_SP, disp);
101 /* emit_load_low ************************************************************
103 Emits a possible load of the low 32-bits of an operand.
105 *******************************************************************************/
107 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
113 assert(src->type == TYPE_LNG);
115 /* get required compiler data */
120 if (IS_INMEMORY(src->flags)) {
123 disp = src->vv.regoff * 4;
125 M_ILD(tempreg, REG_SP, disp);
130 reg = GET_LOW_REG(src->vv.regoff);
136 /* emit_load_high ***********************************************************
138 Emits a possible load of the high 32-bits of an operand.
140 *******************************************************************************/
142 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
148 /* get required compiler data */
150 assert(src->type == TYPE_LNG);
154 if (IS_INMEMORY(src->flags)) {
157 disp = src->vv.regoff * 4;
159 M_ILD(tempreg, REG_SP, disp + 4);
164 reg = GET_HIGH_REG(src->vv.regoff);
170 /* emit_store ******************************************************************
172 Emits a possible store of the destination operand.
174 *******************************************************************************/
176 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
180 /* get required compiler data */
184 if (IS_INMEMORY(dst->flags)) {
187 if (IS_FLT_DBL_TYPE(dst->type)) {
188 if (IS_2_WORD_TYPE(dst->type))
189 M_DST(d, REG_SP, dst->vv.regoff * 4);
191 M_FST(d, REG_SP, dst->vv.regoff * 4);
194 if (IS_2_WORD_TYPE(dst->type))
195 M_LST(d, REG_SP, dst->vv.regoff * 4);
197 M_IST(d, REG_SP, dst->vv.regoff * 4);
203 /* emit_store_low **************************************************************
205 Emits a possible store of the low 32-bits of the destination
208 *******************************************************************************/
210 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
214 assert(dst->type == TYPE_LNG);
216 /* get required compiler data */
220 if (IS_INMEMORY(dst->flags)) {
222 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
227 /* emit_store_high *************************************************************
229 Emits a possible store of the high 32-bits of the destination
232 *******************************************************************************/
234 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
238 assert(dst->type == TYPE_LNG);
240 /* get required compiler data */
244 if (IS_INMEMORY(dst->flags)) {
246 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
251 /* emit_copy *******************************************************************
253 Generates a register/memory to register/memory copy.
255 *******************************************************************************/
257 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
262 /* get required compiler data */
266 if ((src->vv.regoff != dst->vv.regoff) ||
267 ((src->flags ^ dst->flags) & INMEMORY)) {
269 /* If one of the variables resides in memory, we can eliminate
270 the register move from/to the temporary register with the
271 order of getting the destination register and the load. */
273 if (IS_INMEMORY(src->flags)) {
274 if (IS_LNG_TYPE(src->type))
275 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
277 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
279 s1 = emit_load(jd, iptr, src, d);
282 if (IS_LNG_TYPE(src->type))
283 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
285 s1 = emit_load(jd, iptr, src, REG_ITMP1);
287 d = codegen_reg_of_var(iptr->opc, dst, s1);
291 if (IS_FLT_DBL_TYPE(src->type)) {
294 if (IS_2_WORD_TYPE(src->type))
301 emit_store(jd, iptr, dst, d);
306 /* emit_arithmetic_check *******************************************************
308 Emit an ArithmeticException check.
310 *******************************************************************************/
312 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
314 if (INSTRUCTION_MUST_CHECK(iptr)) {
317 codegen_add_arithmeticexception_ref(cd);
322 /* emit_arrayindexoutofbounds_check ********************************************
324 Emit a ArrayIndexOutOfBoundsException check.
326 *******************************************************************************/
328 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
330 if (INSTRUCTION_MUST_CHECK(iptr)) {
331 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
332 M_CMP(REG_ITMP3, s2);
334 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
339 /* emit_classcast_check ********************************************************
341 Emit a ClassCastException check.
343 *******************************************************************************/
345 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
347 vm_abort("IMPLEMENT ME!");
351 /* emit_nullpointer_check ******************************************************
353 Emit a NullPointerException check.
355 *******************************************************************************/
357 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
359 if (INSTRUCTION_MUST_CHECK(iptr)) {
362 codegen_add_nullpointerexception_ref(cd);
367 /* emit_exception_stubs ********************************************************
369 Generates the code for the exception stubs.
371 *******************************************************************************/
373 void emit_exception_stubs(jitdata *jd)
382 /* get required compiler data */
387 /* generate exception stubs */
391 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
392 /* back-patch the branch to this exception code */
394 branchmpc = er->branchpos;
395 targetmpc = cd->mcodeptr - cd->mcodebase;
397 md_codegen_patch_branch(cd, branchmpc, targetmpc);
401 /* Check if the exception is an
402 ArrayIndexOutOfBoundsException. If so, move index register
406 M_INTMOVE(er->reg, REG_ITMP1);
408 /* calcuate exception address */
410 M_MOV_IMM(0, REG_ITMP2_XPC);
412 M_AADD_IMM32(er->branchpos - 6, REG_ITMP2_XPC);
414 /* move function to call into REG_ITMP3 */
416 M_MOV_IMM(er->function, REG_ITMP3);
418 if (targetdisp == 0) {
419 targetdisp = cd->mcodeptr - cd->mcodebase;
421 M_ASUB_IMM(5 * 4, REG_SP);
423 /* first store REG_ITMP1 so we can use it */
425 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
427 M_AST_IMM(0, REG_SP, 0 * 4);
429 M_MOV(REG_SP, REG_ITMP1);
430 M_AADD_IMM(5 * 4, REG_ITMP1);
431 M_AST(REG_ITMP1, REG_SP, 1 * 4);
432 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
433 M_AST(REG_ITMP1, REG_SP, 2 * 4);
434 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
438 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
439 M_AADD_IMM(5 * 4, REG_SP);
441 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
445 M_JMP_IMM((cd->mcodebase + targetdisp) -
446 (cd->mcodeptr + PATCHER_CALL_SIZE));
452 /* emit_patcher_stubs **********************************************************
454 Generates the code for the patcher stubs.
456 *******************************************************************************/
458 void emit_patcher_stubs(jitdata *jd)
468 /* get required compiler data */
472 /* generate code patching stub call code */
476 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
477 /* check code segment size */
481 /* Get machine code which is patched back in later. A
482 `call rel32' is 5 bytes long. */
484 savedmcodeptr = cd->mcodebase + pref->branchpos;
485 mcode = *((u8 *) savedmcodeptr);
487 /* patch in `call rel32' to call the following code */
489 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
490 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
492 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
494 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
500 /* move pointer to java_objectheader onto stack */
502 #if defined(ENABLE_THREADS)
503 (void) dseg_add_unique_address(cd, NULL); /* flcword */
504 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
505 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
507 M_MOV_IMM(0, REG_ITMP3);
509 M_AADD_IMM(disp, REG_ITMP3);
515 /* move machine code bytes and classinfo pointer into registers */
517 M_PUSH_IMM(mcode >> 32);
519 M_PUSH_IMM(pref->ref);
520 M_PUSH_IMM(pref->patcher);
522 if (targetdisp == 0) {
523 targetdisp = cd->mcodeptr - cd->mcodebase;
525 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
529 M_JMP_IMM((cd->mcodebase + targetdisp) -
530 (cd->mcodeptr + PATCHER_CALL_SIZE));
536 /* emit_replacement_stubs ******************************************************
538 Generates the code for the replacement stubs.
540 *******************************************************************************/
542 #if defined(ENABLE_REPLACEMENT)
543 void emit_replacement_stubs(jitdata *jd)
553 /* get required compiler data */
558 rplp = code->rplpoints;
560 /* store beginning of replacement stubs */
562 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
564 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
565 /* do not generate stubs for non-trappable points */
567 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
570 /* check code segment size */
574 /* note start of stub code */
576 outcode = (s4) (cd->mcodeptr - cd->mcodebase);
578 /* push address of `rplpoint` struct */
582 /* jump to replacement function */
584 M_PUSH_IMM(asm_replacement_out);
587 /* add jump reference for COUNTDOWN points */
589 if (rplp->flags & RPLPOINT_FLAG_COUNTDOWN) {
591 branchmpc = (s4)rplp->pc + (7 + 6);
593 md_codegen_patch_branch(cd, branchmpc, (s4) outcode);
596 assert(((cd->mcodeptr - cd->mcodebase) - outcode) == REPLACEMENT_STUB_SIZE);
599 #endif /* defined(ENABLE_REPLACEMENT) */
602 /* emit_verbosecall_enter ******************************************************
604 Generates the code for the call trace.
606 *******************************************************************************/
609 void emit_verbosecall_enter(jitdata *jd)
618 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
621 /* get required compiler data */
629 /* mark trace code */
633 /* methodinfo* + arguments + return address */
635 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
636 cd->stackframesize * 4 + 4;
638 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
640 /* save temporary registers for leaf methods */
642 for (i = 0; i < INT_TMP_CNT; i++)
643 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
645 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
646 t = md->paramtypes[i].type;
648 if (IS_INT_LNG_TYPE(t)) {
649 if (IS_2_WORD_TYPE(t)) {
650 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
651 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
653 else if (IS_ADR_TYPE(t)) {
654 M_ALD(REG_ITMP1, REG_SP, disp);
655 M_AST(REG_ITMP1, REG_SP, i * 8);
656 M_IST_IMM(0, REG_SP, i * 8 + 4);
659 M_ILD(EAX, REG_SP, disp);
661 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
665 if (IS_2_WORD_TYPE(t)) {
666 M_DLD(REG_NULL, REG_SP, disp);
667 M_DST(REG_NULL, REG_SP, i * 8);
670 M_FLD(REG_NULL, REG_SP, disp);
671 M_FST(REG_NULL, REG_SP, i * 8);
672 M_IST_IMM(0, REG_SP, i * 8 + 4);
676 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
679 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
681 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
684 /* restore temporary registers for leaf methods */
686 for (i = 0; i < INT_TMP_CNT; i++)
687 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
689 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
691 /* mark trace code */
695 #endif /* !defined(NDEBUG) */
698 /* emit_verbosecall_exit *******************************************************
700 Generates the code for the call trace.
702 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
704 *******************************************************************************/
707 void emit_verbosecall_exit(jitdata *jd)
713 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
716 /* get required compiler data */
722 /* mark trace code */
726 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
728 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
730 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
731 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
733 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
735 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
738 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
740 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
742 /* mark trace code */
746 #endif /* !defined(NDEBUG) */
749 /* code generation functions **************************************************/
751 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
753 if (basereg == ESP) {
755 emit_address_byte(0, dreg, ESP);
756 emit_address_byte(0, ESP, ESP);
758 else if (IS_IMM8(disp)) {
759 emit_address_byte(1, dreg, ESP);
760 emit_address_byte(0, ESP, ESP);
764 emit_address_byte(2, dreg, ESP);
765 emit_address_byte(0, ESP, ESP);
769 else if ((disp == 0) && (basereg != EBP)) {
770 emit_address_byte(0, dreg, basereg);
772 else if (IS_IMM8(disp)) {
773 emit_address_byte(1, dreg, basereg);
777 emit_address_byte(2, dreg, basereg);
783 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
785 if (basereg == ESP) {
786 emit_address_byte(2, dreg, ESP);
787 emit_address_byte(0, ESP, ESP);
791 emit_address_byte(2, dreg, basereg);
797 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
800 emit_address_byte(0, reg, 4);
801 emit_address_byte(scale, indexreg, 5);
804 else if ((disp == 0) && (basereg != EBP)) {
805 emit_address_byte(0, reg, 4);
806 emit_address_byte(scale, indexreg, basereg);
808 else if (IS_IMM8(disp)) {
809 emit_address_byte(1, reg, 4);
810 emit_address_byte(scale, indexreg, basereg);
814 emit_address_byte(2, reg, 4);
815 emit_address_byte(scale, indexreg, basereg);
821 /* low-level code emitter functions *******************************************/
823 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
825 COUNT(count_mov_reg_reg);
826 *(cd->mcodeptr++) = 0x89;
827 emit_reg((reg),(dreg));
831 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
833 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
838 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
840 *(cd->mcodeptr++) = 0xc6;
846 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
848 COUNT(count_mov_mem_reg);
849 *(cd->mcodeptr++) = 0x8b;
850 emit_membase(cd, (basereg),(disp),(reg));
855 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
856 * constant membase immediate length of 32bit
858 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
860 COUNT(count_mov_mem_reg);
861 *(cd->mcodeptr++) = 0x8b;
862 emit_membase32(cd, (basereg),(disp),(reg));
866 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
868 COUNT(count_mov_reg_mem);
869 *(cd->mcodeptr++) = 0x89;
870 emit_membase(cd, (basereg),(disp),(reg));
874 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
876 COUNT(count_mov_reg_mem);
877 *(cd->mcodeptr++) = 0x89;
878 emit_membase32(cd, (basereg),(disp),(reg));
882 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
884 COUNT(count_mov_mem_reg);
885 *(cd->mcodeptr++) = 0x8b;
886 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
890 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
892 COUNT(count_mov_reg_mem);
893 *(cd->mcodeptr++) = 0x89;
894 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
898 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
900 COUNT(count_mov_reg_mem);
901 *(cd->mcodeptr++) = 0x66;
902 *(cd->mcodeptr++) = 0x89;
903 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
907 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
909 COUNT(count_mov_reg_mem);
910 *(cd->mcodeptr++) = 0x88;
911 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
915 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
917 COUNT(count_mov_reg_mem);
918 *(cd->mcodeptr++) = 0x89;
919 emit_mem((reg),(mem));
923 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
925 COUNT(count_mov_mem_reg);
926 *(cd->mcodeptr++) = 0x8b;
927 emit_mem((dreg),(mem));
931 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
933 *(cd->mcodeptr++) = 0xc7;
939 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
941 *(cd->mcodeptr++) = 0xc7;
942 emit_membase(cd, (basereg),(disp),0);
947 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
949 *(cd->mcodeptr++) = 0xc7;
950 emit_membase32(cd, (basereg),(disp),0);
955 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
957 *(cd->mcodeptr++) = 0xc6;
958 emit_membase(cd, (basereg),(disp),0);
963 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
965 COUNT(count_mov_mem_reg);
966 *(cd->mcodeptr++) = 0x0f;
967 *(cd->mcodeptr++) = 0xbe;
968 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
972 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
974 *(cd->mcodeptr++) = 0x0f;
975 *(cd->mcodeptr++) = 0xbf;
980 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
982 COUNT(count_mov_mem_reg);
983 *(cd->mcodeptr++) = 0x0f;
984 *(cd->mcodeptr++) = 0xbf;
985 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
989 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
991 *(cd->mcodeptr++) = 0x0f;
992 *(cd->mcodeptr++) = 0xb7;
997 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
999 COUNT(count_mov_mem_reg);
1000 *(cd->mcodeptr++) = 0x0f;
1001 *(cd->mcodeptr++) = 0xb7;
1002 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1006 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1008 *(cd->mcodeptr++) = 0xc7;
1009 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1014 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1016 *(cd->mcodeptr++) = 0x66;
1017 *(cd->mcodeptr++) = 0xc7;
1018 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1023 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1025 *(cd->mcodeptr++) = 0xc6;
1026 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1034 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1036 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1037 emit_reg((reg),(dreg));
1041 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1043 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1044 emit_membase(cd, (basereg),(disp),(reg));
1048 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1050 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1051 emit_membase(cd, (basereg),(disp),(reg));
1055 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1058 *(cd->mcodeptr++) = 0x83;
1059 emit_reg((opc),(dreg));
1062 *(cd->mcodeptr++) = 0x81;
1063 emit_reg((opc),(dreg));
1069 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1071 *(cd->mcodeptr++) = 0x81;
1072 emit_reg((opc),(dreg));
1077 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1080 *(cd->mcodeptr++) = 0x83;
1081 emit_membase(cd, (basereg),(disp),(opc));
1084 *(cd->mcodeptr++) = 0x81;
1085 emit_membase(cd, (basereg),(disp),(opc));
1091 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1094 *(cd->mcodeptr++) = 0x83;
1095 emit_mem(opc, disp);
1098 *(cd->mcodeptr++) = 0x81;
1099 emit_mem(opc, disp);
1105 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1107 *(cd->mcodeptr++) = 0x85;
1108 emit_reg((reg),(dreg));
1112 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1114 *(cd->mcodeptr++) = 0xf7;
1122 * inc, dec operations
1124 void emit_dec_mem(codegendata *cd, s4 mem)
1126 *(cd->mcodeptr++) = 0xff;
1131 void emit_cltd(codegendata *cd)
1133 *(cd->mcodeptr++) = 0x99;
1137 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1139 *(cd->mcodeptr++) = 0x0f;
1140 *(cd->mcodeptr++) = 0xaf;
1141 emit_reg((dreg),(reg));
1145 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1147 *(cd->mcodeptr++) = 0x0f;
1148 *(cd->mcodeptr++) = 0xaf;
1149 emit_membase(cd, (basereg),(disp),(dreg));
1153 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1155 if (IS_IMM8((imm))) {
1156 *(cd->mcodeptr++) = 0x6b;
1160 *(cd->mcodeptr++) = 0x69;
1167 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1169 if (IS_IMM8((imm))) {
1170 *(cd->mcodeptr++) = 0x6b;
1171 emit_reg((dreg),(reg));
1174 *(cd->mcodeptr++) = 0x69;
1175 emit_reg((dreg),(reg));
1181 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1183 if (IS_IMM8((imm))) {
1184 *(cd->mcodeptr++) = 0x6b;
1185 emit_membase(cd, (basereg),(disp),(dreg));
1188 *(cd->mcodeptr++) = 0x69;
1189 emit_membase(cd, (basereg),(disp),(dreg));
1195 void emit_mul_reg(codegendata *cd, s4 reg)
1197 *(cd->mcodeptr++) = 0xf7;
1202 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1204 *(cd->mcodeptr++) = 0xf7;
1205 emit_membase(cd, (basereg),(disp),4);
1209 void emit_idiv_reg(codegendata *cd, s4 reg)
1211 *(cd->mcodeptr++) = 0xf7;
1216 void emit_ret(codegendata *cd)
1218 *(cd->mcodeptr++) = 0xc3;
1226 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1228 *(cd->mcodeptr++) = 0xd3;
1229 emit_reg((opc),(reg));
1233 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1236 *(cd->mcodeptr++) = 0xd1;
1237 emit_reg((opc),(dreg));
1239 *(cd->mcodeptr++) = 0xc1;
1240 emit_reg((opc),(dreg));
1246 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1248 *(cd->mcodeptr++) = 0x0f;
1249 *(cd->mcodeptr++) = 0xa5;
1250 emit_reg((reg),(dreg));
1254 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1256 *(cd->mcodeptr++) = 0x0f;
1257 *(cd->mcodeptr++) = 0xa4;
1258 emit_reg((reg),(dreg));
1263 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1265 *(cd->mcodeptr++) = 0x0f;
1266 *(cd->mcodeptr++) = 0xa5;
1267 emit_membase(cd, (basereg),(disp),(reg));
1271 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1273 *(cd->mcodeptr++) = 0x0f;
1274 *(cd->mcodeptr++) = 0xad;
1275 emit_reg((reg),(dreg));
1279 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1281 *(cd->mcodeptr++) = 0x0f;
1282 *(cd->mcodeptr++) = 0xac;
1283 emit_reg((reg),(dreg));
1288 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1290 *(cd->mcodeptr++) = 0x0f;
1291 *(cd->mcodeptr++) = 0xad;
1292 emit_membase(cd, (basereg),(disp),(reg));
1300 void emit_jmp_imm(codegendata *cd, s4 imm)
1302 *(cd->mcodeptr++) = 0xe9;
1307 void emit_jmp_reg(codegendata *cd, s4 reg)
1309 *(cd->mcodeptr++) = 0xff;
1314 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1316 *(cd->mcodeptr++) = 0x0f;
1317 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1324 * conditional set operations
1326 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1328 *(cd->mcodeptr++) = 0x0f;
1329 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1334 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1336 *(cd->mcodeptr++) = 0x0f;
1337 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1338 emit_membase(cd, (basereg),(disp),0);
1342 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1344 *(cd->mcodeptr++) = 0x0f;
1345 *(cd->mcodeptr++) = 0xc1;
1346 emit_mem((reg),(mem));
1350 void emit_neg_reg(codegendata *cd, s4 reg)
1352 *(cd->mcodeptr++) = 0xf7;
1358 void emit_push_imm(codegendata *cd, s4 imm)
1360 *(cd->mcodeptr++) = 0x68;
1365 void emit_pop_reg(codegendata *cd, s4 reg)
1367 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1371 void emit_push_reg(codegendata *cd, s4 reg)
1373 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1377 void emit_nop(codegendata *cd)
1379 *(cd->mcodeptr++) = 0x90;
1383 void emit_lock(codegendata *cd)
1385 *(cd->mcodeptr++) = 0xf0;
1392 void emit_call_reg(codegendata *cd, s4 reg)
1394 *(cd->mcodeptr++) = 0xff;
1399 void emit_call_imm(codegendata *cd, s4 imm)
1401 *(cd->mcodeptr++) = 0xe8;
1408 * floating point instructions
1410 void emit_fld1(codegendata *cd)
1412 *(cd->mcodeptr++) = 0xd9;
1413 *(cd->mcodeptr++) = 0xe8;
1417 void emit_fldz(codegendata *cd)
1419 *(cd->mcodeptr++) = 0xd9;
1420 *(cd->mcodeptr++) = 0xee;
1424 void emit_fld_reg(codegendata *cd, s4 reg)
1426 *(cd->mcodeptr++) = 0xd9;
1427 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1431 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1433 *(cd->mcodeptr++) = 0xd9;
1434 emit_membase(cd, (basereg),(disp),0);
1438 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1440 *(cd->mcodeptr++) = 0xd9;
1441 emit_membase32(cd, (basereg),(disp),0);
1445 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1447 *(cd->mcodeptr++) = 0xdd;
1448 emit_membase(cd, (basereg),(disp),0);
1452 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1454 *(cd->mcodeptr++) = 0xdd;
1455 emit_membase32(cd, (basereg),(disp),0);
1459 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1461 *(cd->mcodeptr++) = 0xdb;
1462 emit_membase(cd, (basereg),(disp),5);
1466 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1468 *(cd->mcodeptr++) = 0xd9;
1469 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1473 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1475 *(cd->mcodeptr++) = 0xdd;
1476 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1480 void emit_flds_mem(codegendata *cd, s4 mem)
1482 *(cd->mcodeptr++) = 0xd9;
1487 void emit_fldl_mem(codegendata *cd, s4 mem)
1489 *(cd->mcodeptr++) = 0xdd;
1494 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1496 *(cd->mcodeptr++) = 0xdb;
1497 emit_membase(cd, (basereg),(disp),0);
1501 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1503 *(cd->mcodeptr++) = 0xdf;
1504 emit_membase(cd, (basereg),(disp),5);
1508 void emit_fst_reg(codegendata *cd, s4 reg)
1510 *(cd->mcodeptr++) = 0xdd;
1511 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1515 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1517 *(cd->mcodeptr++) = 0xd9;
1518 emit_membase(cd, (basereg),(disp),2);
1522 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1524 *(cd->mcodeptr++) = 0xdd;
1525 emit_membase(cd, (basereg),(disp),2);
1529 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1531 *(cd->mcodeptr++) = 0xd9;
1532 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1536 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1538 *(cd->mcodeptr++) = 0xdd;
1539 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1543 void emit_fstp_reg(codegendata *cd, s4 reg)
1545 *(cd->mcodeptr++) = 0xdd;
1546 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1550 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1552 *(cd->mcodeptr++) = 0xd9;
1553 emit_membase(cd, (basereg),(disp),3);
1557 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1559 *(cd->mcodeptr++) = 0xd9;
1560 emit_membase32(cd, (basereg),(disp),3);
1564 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1566 *(cd->mcodeptr++) = 0xdd;
1567 emit_membase(cd, (basereg),(disp),3);
1571 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1573 *(cd->mcodeptr++) = 0xdd;
1574 emit_membase32(cd, (basereg),(disp),3);
1578 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1580 *(cd->mcodeptr++) = 0xdb;
1581 emit_membase(cd, (basereg),(disp),7);
1585 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1587 *(cd->mcodeptr++) = 0xd9;
1588 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1592 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1594 *(cd->mcodeptr++) = 0xdd;
1595 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1599 void emit_fstps_mem(codegendata *cd, s4 mem)
1601 *(cd->mcodeptr++) = 0xd9;
1606 void emit_fstpl_mem(codegendata *cd, s4 mem)
1608 *(cd->mcodeptr++) = 0xdd;
1613 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1615 *(cd->mcodeptr++) = 0xdb;
1616 emit_membase(cd, (basereg),(disp),2);
1620 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1622 *(cd->mcodeptr++) = 0xdb;
1623 emit_membase(cd, (basereg),(disp),3);
1627 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1629 *(cd->mcodeptr++) = 0xdf;
1630 emit_membase(cd, (basereg),(disp),7);
1634 void emit_fchs(codegendata *cd)
1636 *(cd->mcodeptr++) = 0xd9;
1637 *(cd->mcodeptr++) = 0xe0;
1641 void emit_faddp(codegendata *cd)
1643 *(cd->mcodeptr++) = 0xde;
1644 *(cd->mcodeptr++) = 0xc1;
1648 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1650 *(cd->mcodeptr++) = 0xd8;
1651 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1655 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1657 *(cd->mcodeptr++) = 0xdc;
1658 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1662 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1664 *(cd->mcodeptr++) = 0xde;
1665 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1669 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1671 *(cd->mcodeptr++) = 0xd8;
1672 emit_membase(cd, (basereg),(disp),0);
1676 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1678 *(cd->mcodeptr++) = 0xdc;
1679 emit_membase(cd, (basereg),(disp),0);
1683 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1685 *(cd->mcodeptr++) = 0xd8;
1686 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1690 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1692 *(cd->mcodeptr++) = 0xdc;
1693 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1697 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1699 *(cd->mcodeptr++) = 0xde;
1700 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1704 void emit_fsubp(codegendata *cd)
1706 *(cd->mcodeptr++) = 0xde;
1707 *(cd->mcodeptr++) = 0xe9;
1711 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1713 *(cd->mcodeptr++) = 0xd8;
1714 emit_membase(cd, (basereg),(disp),4);
1718 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1720 *(cd->mcodeptr++) = 0xdc;
1721 emit_membase(cd, (basereg),(disp),4);
1725 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1727 *(cd->mcodeptr++) = 0xd8;
1728 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1732 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1734 *(cd->mcodeptr++) = 0xdc;
1735 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1739 void emit_fmulp(codegendata *cd)
1741 *(cd->mcodeptr++) = 0xde;
1742 *(cd->mcodeptr++) = 0xc9;
1746 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1748 *(cd->mcodeptr++) = 0xde;
1749 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1753 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1755 *(cd->mcodeptr++) = 0xd8;
1756 emit_membase(cd, (basereg),(disp),1);
1760 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1762 *(cd->mcodeptr++) = 0xdc;
1763 emit_membase(cd, (basereg),(disp),1);
1767 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1769 *(cd->mcodeptr++) = 0xd8;
1770 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1774 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1776 *(cd->mcodeptr++) = 0xdc;
1777 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1781 void emit_fdivp(codegendata *cd)
1783 *(cd->mcodeptr++) = 0xde;
1784 *(cd->mcodeptr++) = 0xf9;
1788 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1790 *(cd->mcodeptr++) = 0xde;
1791 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1795 void emit_fxch(codegendata *cd)
1797 *(cd->mcodeptr++) = 0xd9;
1798 *(cd->mcodeptr++) = 0xc9;
1802 void emit_fxch_reg(codegendata *cd, s4 reg)
1804 *(cd->mcodeptr++) = 0xd9;
1805 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1809 void emit_fprem(codegendata *cd)
1811 *(cd->mcodeptr++) = 0xd9;
1812 *(cd->mcodeptr++) = 0xf8;
1816 void emit_fprem1(codegendata *cd)
1818 *(cd->mcodeptr++) = 0xd9;
1819 *(cd->mcodeptr++) = 0xf5;
1823 void emit_fucom(codegendata *cd)
1825 *(cd->mcodeptr++) = 0xdd;
1826 *(cd->mcodeptr++) = 0xe1;
1830 void emit_fucom_reg(codegendata *cd, s4 reg)
1832 *(cd->mcodeptr++) = 0xdd;
1833 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1837 void emit_fucomp_reg(codegendata *cd, s4 reg)
1839 *(cd->mcodeptr++) = 0xdd;
1840 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1844 void emit_fucompp(codegendata *cd)
1846 *(cd->mcodeptr++) = 0xda;
1847 *(cd->mcodeptr++) = 0xe9;
1851 void emit_fnstsw(codegendata *cd)
1853 *(cd->mcodeptr++) = 0xdf;
1854 *(cd->mcodeptr++) = 0xe0;
1858 void emit_sahf(codegendata *cd)
1860 *(cd->mcodeptr++) = 0x9e;
1864 void emit_finit(codegendata *cd)
1866 *(cd->mcodeptr++) = 0x9b;
1867 *(cd->mcodeptr++) = 0xdb;
1868 *(cd->mcodeptr++) = 0xe3;
1872 void emit_fldcw_mem(codegendata *cd, s4 mem)
1874 *(cd->mcodeptr++) = 0xd9;
1879 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1881 *(cd->mcodeptr++) = 0xd9;
1882 emit_membase(cd, (basereg),(disp),5);
1886 void emit_wait(codegendata *cd)
1888 *(cd->mcodeptr++) = 0x9b;
1892 void emit_ffree_reg(codegendata *cd, s4 reg)
1894 *(cd->mcodeptr++) = 0xdd;
1895 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1899 void emit_fdecstp(codegendata *cd)
1901 *(cd->mcodeptr++) = 0xd9;
1902 *(cd->mcodeptr++) = 0xf6;
1906 void emit_fincstp(codegendata *cd)
1908 *(cd->mcodeptr++) = 0xd9;
1909 *(cd->mcodeptr++) = 0xf7;
1914 * These are local overrides for various environment variables in Emacs.
1915 * Please do not remove this and leave it at the end of the file, where
1916 * Emacs will automagically detect them.
1917 * ---------------------------------------------------------------------
1920 * indent-tabs-mode: t