src/vm/jit/codegen-common.cpp

   1 /* src/vm/jit/codegen-common.cpp - architecture independent code generator stuff
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008, 2009
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5    Copyright (C) 2009 Theobroma Systems Ltd.
   6
   7    This file is part of CACAO.
   8
   9    This program is free software; you can redistribute it and/or
  10    modify it under the terms of the GNU General Public License as
  11    published by the Free Software Foundation; either version 2, or (at
  12    your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful, but
  15    WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17    General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  22    02110-1301, USA.
  23
  24    All functions assume the following code area / data area layout:
  25
  26    +-----------+
  27    |           |
  28    | code area | code area grows to higher addresses
  29    |           |
  30    +-----------+ <-- start of procedure
  31    |           |
  32    | data area | data area grows to lower addresses
  33    |           |
  34    +-----------+
  35
  36    The functions first write into a temporary code/data area allocated by
  37    "codegen_init". "codegen_finish" copies the code and data area into permanent
  38    memory. All functions writing values into the data area return the offset
  39    relative the begin of the code area (start of procedure).
  40
  41 */
  42
  43
  44 #include "config.h"
  45
  46 #include <assert.h>
  47 #include <string.h>
  48
  49 #include "vm/types.h"
  50
  51 #include "codegen.h"
  52 #include "md.h"
  53 #include "md-abi.h"
  54
  55 #include "mm/memory.hpp"
  56
  57 #include "toolbox/avl.h"
  58 #include "toolbox/list.hpp"
  59 #include "toolbox/logging.hpp"
  60
  61 #include "native/llni.h"
  62 #include "native/localref.hpp"
  63 #include "native/native.hpp"
  64
  65 #include "threads/thread.hpp"
  66
  67 #include "vm/jit/builtin.hpp"
  68 #include "vm/exceptions.hpp"
  69 #include "vm/method.hpp"
  70 #include "vm/options.h"
  71 #include "vm/statistics.h"
  72 #include "vm/string.hpp"
  73
  74 #include "vm/jit/abi.h"
  75 #include "vm/jit/asmpart.h"
  76 #include "vm/jit/code.hpp"
  77 #include "vm/jit/codegen-common.hpp"
  78
  79 #if defined(ENABLE_DISASSEMBLER)
  80 # include "vm/jit/disass.h"
  81 #endif
  82
  83 #include "vm/jit/dseg.h"
  84 #include "vm/jit/emit-common.hpp"
  85 #include "vm/jit/jit.hpp"
  86 #include "vm/jit/linenumbertable.hpp"
  87 #include "vm/jit/methodheader.h"
  88 #include "vm/jit/methodtree.h"
  89 #include "vm/jit/patcher-common.hpp"
  90 #include "vm/jit/replace.hpp"
  91 #include "vm/jit/show.hpp"
  92 #include "vm/jit/stacktrace.hpp"
  93 #include "vm/jit/trace.hpp"
  94
  95 #include "vm/jit/optimizing/profile.hpp"
  96
  97 #if defined(ENABLE_SSA)
  98 # include "vm/jit/optimizing/lsra.h"
  99 # include "vm/jit/optimizing/ssa.h"
 100 #elif defined(ENABLE_LSRA)
 101 # include "vm/jit/allocator/lsra.h"
 102 #endif
 103
 104 #if defined(ENABLE_INTRP)
 105 #include "vm/jit/intrp/intrp.h"
 106 #endif
 107
 108 #if defined(ENABLE_VMLOG)
 109 #include <vmlog_cacao.h>
 110 #endif
 111
 112
 113 /* codegen_init ****************************************************************
 114
 115    TODO
 116
 117 *******************************************************************************/
 118
 119 void codegen_init(void)
 120 {
 121 }
 122
 123
 124 /* codegen_setup ***************************************************************
 125
 126    Allocates and initialises code area, data area and references.
 127
 128 *******************************************************************************/
 129
 130 void codegen_setup(jitdata *jd)
 131 {
 132         methodinfo  *m;
 133         codegendata *cd;
 134
 135         /* get required compiler data */
 136
 137         m  = jd->m;
 138         cd = jd->cd;
 139
 140         /* initialize members */
 141
 142         // Set flags as requested.
 143         if (opt_AlwaysEmitLongBranches) {
 144                 cd->flags = CODEGENDATA_FLAG_LONGBRANCHES;
 145         }
 146         else {
 147                 cd->flags = 0;
 148         }
 149
 150         cd->mcodebase    = (u1*) DumpMemory::allocate(MCODEINITSIZE);
 151         cd->mcodeend     = cd->mcodebase + MCODEINITSIZE;
 152         cd->mcodesize    = MCODEINITSIZE;
 153
 154         /* initialize mcode variables */
 155
 156         cd->mcodeptr     = cd->mcodebase;
 157         cd->lastmcodeptr = cd->mcodebase;
 158
 159 #if defined(ENABLE_INTRP)
 160         /* native dynamic superinstructions variables */
 161
 162         if (opt_intrp) {
 163                 cd->ncodebase = (u1*) DumpMemory::allocate(NCODEINITSIZE);
 164                 cd->ncodesize = NCODEINITSIZE;
 165
 166                 /* initialize ncode variables */
 167
 168                 cd->ncodeptr = cd->ncodebase;
 169
 170                 cd->lastinstwithoutdispatch = ~0; /* no inst without dispatch */
 171                 cd->superstarts = NULL;
 172         }
 173 #endif
 174
 175         cd->dseg           = NULL;
 176         cd->dseglen        = 0;
 177
 178         cd->jumpreferences = NULL;
 179
 180 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 181         cd->datareferences = NULL;
 182 #endif
 183
 184         cd->brancheslabel  = new DumpList<branch_label_ref_t*>();
 185         cd->linenumbers    = new DumpList<Linenumber>();
 186 }
 187
 188
 189 /* codegen_reset ***************************************************************
 190
 191    Resets the codegen data structure so we can recompile the method.
 192
 193 *******************************************************************************/
 194
 195 static void codegen_reset(jitdata *jd)
 196 {
 197         codeinfo    *code;
 198         codegendata *cd;
 199         basicblock  *bptr;
 200
 201         /* get required compiler data */
 202
 203         code = jd->code;
 204         cd   = jd->cd;
 205
 206         /* reset error flag */
 207
 208         cd->flags          &= ~CODEGENDATA_FLAG_ERROR;
 209
 210         /* reset some members, we reuse the code memory already allocated
 211            as this should have almost the correct size */
 212
 213         cd->mcodeptr        = cd->mcodebase;
 214         cd->lastmcodeptr    = cd->mcodebase;
 215
 216         cd->dseg            = NULL;
 217         cd->dseglen         = 0;
 218
 219         cd->jumpreferences  = NULL;
 220
 221 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 222         cd->datareferences  = NULL;
 223 #endif
 224
 225         cd->brancheslabel   = new DumpList<branch_label_ref_t*>();
 226         cd->linenumbers     = new DumpList<Linenumber>();
 227
 228         /* We need to clear the mpc and the branch references from all
 229            basic blocks as they will definitely change. */
 230
 231         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 232                 bptr->mpc        = -1;
 233                 bptr->branchrefs = NULL;
 234         }
 235
 236         /* We need to clear all the patcher references from the codeinfo
 237            since they all will be regenerated */
 238
 239         patcher_list_reset(code);
 240
 241 #if defined(ENABLE_REPLACEMENT)
 242         code->rplpoints     = NULL;
 243         code->rplpointcount = 0;
 244         code->regalloc      = NULL;
 245         code->regalloccount = 0;
 246         code->globalcount   = 0;
 247 #endif
 248 }
 249
 250
 251 /* codegen_generate ************************************************************
 252
 253    Generates the code for the currently compiled method.
 254
 255 *******************************************************************************/
 256
 257 bool codegen_generate(jitdata *jd)
 258 {
 259         codegendata *cd;
 260
 261         /* get required compiler data */
 262
 263         cd = jd->cd;
 264
 265         /* call the machine-dependent code generation function */
 266
 267         if (!codegen_emit(jd))
 268                 return false;
 269
 270         /* check for an error */
 271
 272         if (CODEGENDATA_HAS_FLAG_ERROR(cd)) {
 273                 /* check for long-branches flag, if it is set we recompile the
 274                    method */
 275
 276 #if !defined(NDEBUG)
 277         if (compileverbose)
 278             log_message_method("Re-generating code: ", jd->m);
 279 #endif
 280
 281                 /* XXX maybe we should tag long-branches-methods for recompilation */
 282
 283                 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 284                         /* we have to reset the codegendata structure first */
 285
 286                         codegen_reset(jd);
 287
 288                         /* and restart the compiler run */
 289
 290                         if (!codegen_emit(jd))
 291                                 return false;
 292                 }
 293                 else {
 294                         os::abort("codegen_generate: unknown error occurred during codegen_emit: flags=%x\n", cd->flags);
 295                 }
 296
 297 #if !defined(NDEBUG)
 298         if (compileverbose)
 299             log_message_method("Re-generating code done: ", jd->m);
 300 #endif
 301         }
 302
 303         /* reallocate the memory and finish the code generation */
 304
 305         codegen_finish(jd);
 306
 307         /* everything's ok */
 308
 309         return true;
 310 }
 311
 312
 313 /* codegen_close ***************************************************************
 314
 315    TODO
 316
 317 *******************************************************************************/
 318
 319 void codegen_close(void)
 320 {
 321         /* TODO: release avl tree on i386 and x86_64 */
 322 }
 323
 324
 325 /* codegen_increase ************************************************************
 326
 327    Doubles code area.
 328
 329 *******************************************************************************/
 330
 331 void codegen_increase(codegendata *cd)
 332 {
 333         u1 *oldmcodebase;
 334
 335         /* save old mcodebase pointer */
 336
 337         oldmcodebase = cd->mcodebase;
 338
 339         /* reallocate to new, doubled memory */
 340
 341         cd->mcodebase = (u1*) DumpMemory::reallocate(cd->mcodebase,
 342                                                                                                  cd->mcodesize,
 343                                                                                                  cd->mcodesize * 2);
 344         cd->mcodesize *= 2;
 345         cd->mcodeend   = cd->mcodebase + cd->mcodesize;
 346
 347         /* set new mcodeptr */
 348
 349         cd->mcodeptr = cd->mcodebase + (cd->mcodeptr - oldmcodebase);
 350
 351 #if defined(__I386__) || defined(__MIPS__) || defined(__X86_64__) || defined(__M68K__) || defined(ENABLE_INTRP) \
 352  || defined(__SPARC_64__)
 353         /* adjust the pointer to the last patcher position */
 354
 355         if (cd->lastmcodeptr != NULL)
 356                 cd->lastmcodeptr = cd->mcodebase + (cd->lastmcodeptr - oldmcodebase);
 357 #endif
 358 }
 359
 360
 361 /* codegen_ncode_increase ******************************************************
 362
 363    Doubles code area.
 364
 365 *******************************************************************************/
 366
 367 #if defined(ENABLE_INTRP)
 368 u1 *codegen_ncode_increase(codegendata *cd, u1 *ncodeptr)
 369 {
 370         u1 *oldncodebase;
 371
 372         /* save old ncodebase pointer */
 373
 374         oldncodebase = cd->ncodebase;
 375
 376         /* reallocate to new, doubled memory */
 377
 378         cd->ncodebase = DMREALLOC(cd->ncodebase,
 379                                                           u1,
 380                                                           cd->ncodesize,
 381                                                           cd->ncodesize * 2);
 382         cd->ncodesize *= 2;
 383
 384         /* return the new ncodeptr */
 385
 386         return (cd->ncodebase + (ncodeptr - oldncodebase));
 387 }
 388 #endif
 389
 390
 391 /* codegen_add_branch_ref ******************************************************
 392
 393    Prepends an branch to the list.
 394
 395 *******************************************************************************/
 396
 397 void codegen_add_branch_ref(codegendata *cd, basicblock *target, s4 condition, s4 reg, u4 options)
 398 {
 399         branchref *br;
 400         s4         branchmpc;
 401
 402         STATISTICS(count_branches_unresolved++);
 403
 404         /* calculate the mpc of the branch instruction */
 405
 406         branchmpc = cd->mcodeptr - cd->mcodebase;
 407
 408         br = (branchref*) DumpMemory::allocate(sizeof(branchref));
 409
 410         br->branchmpc = branchmpc;
 411         br->condition = condition;
 412         br->reg       = reg;
 413         br->options   = options;
 414         br->next      = target->branchrefs;
 415
 416         target->branchrefs = br;
 417 }
 418
 419
 420 /* codegen_resolve_branchrefs **************************************************
 421
 422    Resolves and patches the branch references of a given basic block.
 423
 424 *******************************************************************************/
 425
 426 void codegen_resolve_branchrefs(codegendata *cd, basicblock *bptr)
 427 {
 428         branchref *br;
 429         u1        *mcodeptr;
 430
 431         /* Save the mcodeptr because in the branch emitting functions
 432            we generate code somewhere inside already generated code,
 433            but we're still in the actual code generation phase. */
 434
 435         mcodeptr = cd->mcodeptr;
 436
 437         /* just to make sure */
 438
 439         assert(bptr->mpc >= 0);
 440
 441         for (br = bptr->branchrefs; br != NULL; br = br->next) {
 442                 /* temporary set the mcodeptr */
 443
 444                 cd->mcodeptr = cd->mcodebase + br->branchmpc;
 445
 446                 /* emit_bccz and emit_branch emit the correct code, even if we
 447                    pass condition == BRANCH_UNCONDITIONAL or reg == -1. */
 448
 449                 emit_bccz(cd, bptr, br->condition, br->reg, br->options);
 450         }
 451
 452         /* restore mcodeptr */
 453
 454         cd->mcodeptr = mcodeptr;
 455 }
 456
 457
 458 /* codegen_branch_label_add ****************************************************
 459
 460    Append an branch to the label-branch list.
 461
 462 *******************************************************************************/
 463
 464 void codegen_branch_label_add(codegendata *cd, s4 label, s4 condition, s4 reg, u4 options)
 465 {
 466         // Calculate the current mpc.
 467         int32_t mpc = cd->mcodeptr - cd->mcodebase;
 468
 469         branch_label_ref_t* br = (branch_label_ref_t*) DumpMemory::allocate(sizeof(branch_label_ref_t));
 470
 471         br->mpc       = mpc;
 472         br->label     = label;
 473         br->condition = condition;
 474         br->reg       = reg;
 475         br->options   = options;
 476
 477         // Add the branch to the list.
 478         cd->brancheslabel->push_back(br);
 479 }
 480
 481
 482 /* codegen_set_replacement_point_notrap ****************************************
 483
 484    Record the position of a non-trappable replacement point.
 485
 486 *******************************************************************************/
 487
 488 #if defined(ENABLE_REPLACEMENT)
 489 #if !defined(NDEBUG)
 490 void codegen_set_replacement_point_notrap(codegendata *cd, s4 type)
 491 #else
 492 void codegen_set_replacement_point_notrap(codegendata *cd)
 493 #endif
 494 {
 495         assert(cd->replacementpoint);
 496         assert(cd->replacementpoint->type == type);
 497         assert(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP);
 498
 499         cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
 500
 501         cd->replacementpoint++;
 502 }
 503 #endif /* defined(ENABLE_REPLACEMENT) */
 504
 505
 506 /* codegen_set_replacement_point ***********************************************
 507
 508    Record the position of a trappable replacement point.
 509
 510 *******************************************************************************/
 511
 512 #if defined(ENABLE_REPLACEMENT)
 513 #if !defined(NDEBUG)
 514 void codegen_set_replacement_point(codegendata *cd, s4 type)
 515 #else
 516 void codegen_set_replacement_point(codegendata *cd)
 517 #endif
 518 {
 519         assert(cd->replacementpoint);
 520         assert(cd->replacementpoint->type == type);
 521         assert(!(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP));
 522
 523         cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
 524
 525         cd->replacementpoint++;
 526
 527 #if !defined(NDEBUG)
 528         /* XXX actually we should use an own REPLACEMENT_NOPS here! */
 529         if (opt_TestReplacement)
 530                 PATCHER_NOPS;
 531 #endif
 532
 533         /* XXX assert(cd->lastmcodeptr <= cd->mcodeptr); */
 534
 535         cd->lastmcodeptr = cd->mcodeptr + PATCHER_CALL_SIZE;
 536 }
 537 #endif /* defined(ENABLE_REPLACEMENT) */
 538
 539
 540 /* codegen_finish **************************************************************
 541
 542    Finishes the code generation. A new memory, large enough for both
 543    data and code, is allocated and data and code are copied together
 544    to their final layout, unresolved jumps are resolved, ...
 545
 546 *******************************************************************************/
 547
 548 void codegen_finish(jitdata *jd)
 549 {
 550         s4       mcodelen;
 551 #if defined(ENABLE_INTRP)
 552         s4       ncodelen;
 553 #endif
 554         s4       alignedmcodelen;
 555         jumpref *jr;
 556         u1      *epoint;
 557         s4       alignedlen;
 558
 559         /* Get required compiler data. */
 560
 561         codeinfo*     code = jd->code;
 562         codegendata*  cd   = jd->cd;
 563         registerdata* rd   = jd->rd;
 564
 565         /* prevent compiler warning */
 566
 567 #if defined(ENABLE_INTRP)
 568         ncodelen = 0;
 569 #endif
 570
 571         /* calculate the code length */
 572
 573         mcodelen = (s4) (cd->mcodeptr - cd->mcodebase);
 574
 575 #if defined(ENABLE_STATISTICS)
 576         if (opt_stat) {
 577                 count_code_len += mcodelen;
 578                 count_data_len += cd->dseglen;
 579         }
 580 #endif
 581
 582         alignedmcodelen = MEMORY_ALIGN(mcodelen, MAX_ALIGN);
 583
 584 #if defined(ENABLE_INTRP)
 585         if (opt_intrp)
 586                 ncodelen = cd->ncodeptr - cd->ncodebase;
 587         else {
 588                 ncodelen = 0; /* avoid compiler warning */
 589         }
 590 #endif
 591
 592         cd->dseglen = MEMORY_ALIGN(cd->dseglen, MAX_ALIGN);
 593         alignedlen = alignedmcodelen + cd->dseglen;
 594
 595 #if defined(ENABLE_INTRP)
 596         if (opt_intrp) {
 597                 alignedlen += ncodelen;
 598         }
 599 #endif
 600
 601         /* allocate new memory */
 602
 603         code->mcodelength = mcodelen + cd->dseglen;
 604         code->mcode       = CNEW(u1, alignedlen);
 605
 606         /* set the entrypoint of the method */
 607
 608         assert(code->entrypoint == NULL);
 609         code->entrypoint = epoint = (code->mcode + cd->dseglen);
 610
 611         /* fill the data segment (code->entrypoint must already be set!) */
 612
 613         dseg_finish(jd);
 614
 615         /* copy code to the new location */
 616
 617         MCOPY((void *) code->entrypoint, cd->mcodebase, u1, mcodelen);
 618
 619 #if defined(ENABLE_INTRP)
 620         /* relocate native dynamic superinstruction code (if any) */
 621
 622         if (opt_intrp) {
 623                 cd->mcodebase = code->entrypoint;
 624
 625                 if (ncodelen > 0) {
 626                         u1 *ncodebase = code->mcode + cd->dseglen + alignedmcodelen;
 627
 628                         MCOPY((void *) ncodebase, cd->ncodebase, u1, ncodelen);
 629
 630                         /* flush the instruction and data caches */
 631
 632                         md_cacheflush(ncodebase, ncodelen);
 633
 634                         /* set some cd variables for dynamic_super_rerwite */
 635
 636                         cd->ncodebase = ncodebase;
 637
 638                 } else {
 639                         cd->ncodebase = NULL;
 640                 }
 641
 642                 dynamic_super_rewrite(cd);
 643         }
 644 #endif
 645
 646         /* Fill runtime information about generated code. */
 647
 648         code->stackframesize     = cd->stackframesize;
 649         code->synchronizedoffset = rd->memuse * 8;
 650         code->savedintcount      = INT_SAV_CNT - rd->savintreguse;
 651         code->savedfltcount      = FLT_SAV_CNT - rd->savfltreguse;
 652 #if defined(HAS_ADDRESS_REGISTER_FILE)
 653         code->savedadrcount      = ADR_SAV_CNT - rd->savadrreguse;
 654 #endif
 655
 656         /* Create the exception table. */
 657
 658         exceptiontable_create(jd);
 659
 660         /* Create the linenumber table. */
 661
 662         code->linenumbertable = new LinenumberTable(jd);
 663
 664         /* jump table resolving */
 665
 666         for (jr = cd->jumpreferences; jr != NULL; jr = jr->next)
 667                 *((functionptr *) ((ptrint) epoint + jr->tablepos)) =
 668                         (functionptr) ((ptrint) epoint + (ptrint) jr->target->mpc);
 669
 670         /* patcher resolving */
 671
 672         patcher_resolve(jd);
 673
 674 #if defined(ENABLE_REPLACEMENT)
 675         /* replacement point resolving */
 676         {
 677                 int i;
 678                 rplpoint *rp;
 679
 680                 rp = code->rplpoints;
 681                 for (i=0; i<code->rplpointcount; ++i, ++rp) {
 682                         rp->pc = (u1*) ((ptrint) epoint + (ptrint) rp->pc);
 683                 }
 684         }
 685 #endif /* defined(ENABLE_REPLACEMENT) */
 686
 687         /* Insert method into methodtree to find the entrypoint. */
 688
 689         methodtree_insert(code->entrypoint, code->entrypoint + mcodelen);
 690
 691 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 692         /* resolve data segment references */
 693
 694         dseg_resolve_datareferences(jd);
 695 #endif
 696
 697         /* flush the instruction and data caches */
 698
 699         md_cacheflush(code->mcode, code->mcodelength);
 700 }
 701
 702
 703 /* codegen_start_native_call ***************************************************
 704
 705    Prepares the stuff required for a native (JNI) function call:
 706
 707    - adds a stackframe info structure to the chain, for stacktraces
 708    - prepares the local references table on the stack
 709
 710    The layout of the native stub stackframe should look like this:
 711
 712    +---------------------------+ <- java SP (of parent Java function)
 713    | return address            |
 714    +---------------------------+ <- data SP
 715    |                           |
 716    | stackframe info structure |
 717    |                           |
 718    +---------------------------+
 719    |                           |
 720    | local references table    |
 721    |                           |
 722    +---------------------------+
 723    |                           |
 724    | saved registers (if any)  |
 725    |                           |
 726    +---------------------------+
 727    |                           |
 728    | arguments (if any)        |
 729    |                           |
 730    +---------------------------+ <- current SP (native stub)
 731
 732 *******************************************************************************/
 733
 734 java_handle_t *codegen_start_native_call(u1 *sp, u1 *pv)
 735 {
 736         stackframeinfo_t *sfi;
 737         localref_table   *lrt;
 738         codeinfo         *code;
 739         methodinfo       *m;
 740         int32_t           framesize;
 741
 742         uint8_t  *datasp;
 743         uint8_t  *javasp;
 744         uint64_t *arg_regs;
 745         uint64_t *arg_stack;
 746
 747         STATISTICS(count_calls_java_to_native++);
 748
 749         // Get information from method header.
 750         code = code_get_codeinfo_for_pv(pv);
 751         assert(code != NULL);
 752
 753         framesize = md_stacktrace_get_framesize(code);
 754         assert(framesize >= (int32_t) (sizeof(stackframeinfo_t) + sizeof(localref_table)));
 755
 756         // Get the methodinfo.
 757         m = code_get_methodinfo_for_pv(pv);
 758         assert(m);
 759
 760         /* calculate needed values */
 761
 762 #if defined(__ALPHA__) || defined(__ARM__)
 763         datasp    = sp + framesize - SIZEOF_VOID_P;
 764         javasp    = sp + framesize;
 765         arg_regs  = (uint64_t *) sp;
 766         arg_stack = (uint64_t *) javasp;
 767 #elif defined(__MIPS__)
 768         /* MIPS always uses 8 bytes to store the RA */
 769         datasp    = sp + framesize - 8;
 770         javasp    = sp + framesize;
 771 # if SIZEOF_VOID_P == 8
 772         arg_regs  = (uint64_t *) sp;
 773 # else
 774         arg_regs  = (uint64_t *) (sp + 5 * 8);
 775 # endif
 776         arg_stack = (uint64_t *) javasp;
 777 #elif defined(__S390__)
 778         datasp    = sp + framesize - 8;
 779         javasp    = sp + framesize;
 780         arg_regs  = (uint64_t *) (sp + 96);
 781         arg_stack = (uint64_t *) javasp;
 782 #elif defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
 783         datasp    = sp + framesize;
 784         javasp    = sp + framesize + SIZEOF_VOID_P;
 785         arg_regs  = (uint64_t *) sp;
 786         arg_stack = (uint64_t *) javasp;
 787 #elif defined(__POWERPC__)
 788         datasp    = sp + framesize;
 789         javasp    = sp + framesize;
 790         arg_regs  = (uint64_t *) (sp + LA_SIZE + 4 * SIZEOF_VOID_P);
 791         arg_stack = (uint64_t *) javasp;
 792 #elif defined(__POWERPC64__)
 793         datasp    = sp + framesize;
 794         javasp    = sp + framesize;
 795         arg_regs  = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 4 * SIZEOF_VOID_P);
 796         arg_stack = (uint64_t *) javasp;
 797 #else
 798         /* XXX is was unable to do this port for SPARC64, sorry. (-michi) */
 799         /* XXX maybe we need to pass the RA as argument there */
 800         os::abort("codegen_start_native_call: unsupported architecture");
 801 #endif
 802
 803         /* get data structures from stack */
 804
 805         sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
 806         lrt = (localref_table *)   (datasp - sizeof(stackframeinfo_t) -
 807                                                                 sizeof(localref_table));
 808
 809 #if defined(ENABLE_JNI)
 810         /* add current JNI local references table to this thread */
 811
 812         localref_table_add(lrt);
 813 #endif
 814
 815 #if !defined(NDEBUG)
 816 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
 817         /* print the call-trace if necesarry */
 818         /* BEFORE: filling the local reference table */
 819
 820         if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
 821                 trace_java_call_enter(m, arg_regs, arg_stack);
 822 # endif
 823 #endif
 824
 825 #if defined(ENABLE_HANDLES)
 826         /* place all references into the local reference table */
 827         /* BEFORE: creating stackframeinfo */
 828
 829         localref_native_enter(m, arg_regs, arg_stack);
 830 #endif
 831
 832         /* Add a stackframeinfo for this native method.  We don't have RA
 833            and XPC here.  These are determined in
 834            stacktrace_stackframeinfo_add. */
 835
 836         stacktrace_stackframeinfo_add(sfi, pv, sp, NULL, NULL);
 837
 838         /* Return a wrapped classinfo for static methods. */
 839
 840         if (m->flags & ACC_STATIC)
 841                 return (java_handle_t *) LLNI_classinfo_wrap(m->clazz);
 842         else
 843                 return NULL;
 844 }
 845
 846
 847 /* codegen_finish_native_call **************************************************
 848
 849    Removes the stuff required for a native (JNI) function call.
 850    Additionally it checks for an exceptions and in case, get the
 851    exception object and clear the pointer.
 852
 853 *******************************************************************************/
 854
 855 java_object_t *codegen_finish_native_call(u1 *sp, u1 *pv)
 856 {
 857         stackframeinfo_t *sfi;
 858         java_handle_t    *e;
 859         java_object_t    *o;
 860         codeinfo         *code;
 861         methodinfo       *m;
 862         int32_t           framesize;
 863
 864         uint8_t  *datasp;
 865         uint64_t *ret_regs;
 866
 867         // Get information from method header.
 868         code = code_get_codeinfo_for_pv(pv);
 869         assert(code != NULL);
 870
 871         framesize = md_stacktrace_get_framesize(code);
 872
 873         // Get the methodinfo.
 874         m = code->m;
 875         assert(m != NULL);
 876
 877         /* calculate needed values */
 878
 879 #if defined(__ALPHA__) || defined(__ARM__)
 880         datasp   = sp + framesize - SIZEOF_VOID_P;
 881         ret_regs = (uint64_t *) sp;
 882 #elif defined(__MIPS__)
 883         /* MIPS always uses 8 bytes to store the RA */
 884         datasp   = sp + framesize - 8;
 885 # if SIZEOF_VOID_P == 8
 886         ret_regs = (uint64_t *) sp;
 887 # else
 888         ret_regs = (uint64_t *) (sp + 1 * 8);
 889 # endif
 890 #elif defined(__S390__)
 891         datasp   = sp + framesize - 8;
 892         ret_regs = (uint64_t *) (sp + 96);
 893 #elif defined(__I386__)
 894         datasp   = sp + framesize;
 895         ret_regs = (uint64_t *) (sp + 2 * SIZEOF_VOID_P);
 896 #elif defined(__M68K__)
 897         datasp   = sp + framesize;
 898         ret_regs = (uint64_t *) (sp + 2 * 8);
 899 #elif defined(__X86_64__)
 900         datasp   = sp + framesize;
 901         ret_regs = (uint64_t *) sp;
 902 #elif defined(__POWERPC__)
 903         datasp   = sp + framesize;
 904         ret_regs = (uint64_t *) (sp + LA_SIZE + 2 * SIZEOF_VOID_P);
 905 #elif defined(__POWERPC64__)
 906         datasp   = sp + framesize;
 907         ret_regs = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 2 * SIZEOF_VOID_P);
 908 #else
 909         os::abort("codegen_finish_native_call: unsupported architecture");
 910 #endif
 911
 912         /* get data structures from stack */
 913
 914         sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
 915
 916         /* Remove current stackframeinfo from chain. */
 917
 918         stacktrace_stackframeinfo_remove(sfi);
 919
 920 #if defined(ENABLE_HANDLES)
 921         /* unwrap the return value from the local reference table */
 922         /* AFTER: removing the stackframeinfo */
 923         /* BEFORE: releasing the local reference table */
 924
 925         localref_native_exit(m, ret_regs);
 926 #endif
 927
 928         /* get and unwrap the exception */
 929         /* AFTER: removing the stackframe info */
 930         /* BEFORE: releasing the local reference table */
 931
 932         e = exceptions_get_and_clear_exception();
 933         o = LLNI_UNWRAP(e);
 934
 935 #if defined(ENABLE_JNI)
 936         /* release JNI local references table for this thread */
 937
 938         localref_frame_pop_all();
 939         localref_table_remove();
 940 #endif
 941
 942 #if !defined(NDEBUG)
 943 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
 944         /* print the call-trace if necesarry */
 945         /* AFTER: unwrapping the return value */
 946
 947         if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
 948                 trace_java_call_exit(m, ret_regs);
 949 # endif
 950 #endif
 951
 952         return o;
 953 }
 954
 955
 956 /* codegen_reg_of_var **********************************************************
 957
 958    This function determines a register, to which the result of an
 959    operation should go, when it is ultimatively intended to store the
 960    result in pseudoregister v.  If v is assigned to an actual
 961    register, this register will be returned.  Otherwise (when v is
 962    spilled) this function returns tempregnum.  If not already done,
 963    regoff and flags are set in the stack location.
 964
 965 *******************************************************************************/
 966
 967 s4 codegen_reg_of_var(u2 opcode, varinfo *v, s4 tempregnum)
 968 {
 969         if (!(v->flags & INMEMORY))
 970                 return v->vv.regoff;
 971
 972         return tempregnum;
 973 }
 974
 975
 976 /* codegen_reg_of_dst **********************************************************
 977
 978    This function determines a register, to which the result of an
 979    operation should go, when it is ultimatively intended to store the
 980    result in iptr->dst.var.  If dst.var is assigned to an actual
 981    register, this register will be returned.  Otherwise (when it is
 982    spilled) this function returns tempregnum.  If not already done,
 983    regoff and flags are set in the stack location.
 984
 985 *******************************************************************************/
 986
 987 s4 codegen_reg_of_dst(jitdata *jd, instruction *iptr, s4 tempregnum)
 988 {
 989         return codegen_reg_of_var(iptr->opc, VAROP(iptr->dst), tempregnum);
 990 }
 991
 992
 993 /**
 994  * Generates machine code.
 995  */
 996 bool codegen_emit(jitdata *jd)
 997 {
 998         varinfo*            var;
 999         builtintable_entry* bte;
1000         methoddesc*         md;
1001         int32_t             s1, s2, /*s3,*/ d;
1002         int32_t             fieldtype;
1003         int32_t             disp;
1004         int                 i;
1005
1006         // Get required compiler data.
1007         //methodinfo*   m    = jd->m;
1008         codeinfo*     code = jd->code;
1009         codegendata*  cd   = jd->cd;
1010         registerdata* rd   = jd->rd;
1011 #if defined(ENABLE_SSA)
1012         lsradata*     ls   = jd->ls;
1013         bool last_cmd_was_goto = false;
1014 #endif
1015
1016         // Space to save used callee saved registers.
1017         int32_t savedregs_num = 0;
1018         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
1019         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
1020 #ifdef HAS_ADDRESS_REGISTER_FILE
1021         savedregs_num += (ADR_SAV_CNT - rd->savadrreguse);
1022 #endif
1023
1024         // Calculate size of stackframe.
1025         cd->stackframesize = rd->memuse + savedregs_num;
1026
1027         // Space to save the return address.
1028 #if STACKFRAME_RA_TOP_OF_FRAME
1029 # if STACKFRAME_LEAFMETHODS_RA_REGISTER
1030         if (!code_is_leafmethod(code))
1031 # endif
1032                 cd->stackframesize += 1;
1033 #endif
1034
1035         // Space to save argument of monitor_enter.
1036 #if defined(ENABLE_THREADS)
1037         if (checksync && code_is_synchronized(code))
1038 # if STACKFRAME_SYNC_NEEDS_TWO_SLOTS
1039                 /* On some architectures the stack position for the argument can
1040                    not be shared with place to save the return register values to
1041                    survive monitor_exit since both values reside in the same register. */
1042                 cd->stackframesize += 2;
1043 # else
1044                 cd->stackframesize += 1;
1045 # endif
1046 #endif
1047
1048         // Keep stack of non-leaf functions 16-byte aligned for calls into
1049         // native code.
1050         if (!code_is_leafmethod(code) || JITDATA_HAS_FLAG_VERBOSECALL(jd))
1051 #if STACKFRMAE_RA_BETWEEN_FRAMES
1052                 ALIGN_ODD(cd->stackframesize);
1053 #else
1054                 ALIGN_EVEN(cd->stackframesize);
1055 #endif
1056
1057 #if defined(SPECIALMEMUSE)
1058         // On architectures having a linkage area, we can get rid of the whole
1059         // stackframe in leaf functions without saved registers.
1060         if (code_is_leafmethod(code) && (cd->stackframesize == LA_SIZE_IN_POINTERS))
1061                 cd->stackframesize = 0;
1062 #endif
1063
1064         /*
1065          * SECTION 1: Method header generation.
1066          */
1067
1068         // The method header was reduced to the bare minimum of one pointer
1069         // to the codeinfo structure, which in turn contains all runtime
1070         // information. However this section together with the methodheader.h
1071         // file will be kept alive for historical reasons. It might come in
1072         // handy at some point.
1073
1074         (void) dseg_add_unique_address(cd, code);   ///< CodeinfoPointer
1075
1076         // XXX, REMOVEME: We still need it for exception handling in assembler.
1077         // XXX ARM, M68K: (void) dseg_add_unique_s4(cd, cd->stackframesize);
1078 #if defined(__I386__)
1079         int align_off = (cd->stackframesize != 0) ? 4 : 0;
1080         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8 + align_off); /* FrameSize       */
1081 #else
1082         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
1083 #endif
1084         // XXX M68K: We use the IntSave as a split field for the adr now
1085         //           (void) dseg_add_unique_s4(cd, (ADR_SAV_CNT - rd->savadrreguse) << 16 | (INT_SAV_CNT - rd->savintreguse)); /* IntSave */
1086         (void) dseg_add_unique_s4(cd, code_is_leafmethod(code) ? 1 : 0);
1087         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
1088         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
1089
1090         /*
1091          * SECTION 2: Method prolog generation.
1092          */
1093
1094 #if defined(ENABLE_PROFILING)
1095         // Generate method profiling code.
1096         if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1097
1098                 // Count method frequency.
1099                 emit_profile_method(cd, code);
1100
1101                 // Start CPU cycle counting.
1102                 emit_profile_cycle_start(cd, code);
1103         }
1104 #endif
1105
1106         // Emit code for the method prolog.
1107         codegen_emit_prolog(jd);
1108
1109 #if defined(ENABLE_THREADS)
1110         // Emit code to call monitorenter function.
1111         if (checksync && code_is_synchronized(code))
1112                 emit_monitor_enter(jd, rd->memuse * 8);
1113 #endif
1114
1115 #if !defined(NDEBUG)
1116         // Call trace function.
1117         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1118                 emit_verbosecall_enter(jd);
1119 #endif
1120
1121 #if defined(ENABLE_SSA)
1122         // With SSA the header is basicblock 0, insert phi moves if necessary.
1123         if (ls != NULL)
1124                 codegen_emit_phi_moves(jd, ls->basicblocks[0]);
1125 #endif
1126
1127         // Create replacement points.
1128         REPLACEMENT_POINTS_INIT(cd, jd);
1129
1130         /*
1131          * SECTION 3: ICMD code generation.
1132          */
1133
1134         // Walk through all basic blocks.
1135         for (basicblock* bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
1136
1137                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
1138
1139                 // Is this basic block reached?
1140                 if (bptr->flags < BBREACHED)
1141                         continue;
1142
1143                 // Branch resolving.
1144                 codegen_resolve_branchrefs(cd, bptr);
1145
1146                 // Handle replacement points.
1147                 REPLACEMENT_POINT_BLOCK_START(cd, bptr);
1148
1149 #if defined(ENABLE_REPLACEMENT) && defined(__I386__)
1150                 // Generate countdown trap code.
1151                 methodinfo* m = jd->m;
1152                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
1153                         if (cd->replacementpoint[-1].flags & RPLPOINT_FLAG_COUNTDOWN) {
1154                                 MCODECHECK(32);
1155                                 emit_trap_countdown(cd, &(m->hitcountdown));
1156                         }
1157                 }
1158 #endif
1159
1160 #if defined(ENABLE_PROFILING)
1161                 // Generate basicblock profiling code.
1162                 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1163
1164                         // Count basicblock frequency.
1165                         emit_profile_basicblock(cd, code, bptr);
1166
1167                         // If this is an exception handler, start profiling again.
1168                         if (bptr->type == BBTYPE_EXH)
1169                                 emit_profile_cycle_start(cd, code);
1170                 }
1171 #endif
1172
1173                 // Copy interface registers to their destination.
1174                 int32_t indepth = bptr->indepth;
1175                 // XXX Check if this is true for all archs.
1176                 MCODECHECK(64+indepth);   // All
1177                 MCODECHECK(128+indepth);  // PPC64
1178                 MCODECHECK(512);          // I386, X86_64, S390
1179 #if defined(ENABLE_SSA)
1180                 // XXX Check if this is correct and add a propper comment!
1181                 if (ls != NULL) {
1182                         last_cmd_was_goto = false;
1183                 } else {
1184 #elif defined(ENABLE_LSRA)
1185                 if (opt_lsra) {
1186                         while (indepth > 0) {
1187                                 indepth--;
1188                                 var = VAR(bptr->invars[indepth]);
1189                                 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1190                                         if (!IS_INMEMORY(src->flags))
1191                                                 d = var->vv.regoff;
1192                                         else
1193                                                 d = REG_ITMP1_XPTR;
1194                                         // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1195                                         // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1196                                         // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1197                                         emit_imove(cd, REG_ITMP1_XPTR, d);
1198                                         emit_store(jd, NULL, var, d);
1199                                 }
1200                         }
1201                 } else {
1202 #endif
1203                         while (indepth > 0) {
1204                                 indepth--;
1205                                 var = VAR(bptr->invars[indepth]);
1206                                 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1207                                         d = codegen_reg_of_var(0, var, REG_ITMP1_XPTR);
1208                                         // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1209                                         // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1210                                         // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1211                                         emit_imove(cd, REG_ITMP1_XPTR, d);
1212                                         emit_store(jd, NULL, var, d);
1213                                 }
1214                                 else {
1215                                         assert((var->flags & INOUT));
1216                                 }
1217                         }
1218 #if defined(ENABLE_SSA) || defined(ENABLE_LSRA)
1219                 }
1220 #endif
1221
1222                 // Walk through all instructions.
1223                 int32_t len = bptr->icount;
1224                 uint16_t currentline = 0;
1225                 for (instruction* iptr = bptr->iinstr; len > 0; len--, iptr++) {
1226
1227                         // Add line number.
1228                         if (iptr->line != currentline) {
1229                                 linenumbertable_list_entry_add(cd, iptr->line);
1230                                 currentline = iptr->line;
1231                         }
1232
1233                         // An instruction usually needs < 64 words.
1234                         // XXX Check if this is true for all archs.
1235                         MCODECHECK(64);    // All
1236                         MCODECHECK(128);   // PPC64
1237                         MCODECHECK(1024);  // I386, X86_64, M68K, S390      /* 1kB should be enough */
1238
1239                         // The big switch.
1240                         switch (iptr->opc) {
1241
1242                         case ICMD_NOP:        /* ...  ==> ...                             */
1243                         case ICMD_POP:        /* ..., value  ==> ...                      */
1244                         case ICMD_POP2:       /* ..., value, value  ==> ...               */
1245                                 break;
1246
1247                         case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref       */
1248
1249                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1250                                 emit_nullpointer_check(cd, iptr, s1);
1251                                 break;
1252
1253 #if defined(ENABLE_SSA)
1254                         case ICMD_GETEXCEPTION:
1255
1256                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1257                                 emit_imove(cd, REG_ITMP1, d);
1258                                 emit_store_dst(jd, iptr, d);
1259                                 break;
1260 #endif
1261
1262                         /* inline operations **********************************************/
1263
1264                         case ICMD_INLINE_START:
1265
1266                                 REPLACEMENT_POINT_INLINE_START(cd, iptr);
1267                                 break;
1268
1269                         case ICMD_INLINE_BODY:
1270
1271                                 REPLACEMENT_POINT_INLINE_BODY(cd, iptr);
1272                                 linenumbertable_list_entry_add_inline_start(cd, iptr);
1273                                 linenumbertable_list_entry_add(cd, iptr->line);
1274                                 break;
1275
1276                         case ICMD_INLINE_END:
1277
1278                                 linenumbertable_list_entry_add_inline_end(cd, iptr);
1279                                 linenumbertable_list_entry_add(cd, iptr->line);
1280                                 break;
1281
1282
1283                         /* constant operations ********************************************/
1284
1285                         case ICMD_ICONST:     /* ...  ==> ..., constant                   */
1286
1287                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1288                                 ICONST(d, iptr->sx.val.i);
1289                                 emit_store_dst(jd, iptr, d);
1290                                 break;
1291
1292                         case ICMD_LCONST:     /* ...  ==> ..., constant                   */
1293
1294                                 d = codegen_reg_of_dst(jd, iptr, REG_LTMP12);
1295                                 LCONST(d, iptr->sx.val.l);
1296                                 emit_store_dst(jd, iptr, d);
1297                                 break;
1298
1299
1300                         /* load/store/copy/move operations ********************************/
1301
1302                         case ICMD_COPY:
1303                         case ICMD_MOVE:
1304                         case ICMD_ILOAD:      /* ...  ==> ..., content of local variable  */
1305                         case ICMD_LLOAD:      /* s1 = local variable                      */
1306                         case ICMD_FLOAD:
1307                         case ICMD_DLOAD:
1308                         case ICMD_ALOAD:
1309                         case ICMD_ISTORE:     /* ..., value  ==> ...                      */
1310                         case ICMD_LSTORE:
1311                         case ICMD_FSTORE:
1312                         case ICMD_DSTORE:
1313
1314                                 emit_copy(jd, iptr);
1315                                 break;
1316
1317                         case ICMD_ASTORE:
1318
1319                                 if (!(iptr->flags.bits & INS_FLAG_RETADDR))
1320                                         emit_copy(jd, iptr);
1321                                 break;
1322
1323
1324                         /* integer operations *********************************************/
1325
1326                         case ICMD_FCONST:     /* ...  ==> ..., constant                   */
1327                         case ICMD_DCONST:     /* ...  ==> ..., constant                   */
1328                         case ICMD_ACONST:     /* ...  ==> ..., constant                   */
1329                         case ICMD_INEG:       /* ..., value  ==> ..., - value             */
1330                         case ICMD_LNEG:       /* ..., value  ==> ..., - value             */
1331                         case ICMD_I2L:        /* ..., value  ==> ..., value               */
1332                         case ICMD_L2I:        /* ..., value  ==> ..., value               */
1333                         case ICMD_INT2BYTE:   /* ..., value  ==> ..., value               */
1334                         case ICMD_INT2CHAR:   /* ..., value  ==> ..., value               */
1335                         case ICMD_INT2SHORT:  /* ..., value  ==> ..., value               */
1336                         case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1337                         case ICMD_IINC:
1338                         case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant    */
1339                                               /* sx.val.i = constant                      */
1340                         case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1341                         case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant    */
1342                                               /* sx.val.l = constant                      */
1343                         case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1344                         case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant    */
1345                                               /* sx.val.i = constant                      */
1346                         case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1347                         case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant    */
1348                                               /* sx.val.l = constant                      */
1349                         case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1350                         case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant    */
1351                                               /* sx.val.i = constant                      */
1352                         case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1353                         case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant    */
1354                                               /* sx.val.l = constant                      */
1355                         case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1356                         case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2    */
1357                         case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value >> constant   */
1358                                               /* sx.val.i = constant                      */
1359                         case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant    */
1360                                               /* sx.val.i = constant                      */
1361                         case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1362                         case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2    */
1363                         case ICMD_LDIVPOW2:   /* ..., value  ==> ..., value >> constant   */
1364                                               /* sx.val.i = constant                      */
1365                         case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant    */
1366                                               /* sx.val.l = constant                      */
1367                         case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2   */
1368                         case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant   */
1369                                               /* sx.val.i = constant                      */
1370                         case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2   */
1371                         case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant   */
1372                                               /* sx.val.i = constant                      */
1373                         case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2  */
1374                         case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant  */
1375                                               /* sx.val.i = constant                      */
1376                         case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2   */
1377                         case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant   */
1378                                               /* sx.val.i = constant                      */
1379                         case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2   */
1380                         case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant   */
1381                                               /* sx.val.i = constant                      */
1382                         case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2  */
1383                         case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant  */
1384                                               /* sx.val.l = constant                      */
1385                         case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2    */
1386                         case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant    */
1387                                               /* sx.val.i = constant                      */
1388                         case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2    */
1389                         case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant    */
1390                                               /* sx.val.l = constant                      */
1391                         case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2    */
1392                         case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant    */
1393                                               /* sx.val.i = constant                      */
1394                         case ICMD_LOR:        /* ..., val1, val2  ==> ..., val1 | val2    */
1395                         case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant    */
1396                                               /* sx.val.l = constant                      */
1397                         case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2    */
1398                         case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant    */
1399                                               /* sx.val.i = constant                      */
1400                         case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2    */
1401                         case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant    */
1402                                               /* sx.val.l = constant                      */
1403
1404                                 // Generate architecture specific instructions.
1405                                 codegen_emit_instruction(jd, iptr);
1406                                 break;
1407
1408
1409                         /* floating operations ********************************************/
1410
1411 #if !defined(ENABLE_SOFTFLOAT)
1412                         case ICMD_FNEG:       /* ..., value  ==> ..., - value             */
1413                         case ICMD_DNEG:
1414                         case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1415                         case ICMD_DADD:
1416                         case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1417                         case ICMD_DSUB:
1418                         case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1419                         case ICMD_DMUL:
1420                         case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1421                         case ICMD_DDIV:
1422                         case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1423                         case ICMD_DREM:
1424                         case ICMD_I2F:        /* ..., value  ==> ..., (float) value       */
1425                         case ICMD_I2D:        /* ..., value  ==> ..., (double) value      */
1426                         case ICMD_L2F:        /* ..., value  ==> ..., (float) value       */
1427                         case ICMD_L2D:        /* ..., value  ==> ..., (double) value      */
1428                         case ICMD_F2I:        /* ..., value  ==> ..., (int) value         */
1429                         case ICMD_D2I:
1430                         case ICMD_F2L:        /* ..., value  ==> ..., (long) value        */
1431                         case ICMD_D2L:
1432                         case ICMD_F2D:        /* ..., value  ==> ..., (double) value      */
1433                         case ICMD_D2F:        /* ..., value  ==> ..., (float) value       */
1434                         case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2 */
1435                         case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                 */
1436                         case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2 */
1437                         case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                 */
1438
1439                                 // Generate architecture specific instructions.
1440                                 codegen_emit_instruction(jd, iptr);
1441                                 break;
1442 #endif /* !defined(ENABLE_SOFTFLOAT) */
1443
1444
1445                         /* memory operations **********************************************/
1446
1447                         case ICMD_ARRAYLENGTH:/* ..., arrayref  ==> ..., length           */
1448
1449                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1450                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1451                                 /* implicit null-pointer check */
1452                                 // XXX PPC64: Here we had an explicit null-pointer check
1453                                 //     which I think was obsolete, please confirm. Otherwise:
1454                                 // emit_nullpointer_check(cd, iptr, s1);
1455                                 M_ILD(d, s1, OFFSET(java_array_t, size));
1456                                 emit_store_dst(jd, iptr, d);
1457                                 break;
1458
1459                         case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value     */
1460                         case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value     */
1461                         case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value     */
1462                         case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value     */
1463                         case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value     */
1464                         case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value     */
1465                         case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value     */
1466                         case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value     */
1467                         case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...     */
1468                         case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...     */
1469                         case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...     */
1470                         case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...     */
1471                         case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...     */
1472                         case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...     */
1473                         case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...     */
1474                         case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...     */
1475                         case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...        */
1476                         case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...        */
1477                         case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...        */
1478                         case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...        */
1479                         case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...        */
1480                         case ICMD_FASTORECONST:   /* ..., arrayref, index  ==> ...        */
1481                         case ICMD_DASTORECONST:   /* ..., arrayref, index  ==> ...        */
1482                         case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...        */
1483                         case ICMD_GETFIELD:   /* ...  ==> ..., value                      */
1484                         case ICMD_PUTFIELD:   /* ..., value  ==> ...                      */
1485                         case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...              */
1486                                                   /* val = value (in current instruction) */
1487                         case ICMD_PUTSTATICCONST: /* ...  ==> ...                         */
1488                                                   /* val = value (in current instruction) */
1489
1490                                 // Generate architecture specific instructions.
1491                                 codegen_emit_instruction(jd, iptr);
1492                                 break;
1493
1494                         case ICMD_GETSTATIC:  /* ...  ==> ..., value                      */
1495
1496 #if defined(__I386__)
1497                                 // Generate architecture specific instructions.
1498                                 codegen_emit_instruction(jd, iptr);
1499 #else
1500                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1501                                         unresolved_field* uf = iptr->sx.s23.s3.uf;
1502                                         fieldtype = uf->fieldref->parseddesc.fd->type;
1503                                         disp      = dseg_add_unique_address(cd, 0);
1504
1505                                         patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1506                                 }
1507                                 else {
1508                                         fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1509                                         fieldtype = fi->type;
1510                                         disp      = dseg_add_address(cd, fi->value);
1511
1512                                         if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1513                                                 PROFILE_CYCLE_STOP;
1514                                                 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1515                                                 PROFILE_CYCLE_START;
1516                                         }
1517                                 }
1518
1519                                 // XXX X86_64: Here We had this:
1520                                 /* This approach is much faster than moving the field
1521                                    address inline into a register. */
1522
1523                                 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1524                                 M_ALD_DSEG(REG_ITMP1, disp);
1525
1526                                 switch (fieldtype) {
1527                                 case TYPE_ADR:
1528                                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1529                                         M_ALD(d, REG_ITMP1, 0);
1530                                         break;
1531                                 case TYPE_INT:
1532                                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1533                                         M_ILD(d, REG_ITMP1, 0);
1534                                         break;
1535                                 case TYPE_LNG:
1536                                         d = codegen_reg_of_dst(jd, iptr, REG_LTMP23);
1537                                         M_LLD(d, REG_ITMP1, 0);
1538                                         break;
1539                                 case TYPE_FLT:
1540                                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1541                                         M_FLD(d, REG_ITMP1, 0);
1542                                         break;
1543                                 case TYPE_DBL:
1544                                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1545                                         M_DLD(d, REG_ITMP1, 0);
1546                                         break;
1547                                 }
1548                                 emit_store_dst(jd, iptr, d);
1549 #endif
1550                                 break;
1551
1552                         case ICMD_PUTSTATIC:  /* ..., value  ==> ...                      */
1553
1554 #if defined(__I386__)
1555                                 // Generate architecture specific instructions.
1556                                 codegen_emit_instruction(jd, iptr);
1557 #else
1558                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1559                                         unresolved_field* uf = iptr->sx.s23.s3.uf;
1560                                         fieldtype = uf->fieldref->parseddesc.fd->type;
1561                                         disp      = dseg_add_unique_address(cd, 0);
1562
1563                                         patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1564                                 }
1565                                 else {
1566                                         fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1567                                         fieldtype = fi->type;
1568                                         disp      = dseg_add_address(cd, fi->value);
1569
1570                                         if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1571                                                 PROFILE_CYCLE_STOP;
1572                                                 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1573                                                 PROFILE_CYCLE_START;
1574                                         }
1575                                 }
1576
1577                                 // XXX X86_64: Here We had this:
1578                                 /* This approach is much faster than moving the field
1579                                    address inline into a register. */
1580
1581                                 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1582                                 M_ALD_DSEG(REG_ITMP1, disp);
1583
1584                                 switch (fieldtype) {
1585                                 case TYPE_ADR:
1586                                         s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1587                                         M_AST(s1, REG_ITMP1, 0);
1588                                         break;
1589                                 case TYPE_INT:
1590                                         s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1591                                         M_IST(s1, REG_ITMP1, 0);
1592                                         break;
1593                                 case TYPE_LNG:
1594                                         s1 = emit_load_s1(jd, iptr, REG_LTMP23);
1595                                         M_LST(s1, REG_ITMP1, 0);
1596                                         break;
1597                                 case TYPE_FLT:
1598                                         s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1599                                         M_FST(s1, REG_ITMP1, 0);
1600                                         break;
1601                                 case TYPE_DBL:
1602                                         s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1603                                         M_DST(s1, REG_ITMP1, 0);
1604                                         break;
1605                                 }
1606 #endif
1607                                 break;
1608
1609                         /* branch operations **********************************************/
1610
1611                         case ICMD_ATHROW:     /* ..., objectref ==> ... (, objectref)     */
1612
1613                                 // We might leave this method, stop profiling.
1614                                 PROFILE_CYCLE_STOP;
1615
1616                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1617                                 // XXX M68K: Actually this is M_ADRMOVE(s1, REG_ATMP1_XPTR);
1618                                 // XXX Sparc64: We use REG_ITMP2_XPTR here, fix me!
1619                                 emit_imove(cd, s1, REG_ITMP1_XPTR);
1620
1621 #ifdef ENABLE_VERIFIER
1622                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1623                                         unresolved_class *uc = iptr->sx.s23.s2.uc;
1624                                         patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1625                                 }
1626 #endif /* ENABLE_VERIFIER */
1627
1628                                 // Generate architecture specific instructions.
1629                                 codegen_emit_instruction(jd, iptr);
1630                                 ALIGNCODENOP;
1631                                 break;
1632
1633                         case ICMD_GOTO:       /* ... ==> ...                              */
1634                         case ICMD_RET:        /* ... ==> ...                              */
1635
1636 #if defined(ENABLE_SSA)
1637                                 // In case of a goto, phimoves have to be inserted
1638                                 // before the jump.
1639                                 if (ls != NULL) {
1640                                         last_cmd_was_goto = true;
1641                                         codegen_emit_phi_moves(jd, bptr);
1642                                 }
1643 #endif
1644                                 emit_br(cd, iptr->dst.block);
1645                                 ALIGNCODENOP;
1646                                 break;
1647
1648                         case ICMD_JSR:        /* ... ==> ...                              */
1649
1650                                 emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1651                                 ALIGNCODENOP;
1652                                 break;
1653
1654                         case ICMD_IFNULL:     /* ..., value ==> ...                       */
1655                         case ICMD_IFNONNULL:
1656
1657                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1658 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1659                                 emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, s1, BRANCH_OPT_NONE);
1660 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1661                                 M_TEST(s1);
1662                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1663 #else
1664 # error Unable to generate code for this configuration!
1665 #endif
1666                                 break;
1667
1668                         case ICMD_IFEQ:       /* ..., value ==> ...                       */
1669                         case ICMD_IFNE:
1670                         case ICMD_IFLT:
1671                         case ICMD_IFLE:
1672                         case ICMD_IFGT:
1673                         case ICMD_IFGE:
1674
1675                                 // XXX Sparc64: int compares must not branch on the
1676                                 // register directly. Reason is, that register content is
1677                                 // not 32-bit clean. Fix this!
1678
1679 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1680                                 if (iptr->sx.val.i == 0) {
1681                                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1682                                         emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, s1, BRANCH_OPT_NONE);
1683                                 } else {
1684                                         // Generate architecture specific instructions.
1685                                         codegen_emit_instruction(jd, iptr);
1686                                 }
1687 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1688                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1689                                 emit_icmp_imm(cd, s1, iptr->sx.val.i);
1690                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1691 #else
1692 # error Unable to generate code for this configuration!
1693 #endif
1694                                 break;
1695
1696                         case ICMD_IF_LEQ:     /* ..., value ==> ...                       */
1697                         case ICMD_IF_LNE:
1698                         case ICMD_IF_LLT:
1699                         case ICMD_IF_LGE:
1700                         case ICMD_IF_LGT:
1701                         case ICMD_IF_LLE:
1702
1703                                 // Generate architecture specific instructions.
1704                                 codegen_emit_instruction(jd, iptr);
1705                                 break;
1706
1707                         case ICMD_IF_ACMPEQ:  /* ..., value, value ==> ...                */
1708                         case ICMD_IF_ACMPNE:  /* op1 = target JavaVM pc                   */
1709
1710                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1711                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1712 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1713                                 switch (iptr->opc) {
1714                                         case ICMD_IF_ACMPEQ:
1715                                                 emit_beq(cd, iptr->dst.block, s1, s2);
1716                                                 break;
1717                                         case ICMD_IF_ACMPNE:
1718                                                 emit_bne(cd, iptr->dst.block, s1, s2);
1719                                                 break;
1720                                 }
1721 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1722                                 M_ACMP(s1, s2);
1723                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1724 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1725                                 M_CMPEQ(s1, s2, REG_ITMP1);
1726                                 switch (iptr->opc) {
1727                                         case ICMD_IF_ACMPEQ:
1728                                                 emit_bnez(cd, iptr->dst.block, REG_ITMP1);
1729                                                 break;
1730                                         case ICMD_IF_ACMPNE:
1731                                                 emit_beqz(cd, iptr->dst.block, REG_ITMP1);
1732                                                 break;
1733                                 }
1734 #else
1735 # error Unable to generate code for this configuration!
1736 #endif
1737                                 break;
1738
1739                         case ICMD_IF_ICMPEQ:  /* ..., value, value ==> ...                */
1740                         case ICMD_IF_ICMPNE:  /* op1 = target JavaVM pc                   */
1741
1742 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1743                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1744                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1745                                 switch (iptr->opc) {
1746                                         case ICMD_IF_ICMPEQ:
1747                                                 emit_beq(cd, iptr->dst.block, s1, s2);
1748                                                 break;
1749                                         case ICMD_IF_ICMPNE:
1750                                                 emit_bne(cd, iptr->dst.block, s1, s2);
1751                                                 break;
1752                                 }
1753                                 break;
1754 #else
1755                                 /* fall-through */
1756 #endif
1757
1758                         case ICMD_IF_ICMPLT:  /* ..., value, value ==> ...                */
1759                         case ICMD_IF_ICMPGT:  /* op1 = target JavaVM pc                   */
1760                         case ICMD_IF_ICMPLE:
1761                         case ICMD_IF_ICMPGE:
1762
1763                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1764                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1765 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1766 # if defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
1767                                 // XXX Fix this soon!!!
1768                                 M_ICMP(s2, s1);
1769 # else
1770                                 M_ICMP(s1, s2);
1771 # endif
1772                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1773 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1774                                 // Generate architecture specific instructions.
1775                                 codegen_emit_instruction(jd, iptr);
1776 #else
1777 # error Unable to generate code for this configuration!
1778 #endif
1779                                 break;
1780
1781                         case ICMD_IF_LCMPEQ:  /* ..., value, value ==> ...                */
1782                         case ICMD_IF_LCMPNE:  /* op1 = target JavaVM pc                   */
1783                         case ICMD_IF_LCMPLT:
1784                         case ICMD_IF_LCMPGT:
1785                         case ICMD_IF_LCMPLE:
1786                         case ICMD_IF_LCMPGE:
1787
1788                                 // Generate architecture specific instructions.
1789                                 codegen_emit_instruction(jd, iptr);
1790                                 break;
1791
1792                         case ICMD_RETURN:     /* ...  ==> ...                             */
1793
1794                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1795                                 goto nowperformreturn;
1796
1797                         case ICMD_ARETURN:    /* ..., retvalue ==> ...                    */
1798
1799                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1800                                 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1801                                 // XXX M68K: This should actually be M_ADR2INTMOVE(s1, REG_RESULT);
1802                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1803                                 emit_imove(cd, s1, REG_RESULT);
1804
1805 #ifdef ENABLE_VERIFIER
1806                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1807                                         PROFILE_CYCLE_STOP;
1808                                         unresolved_class *uc = iptr->sx.s23.s2.uc;
1809                                         patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1810                                         PROFILE_CYCLE_START;
1811                                 }
1812 #endif /* ENABLE_VERIFIER */
1813                                 goto nowperformreturn;
1814
1815                         case ICMD_IRETURN:    /* ..., retvalue ==> ...                    */
1816
1817                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1818                                 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1819                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1820                                 emit_imove(cd, s1, REG_RESULT);
1821                                 goto nowperformreturn;
1822
1823                         case ICMD_LRETURN:    /* ..., retvalue ==> ...                    */
1824
1825                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1826                                 s1 = emit_load_s1(jd, iptr, REG_LRESULT);
1827                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1828                                 emit_lmove(cd, s1, REG_LRESULT);
1829                                 goto nowperformreturn;
1830
1831                         case ICMD_FRETURN:    /* ..., retvalue ==> ...                    */
1832
1833                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1834                                 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1835                                 // XXX ARM: Here this was M_CAST_F2I(s1, REG_RESULT);
1836                                 emit_fmove(cd, s1, REG_FRESULT);
1837                                 goto nowperformreturn;
1838
1839                         case ICMD_DRETURN:    /* ..., retvalue ==> ...                    */
1840
1841                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1842                                 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1843                                 // XXX ARM: Here this was M_CAST_D2L(s1, REG_RESULT_PACKED);
1844                                 emit_dmove(cd, s1, REG_FRESULT);
1845                                 goto nowperformreturn;
1846
1847 nowperformreturn:
1848 #if !defined(NDEBUG)
1849                                 // Call trace function.
1850                                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1851                                         emit_verbosecall_exit(jd);
1852 #endif
1853
1854 #if defined(ENABLE_THREADS)
1855                                 // Emit code to call monitorexit function.
1856                                 if (checksync && code_is_synchronized(code)) {
1857                                         emit_monitor_exit(jd, rd->memuse * 8);
1858                                 }
1859 #endif
1860
1861                                 // Generate method profiling code.
1862                                 PROFILE_CYCLE_STOP;
1863
1864                                 // Emit code for the method epilog.
1865                                 codegen_emit_epilog(jd);
1866                                 ALIGNCODENOP;
1867                                 break;
1868
1869                         case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...        */
1870
1871                                 REPLACEMENT_POINT_FORGC_BUILTIN(cd, iptr);
1872
1873                                 bte = iptr->sx.s23.s3.bte;
1874                                 md  = bte->md;
1875
1876 #if defined(ENABLE_ESCAPE_REASON) && defined(__I386__)
1877                                 if (bte->fp == BUILTIN_escape_reason_new) {
1878                                         void set_escape_reasons(void *);
1879                                         M_ASUB_IMM(8, REG_SP);
1880                                         M_MOV_IMM(iptr->escape_reasons, REG_ITMP1);
1881                                         M_AST(EDX, REG_SP, 4);
1882                                         M_AST(REG_ITMP1, REG_SP, 0);
1883                                         M_MOV_IMM(set_escape_reasons, REG_ITMP1);
1884                                         M_CALL(REG_ITMP1);
1885                                         M_ALD(EDX, REG_SP, 4);
1886                                         M_AADD_IMM(8, REG_SP);
1887                                 }
1888 #endif
1889
1890                                 goto gen_method;
1891
1892                         case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...        */
1893                         case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
1894                         case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
1895                         case ICMD_INVOKEINTERFACE:
1896
1897                                 REPLACEMENT_POINT_INVOKE(cd, iptr);
1898
1899                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1900                                         unresolved_method* um = iptr->sx.s23.s3.um;
1901                                         md = um->methodref->parseddesc.md;
1902                                 }
1903                                 else {
1904                                         methodinfo* lm = iptr->sx.s23.s3.fmiref->p.method;
1905                                         md = lm->parseddesc;
1906                                 }
1907
1908 gen_method:
1909                                 i = md->paramcount;
1910
1911                                 // XXX Check this again!
1912                                 MCODECHECK((i << 1) + 64);   // PPC
1913
1914                                 // Copy arguments to registers or stack location.
1915                                 for (i = i - 1; i >= 0; i--) {
1916                                         var = VAR(iptr->sx.s23.s2.args[i]);
1917                                         d   = md->params[i].regoff;
1918
1919                                         // Already pre-allocated?
1920                                         if (var->flags & PREALLOC)
1921                                                 continue;
1922
1923                                         if (!md->params[i].inmemory) {
1924                                                 assert(ARG_CNT > 0);
1925                                                 s1 = emit_load(jd, iptr, var, d);
1926
1927                                                 switch (var->type) {
1928                                                 case TYPE_ADR:
1929                                                 case TYPE_INT:
1930                                                         assert(INT_ARG_CNT > 0);
1931                                                         emit_imove(cd, s1, d);
1932                                                         break;
1933
1934 #if 0 //XXX For ARM:
1935 if (!md->params[s3].inmemory) {
1936         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1937         if (IS_2_WORD_TYPE(var->type))
1938                 M_CAST_D2L(s1, d);
1939         else
1940                 M_CAST_F2I(s1, d);
1941 }
1942 #endif //XXX End of ARM!
1943
1944                                                 case TYPE_LNG:
1945                                                         emit_lmove(cd, s1, d);
1946                                                         break;
1947
1948                                                 case TYPE_FLT:
1949                                                         emit_fmove(cd, s1, d);
1950                                                         break;
1951
1952                                                 case TYPE_DBL:
1953                                                         emit_dmove(cd, s1, d);
1954                                                         break;
1955                                                 }
1956                                         }
1957                                         else {
1958                                                 switch (var->type) {
1959                                                 case TYPE_ADR:
1960                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
1961                                                         // XXX M68K: This should actually be like this:
1962                                                         //     s1 = emit_load(jd, iptr, var, REG_ATMP1);
1963                                                         // XXX Sparc64: Here this actually was:
1964                                                         //     M_STX(s1, REG_SP, JITSTACK + d);
1965                                                         M_AST(s1, REG_SP, d);
1966                                                         break;
1967
1968                                                 case TYPE_INT:
1969 #if SIZEOF_VOID_P == 4
1970                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
1971                                                         M_IST(s1, REG_SP, d);
1972                                                         break;
1973 #else
1974                                                         /* fall-through */
1975 #endif
1976
1977                                                 case TYPE_LNG:
1978                                                         s1 = emit_load(jd, iptr, var, REG_LTMP12);
1979                                                         // XXX Sparc64: Here this actually was:
1980                                                         //     M_STX(s1, REG_SP, JITSTACK + d);
1981                                                         M_LST(s1, REG_SP, d);
1982                                                         break;
1983
1984                                                 case TYPE_FLT:
1985 #if SIZEOF_VOID_P == 4
1986                                                         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1987                                                         M_FST(s1, REG_SP, d);
1988                                                         break;
1989 #else
1990                                                         /* fall-through */
1991 #endif
1992
1993                                                 case TYPE_DBL:
1994                                                         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1995                                                         // XXX Sparc64: Here this actually was:
1996                                                         //     M_DST(s1, REG_SP, JITSTACK + d);
1997                                                         M_DST(s1, REG_SP, d);
1998                                                         break;
1999                                                 }
2000                                         }
2001                                 }
2002
2003                                 // Generate method profiling code.
2004                                 PROFILE_CYCLE_STOP;
2005
2006                                 // Generate architecture specific instructions.
2007                                 codegen_emit_instruction(jd, iptr);
2008
2009                                 // Generate method profiling code.
2010                                 PROFILE_CYCLE_START;
2011
2012                                 // Store size of call code in replacement point.
2013                                 REPLACEMENT_POINT_INVOKE_RETURN(cd, iptr);
2014                                 REPLACEMENT_POINT_FORGC_BUILTIN_RETURN(cd, iptr);
2015
2016                                 // Recompute the procedure vector (PV).
2017                                 emit_recompute_pv(cd);
2018
2019                                 // Store return value.
2020 #if defined(ENABLE_SSA)
2021                                 if ((ls == NULL) /* || (!IS_TEMPVAR_INDEX(iptr->dst.varindex)) */ ||
2022                                         (ls->lifetime[iptr->dst.varindex].type != UNUSED))
2023                                         /* a "living" stackslot */
2024 #endif
2025                                 switch (md->returntype.type) {
2026                                 case TYPE_INT:
2027                                 case TYPE_ADR:
2028                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2029                                         // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2030                                         emit_imove(cd, REG_RESULT, s1);
2031                                         emit_store_dst(jd, iptr, s1);
2032                                         break;
2033
2034                                 case TYPE_LNG:
2035                                         s1 = codegen_reg_of_dst(jd, iptr, REG_LRESULT);
2036                                         // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2037                                         emit_lmove(cd, REG_LRESULT, s1);
2038                                         emit_store_dst(jd, iptr, s1);
2039                                         break;
2040
2041 #if 0 //XXX For ARM!!!
2042 #if !defined(ENABLE_SOFTFLOAT)
2043                                 } else {
2044                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2045                                         if (IS_2_WORD_TYPE(d))
2046                                                 M_CAST_L2D(REG_RESULT_PACKED, s1);
2047                                         else
2048                                                 M_CAST_I2F(REG_RESULT, s1);
2049                                 }
2050 #endif /* !defined(ENABLE_SOFTFLOAT) */
2051 #endif //XXX End of ARM
2052
2053                                 case TYPE_FLT:
2054                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2055                                         emit_fmove(cd, REG_FRESULT, s1);
2056                                         emit_store_dst(jd, iptr, s1);
2057                                         break;
2058
2059                                 case TYPE_DBL:
2060                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2061                                         emit_dmove(cd, REG_FRESULT, s1);
2062                                         emit_store_dst(jd, iptr, s1);
2063                                         break;
2064
2065                                 case TYPE_VOID:
2066                                         break;
2067                                 }
2068
2069                                 break;
2070
2071                         case ICMD_TABLESWITCH:  /* ..., index ==> ...                     */
2072
2073                                 // Generate architecture specific instructions.
2074                                 codegen_emit_instruction(jd, iptr);
2075                                 break;
2076
2077                         case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                       */
2078
2079                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2080                                 i = iptr->sx.s23.s2.lookupcount;
2081
2082                                 // XXX Again we need to check this
2083                                 MCODECHECK((i<<2)+8);   // Alpha, ARM, i386, MIPS, M68K, Sparc64
2084                                 MCODECHECK((i<<3)+8);   // PPC64
2085                                 MCODECHECK(8 + ((7 + 6) * i) + 5);   // X86_64, S390
2086
2087                                 // Compare keys.
2088                                 for (lookup_target_t* lookup = iptr->dst.lookup; i > 0; ++lookup, --i) {
2089 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
2090                                         emit_icmp_imm(cd, s1, lookup->value);
2091                                         emit_beq(cd, lookup->target.block);
2092 #elif SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
2093                                         ICONST(REG_ITMP2, lookup->value);
2094                                         emit_beq(cd, lookup->target.block, s1, REG_ITMP2);
2095 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
2096                                         emit_icmpeq_imm(cd, s1, lookup->value, REG_ITMP2);
2097                                         emit_bnez(cd, lookup->target.block, REG_ITMP2);
2098 #else
2099 # error Unable to generate code for this configuration!
2100 #endif
2101                                 }
2102
2103                                 // Default branch.
2104                                 emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2105                                 ALIGNCODENOP;
2106                                 break;
2107
2108                         case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref        */
2109                         case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult        */
2110                         case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2111
2112                                 // Generate architecture specific instructions.
2113                                 codegen_emit_instruction(jd, iptr);
2114                                 break;
2115
2116                         default:
2117                                 exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2118                                                                                            iptr->opc);
2119                                 return false;
2120
2121                         } // the big switch
2122
2123                 } // for all instructions
2124
2125 #if defined(ENABLE_SSA)
2126                 // By edge splitting, in blocks with phi moves there can only
2127                 // be a goto as last command, no other jump/branch command.
2128                 if (ls != NULL) {
2129                         if (!last_cmd_was_goto)
2130                                 codegen_emit_phi_moves(jd, bptr);
2131                 }
2132 #endif
2133
2134 #if defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__S390__) || defined(__SPARC_64__) || defined(__X86_64__)
2135                 // XXX Again!!!
2136                 /* XXX require a lower number? */
2137                 MCODECHECK(64);  // I386, MIPS, Sparc64
2138                 MCODECHECK(512); // S390, X86_64
2139
2140                 /* XXX We can remove that when we don't use UD2 anymore on i386
2141                    and x86_64. */
2142
2143                 /* At the end of a basic block we may have to append some nops,
2144                    because the patcher stub calling code might be longer than the
2145                    actual instruction. So codepatching does not change the
2146                    following block unintentionally. */
2147
2148                 if (cd->mcodeptr < cd->lastmcodeptr) {
2149                         while (cd->mcodeptr < cd->lastmcodeptr) {
2150                                 M_NOP;
2151                         }
2152                 }
2153 #endif
2154
2155         } // for all basic blocks
2156
2157         // Generate traps.
2158         emit_patcher_traps(jd);
2159
2160         // Everything's ok.
2161         return true;
2162 }
2163
2164
2165 /* codegen_emit_phi_moves ****************************************************
2166
2167    Emits phi moves at the end of the basicblock.
2168
2169 *******************************************************************************/
2170
2171 #if defined(ENABLE_SSA)
2172 void codegen_emit_phi_moves(jitdata *jd, basicblock *bptr)
2173 {
2174         int lt_d,lt_s,i;
2175         lsradata *ls;
2176         codegendata *cd;
2177         varinfo *s, *d;
2178         instruction tmp_i;
2179
2180         cd = jd->cd;
2181         ls = jd->ls;
2182
2183         MCODECHECK(512);
2184
2185         /* Moves from phi functions with highest indices have to be */
2186         /* inserted first, since this is the order as is used for   */
2187         /* conflict resolution */
2188
2189         for(i = ls->num_phi_moves[bptr->nr] - 1; i >= 0 ; i--) {
2190                 lt_d = ls->phi_moves[bptr->nr][i][0];
2191                 lt_s = ls->phi_moves[bptr->nr][i][1];
2192 #if defined(SSA_DEBUG_VERBOSE)
2193                 if (compileverbose)
2194                         printf("BB %3i Move %3i <- %3i ", bptr->nr, lt_d, lt_s);
2195 #endif
2196                 if (lt_s == UNUSED) {
2197 #if defined(SSA_DEBUG_VERBOSE)
2198                 if (compileverbose)
2199                         printf(" ... not processed \n");
2200 #endif
2201                         continue;
2202                 }
2203
2204                 d = VAR(ls->lifetime[lt_d].v_index);
2205                 s = VAR(ls->lifetime[lt_s].v_index);
2206
2207
2208                 if (d->type == -1) {
2209 #if defined(SSA_DEBUG_VERBOSE)
2210                         if (compileverbose)
2211                                 printf("...returning - phi lifetimes where joined\n");
2212 #endif
2213                         continue;
2214                 }
2215
2216                 if (s->type == -1) {
2217 #if defined(SSA_DEBUG_VERBOSE)
2218                         if (compileverbose)
2219                                 printf("...returning - phi lifetimes where joined\n");
2220 #endif
2221                         continue;
2222                 }
2223
2224                 tmp_i.opc = 0;
2225                 tmp_i.s1.varindex = ls->lifetime[lt_s].v_index;
2226                 tmp_i.dst.varindex = ls->lifetime[lt_d].v_index;
2227                 emit_copy(jd, &tmp_i);
2228
2229 #if defined(SSA_DEBUG_VERBOSE)
2230                 if (compileverbose) {
2231                         if (IS_INMEMORY(d->flags) && IS_INMEMORY(s->flags)) {
2232                                 /* mem -> mem */
2233                                 printf("M%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2234                         }
2235                         else if (IS_INMEMORY(s->flags)) {
2236                                 /* mem -> reg */
2237                                 printf("R%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2238                         }
2239                         else if (IS_INMEMORY(d->flags)) {
2240                                 /* reg -> mem */
2241                                 printf("M%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2242                         }
2243                         else {
2244                                 /* reg -> reg */
2245                                 printf("R%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2246                         }
2247                         printf("\n");
2248                 }
2249 #endif /* defined(SSA_DEBUG_VERBOSE) */
2250         }
2251 }
2252 #endif /* defined(ENABLE_SSA) */
2253
2254
2255 /* REMOVEME When we have exception handling in C. */
2256
2257 void *md_asm_codegen_get_pv_from_pc(void *ra)
2258 {
2259         return md_codegen_get_pv_from_pc(ra);
2260 }
2261
2262
2263 /*
2264  * These are local overrides for various environment variables in Emacs.
2265  * Please do not remove this and leave it at the end of the file, where
2266  * Emacs will automagically detect them.
2267  * ---------------------------------------------------------------------
2268  * Local variables:
2269  * mode: c++
2270  * indent-tabs-mode: t
2271  * c-basic-offset: 4
2272  * tab-width: 4
2273  * End:
2274  * vim:noexpandtab:sw=4:ts=4:
2275  */