src/vm/jit/codegen-common.cpp

   1 /* src/vm/jit/codegen-common.cpp - architecture independent code generator stuff
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008, 2009
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5    Copyright (C) 2009 Theobroma Systems Ltd.
   6
   7    This file is part of CACAO.
   8
   9    This program is free software; you can redistribute it and/or
  10    modify it under the terms of the GNU General Public License as
  11    published by the Free Software Foundation; either version 2, or (at
  12    your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful, but
  15    WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17    General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  22    02110-1301, USA.
  23
  24    All functions assume the following code area / data area layout:
  25
  26    +-----------+
  27    |           |
  28    | code area | code area grows to higher addresses
  29    |           |
  30    +-----------+ <-- start of procedure
  31    |           |
  32    | data area | data area grows to lower addresses
  33    |           |
  34    +-----------+
  35
  36    The functions first write into a temporary code/data area allocated by
  37    "codegen_init". "codegen_finish" copies the code and data area into permanent
  38    memory. All functions writing values into the data area return the offset
  39    relative the begin of the code area (start of procedure).
  40
  41 */
  42
  43
  44 #include "config.h"
  45
  46 #include <assert.h>
  47 #include <string.h>
  48
  49 #include "vm/types.h"
  50
  51 #include "codegen.h"
  52 #include "md.h"
  53 #include "md-abi.h"
  54
  55 #include "mm/memory.hpp"
  56
  57 #include "toolbox/avl.h"
  58 #include "toolbox/list.hpp"
  59 #include "toolbox/logging.hpp"
  60
  61 #include "native/llni.h"
  62 #include "native/localref.hpp"
  63 #include "native/native.hpp"
  64
  65 #include "threads/thread.hpp"
  66
  67 #include "vm/jit/builtin.hpp"
  68 #include "vm/exceptions.hpp"
  69 #include "vm/method.hpp"
  70 #include "vm/options.h"
  71 #include "vm/statistics.h"
  72 #include "vm/string.hpp"
  73
  74 #include "vm/jit/abi.h"
  75 #include "vm/jit/asmpart.h"
  76 #include "vm/jit/code.hpp"
  77 #include "vm/jit/codegen-common.hpp"
  78
  79 #if defined(ENABLE_DISASSEMBLER)
  80 # include "vm/jit/disass.h"
  81 #endif
  82
  83 #include "vm/jit/dseg.h"
  84 #include "vm/jit/emit-common.hpp"
  85 #include "vm/jit/jit.hpp"
  86 #include "vm/jit/linenumbertable.hpp"
  87 #include "vm/jit/methodheader.h"
  88 #include "vm/jit/methodtree.h"
  89 #include "vm/jit/patcher-common.hpp"
  90 #include "vm/jit/replace.hpp"
  91 #include "vm/jit/show.hpp"
  92 #include "vm/jit/stacktrace.hpp"
  93 #include "vm/jit/trace.hpp"
  94
  95 #include "vm/jit/optimizing/profile.h"
  96
  97 #if defined(ENABLE_SSA)
  98 # include "vm/jit/optimizing/lsra.h"
  99 # include "vm/jit/optimizing/ssa.h"
 100 #elif defined(ENABLE_LSRA)
 101 # include "vm/jit/allocator/lsra.h"
 102 #endif
 103
 104 #if defined(ENABLE_INTRP)
 105 #include "vm/jit/intrp/intrp.h"
 106 #endif
 107
 108 #if defined(ENABLE_VMLOG)
 109 #include <vmlog_cacao.h>
 110 #endif
 111
 112
 113 /* codegen_init ****************************************************************
 114
 115    TODO
 116
 117 *******************************************************************************/
 118
 119 void codegen_init(void)
 120 {
 121 }
 122
 123
 124 /* codegen_setup ***************************************************************
 125
 126    Allocates and initialises code area, data area and references.
 127
 128 *******************************************************************************/
 129
 130 void codegen_setup(jitdata *jd)
 131 {
 132         methodinfo  *m;
 133         codegendata *cd;
 134
 135         /* get required compiler data */
 136
 137         m  = jd->m;
 138         cd = jd->cd;
 139
 140         /* initialize members */
 141
 142         // Set flags as requested.
 143         if (opt_AlwaysEmitLongBranches) {
 144                 cd->flags = CODEGENDATA_FLAG_LONGBRANCHES;
 145         }
 146         else {
 147                 cd->flags = 0;
 148         }
 149
 150         cd->mcodebase    = (u1*) DumpMemory::allocate(MCODEINITSIZE);
 151         cd->mcodeend     = cd->mcodebase + MCODEINITSIZE;
 152         cd->mcodesize    = MCODEINITSIZE;
 153
 154         /* initialize mcode variables */
 155
 156         cd->mcodeptr     = cd->mcodebase;
 157         cd->lastmcodeptr = cd->mcodebase;
 158
 159 #if defined(ENABLE_INTRP)
 160         /* native dynamic superinstructions variables */
 161
 162         if (opt_intrp) {
 163                 cd->ncodebase = (u1*) DumpMemory::allocate(NCODEINITSIZE);
 164                 cd->ncodesize = NCODEINITSIZE;
 165
 166                 /* initialize ncode variables */
 167
 168                 cd->ncodeptr = cd->ncodebase;
 169
 170                 cd->lastinstwithoutdispatch = ~0; /* no inst without dispatch */
 171                 cd->superstarts = NULL;
 172         }
 173 #endif
 174
 175         cd->dseg           = NULL;
 176         cd->dseglen        = 0;
 177
 178         cd->jumpreferences = NULL;
 179
 180 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 181         cd->datareferences = NULL;
 182 #endif
 183
 184         cd->brancheslabel  = new DumpList<branch_label_ref_t*>();
 185         cd->linenumbers    = new DumpList<Linenumber>();
 186 }
 187
 188
 189 /* codegen_reset ***************************************************************
 190
 191    Resets the codegen data structure so we can recompile the method.
 192
 193 *******************************************************************************/
 194
 195 static void codegen_reset(jitdata *jd)
 196 {
 197         codeinfo    *code;
 198         codegendata *cd;
 199         basicblock  *bptr;
 200
 201         /* get required compiler data */
 202
 203         code = jd->code;
 204         cd   = jd->cd;
 205
 206         /* reset error flag */
 207
 208         cd->flags          &= ~CODEGENDATA_FLAG_ERROR;
 209
 210         /* reset some members, we reuse the code memory already allocated
 211            as this should have almost the correct size */
 212
 213         cd->mcodeptr        = cd->mcodebase;
 214         cd->lastmcodeptr    = cd->mcodebase;
 215
 216         cd->dseg            = NULL;
 217         cd->dseglen         = 0;
 218
 219         cd->jumpreferences  = NULL;
 220
 221 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 222         cd->datareferences  = NULL;
 223 #endif
 224
 225         cd->brancheslabel   = new DumpList<branch_label_ref_t*>();
 226         cd->linenumbers     = new DumpList<Linenumber>();
 227
 228         /* We need to clear the mpc and the branch references from all
 229            basic blocks as they will definitely change. */
 230
 231         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 232                 bptr->mpc        = -1;
 233                 bptr->branchrefs = NULL;
 234         }
 235
 236         /* We need to clear all the patcher references from the codeinfo
 237            since they all will be regenerated */
 238
 239         patcher_list_reset(code);
 240
 241 #if defined(ENABLE_REPLACEMENT)
 242         code->rplpoints     = NULL;
 243         code->rplpointcount = 0;
 244         code->regalloc      = NULL;
 245         code->regalloccount = 0;
 246         code->globalcount   = 0;
 247 #endif
 248 }
 249
 250
 251 /* codegen_generate ************************************************************
 252
 253    Generates the code for the currently compiled method.
 254
 255 *******************************************************************************/
 256
 257 bool codegen_generate(jitdata *jd)
 258 {
 259         codegendata *cd;
 260
 261         /* get required compiler data */
 262
 263         cd = jd->cd;
 264
 265         /* call the machine-dependent code generation function */
 266
 267         if (!codegen_emit(jd))
 268                 return false;
 269
 270         /* check for an error */
 271
 272         if (CODEGENDATA_HAS_FLAG_ERROR(cd)) {
 273                 /* check for long-branches flag, if it is set we recompile the
 274                    method */
 275
 276 #if !defined(NDEBUG)
 277         if (compileverbose)
 278             log_message_method("Re-generating code: ", jd->m);
 279 #endif
 280
 281                 /* XXX maybe we should tag long-branches-methods for recompilation */
 282
 283                 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 284                         /* we have to reset the codegendata structure first */
 285
 286                         codegen_reset(jd);
 287
 288                         /* and restart the compiler run */
 289
 290                         if (!codegen_emit(jd))
 291                                 return false;
 292                 }
 293                 else {
 294                         os::abort("codegen_generate: unknown error occurred during codegen_emit: flags=%x\n", cd->flags);
 295                 }
 296
 297 #if !defined(NDEBUG)
 298         if (compileverbose)
 299             log_message_method("Re-generating code done: ", jd->m);
 300 #endif
 301         }
 302
 303         /* reallocate the memory and finish the code generation */
 304
 305         codegen_finish(jd);
 306
 307         /* everything's ok */
 308
 309         return true;
 310 }
 311
 312
 313 /* codegen_close ***************************************************************
 314
 315    TODO
 316
 317 *******************************************************************************/
 318
 319 void codegen_close(void)
 320 {
 321         /* TODO: release avl tree on i386 and x86_64 */
 322 }
 323
 324
 325 /* codegen_increase ************************************************************
 326
 327    Doubles code area.
 328
 329 *******************************************************************************/
 330
 331 void codegen_increase(codegendata *cd)
 332 {
 333         u1 *oldmcodebase;
 334
 335         /* save old mcodebase pointer */
 336
 337         oldmcodebase = cd->mcodebase;
 338
 339         /* reallocate to new, doubled memory */
 340
 341         cd->mcodebase = (u1*) DumpMemory::reallocate(cd->mcodebase,
 342                                                                                                  cd->mcodesize,
 343                                                                                                  cd->mcodesize * 2);
 344         cd->mcodesize *= 2;
 345         cd->mcodeend   = cd->mcodebase + cd->mcodesize;
 346
 347         /* set new mcodeptr */
 348
 349         cd->mcodeptr = cd->mcodebase + (cd->mcodeptr - oldmcodebase);
 350
 351 #if defined(__I386__) || defined(__MIPS__) || defined(__X86_64__) || defined(__M68K__) || defined(ENABLE_INTRP) \
 352  || defined(__SPARC_64__)
 353         /* adjust the pointer to the last patcher position */
 354
 355         if (cd->lastmcodeptr != NULL)
 356                 cd->lastmcodeptr = cd->mcodebase + (cd->lastmcodeptr - oldmcodebase);
 357 #endif
 358 }
 359
 360
 361 /* codegen_ncode_increase ******************************************************
 362
 363    Doubles code area.
 364
 365 *******************************************************************************/
 366
 367 #if defined(ENABLE_INTRP)
 368 u1 *codegen_ncode_increase(codegendata *cd, u1 *ncodeptr)
 369 {
 370         u1 *oldncodebase;
 371
 372         /* save old ncodebase pointer */
 373
 374         oldncodebase = cd->ncodebase;
 375
 376         /* reallocate to new, doubled memory */
 377
 378         cd->ncodebase = DMREALLOC(cd->ncodebase,
 379                                                           u1,
 380                                                           cd->ncodesize,
 381                                                           cd->ncodesize * 2);
 382         cd->ncodesize *= 2;
 383
 384         /* return the new ncodeptr */
 385
 386         return (cd->ncodebase + (ncodeptr - oldncodebase));
 387 }
 388 #endif
 389
 390
 391 /* codegen_add_branch_ref ******************************************************
 392
 393    Prepends an branch to the list.
 394
 395 *******************************************************************************/
 396
 397 void codegen_add_branch_ref(codegendata *cd, basicblock *target, s4 condition, s4 reg, u4 options)
 398 {
 399         branchref *br;
 400         s4         branchmpc;
 401
 402         STATISTICS(count_branches_unresolved++);
 403
 404         /* calculate the mpc of the branch instruction */
 405
 406         branchmpc = cd->mcodeptr - cd->mcodebase;
 407
 408         br = (branchref*) DumpMemory::allocate(sizeof(branchref));
 409
 410         br->branchmpc = branchmpc;
 411         br->condition = condition;
 412         br->reg       = reg;
 413         br->options   = options;
 414         br->next      = target->branchrefs;
 415
 416         target->branchrefs = br;
 417 }
 418
 419
 420 /* codegen_resolve_branchrefs **************************************************
 421
 422    Resolves and patches the branch references of a given basic block.
 423
 424 *******************************************************************************/
 425
 426 void codegen_resolve_branchrefs(codegendata *cd, basicblock *bptr)
 427 {
 428         branchref *br;
 429         u1        *mcodeptr;
 430
 431         /* Save the mcodeptr because in the branch emitting functions
 432            we generate code somewhere inside already generated code,
 433            but we're still in the actual code generation phase. */
 434
 435         mcodeptr = cd->mcodeptr;
 436
 437         /* just to make sure */
 438
 439         assert(bptr->mpc >= 0);
 440
 441         for (br = bptr->branchrefs; br != NULL; br = br->next) {
 442                 /* temporary set the mcodeptr */
 443
 444                 cd->mcodeptr = cd->mcodebase + br->branchmpc;
 445
 446                 /* emit_bccz and emit_branch emit the correct code, even if we
 447                    pass condition == BRANCH_UNCONDITIONAL or reg == -1. */
 448
 449                 emit_bccz(cd, bptr, br->condition, br->reg, br->options);
 450         }
 451
 452         /* restore mcodeptr */
 453
 454         cd->mcodeptr = mcodeptr;
 455 }
 456
 457
 458 /* codegen_branch_label_add ****************************************************
 459
 460    Append an branch to the label-branch list.
 461
 462 *******************************************************************************/
 463
 464 void codegen_branch_label_add(codegendata *cd, s4 label, s4 condition, s4 reg, u4 options)
 465 {
 466         // Calculate the current mpc.
 467         int32_t mpc = cd->mcodeptr - cd->mcodebase;
 468
 469         branch_label_ref_t* br = (branch_label_ref_t*) DumpMemory::allocate(sizeof(branch_label_ref_t));
 470
 471         br->mpc       = mpc;
 472         br->label     = label;
 473         br->condition = condition;
 474         br->reg       = reg;
 475         br->options   = options;
 476
 477         // Add the branch to the list.
 478         cd->brancheslabel->push_back(br);
 479 }
 480
 481
 482 /* codegen_set_replacement_point_notrap ****************************************
 483
 484    Record the position of a non-trappable replacement point.
 485
 486 *******************************************************************************/
 487
 488 #if defined(ENABLE_REPLACEMENT)
 489 #if !defined(NDEBUG)
 490 void codegen_set_replacement_point_notrap(codegendata *cd, s4 type)
 491 #else
 492 void codegen_set_replacement_point_notrap(codegendata *cd)
 493 #endif
 494 {
 495         assert(cd->replacementpoint);
 496         assert(cd->replacementpoint->type == type);
 497         assert(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP);
 498
 499         cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
 500
 501         cd->replacementpoint++;
 502 }
 503 #endif /* defined(ENABLE_REPLACEMENT) */
 504
 505
 506 /* codegen_set_replacement_point ***********************************************
 507
 508    Record the position of a trappable replacement point.
 509
 510 *******************************************************************************/
 511
 512 #if defined(ENABLE_REPLACEMENT)
 513 #if !defined(NDEBUG)
 514 void codegen_set_replacement_point(codegendata *cd, s4 type)
 515 #else
 516 void codegen_set_replacement_point(codegendata *cd)
 517 #endif
 518 {
 519         assert(cd->replacementpoint);
 520         assert(cd->replacementpoint->type == type);
 521         assert(!(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP));
 522
 523         cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
 524
 525         cd->replacementpoint++;
 526
 527 #if !defined(NDEBUG)
 528         /* XXX actually we should use an own REPLACEMENT_NOPS here! */
 529         if (opt_TestReplacement)
 530                 PATCHER_NOPS;
 531 #endif
 532
 533         /* XXX assert(cd->lastmcodeptr <= cd->mcodeptr); */
 534
 535         cd->lastmcodeptr = cd->mcodeptr + PATCHER_CALL_SIZE;
 536 }
 537 #endif /* defined(ENABLE_REPLACEMENT) */
 538
 539
 540 /* codegen_finish **************************************************************
 541
 542    Finishes the code generation. A new memory, large enough for both
 543    data and code, is allocated and data and code are copied together
 544    to their final layout, unresolved jumps are resolved, ...
 545
 546 *******************************************************************************/
 547
 548 void codegen_finish(jitdata *jd)
 549 {
 550         s4       mcodelen;
 551 #if defined(ENABLE_INTRP)
 552         s4       ncodelen;
 553 #endif
 554         s4       alignedmcodelen;
 555         jumpref *jr;
 556         u1      *epoint;
 557         s4       alignedlen;
 558
 559         /* Get required compiler data. */
 560
 561         codeinfo*     code = jd->code;
 562         codegendata*  cd   = jd->cd;
 563         registerdata* rd   = jd->rd;
 564
 565         /* prevent compiler warning */
 566
 567 #if defined(ENABLE_INTRP)
 568         ncodelen = 0;
 569 #endif
 570
 571         /* calculate the code length */
 572
 573         mcodelen = (s4) (cd->mcodeptr - cd->mcodebase);
 574
 575 #if defined(ENABLE_STATISTICS)
 576         if (opt_stat) {
 577                 count_code_len += mcodelen;
 578                 count_data_len += cd->dseglen;
 579         }
 580 #endif
 581
 582         alignedmcodelen = MEMORY_ALIGN(mcodelen, MAX_ALIGN);
 583
 584 #if defined(ENABLE_INTRP)
 585         if (opt_intrp)
 586                 ncodelen = cd->ncodeptr - cd->ncodebase;
 587         else {
 588                 ncodelen = 0; /* avoid compiler warning */
 589         }
 590 #endif
 591
 592         cd->dseglen = MEMORY_ALIGN(cd->dseglen, MAX_ALIGN);
 593         alignedlen = alignedmcodelen + cd->dseglen;
 594
 595 #if defined(ENABLE_INTRP)
 596         if (opt_intrp) {
 597                 alignedlen += ncodelen;
 598         }
 599 #endif
 600
 601         /* allocate new memory */
 602
 603         code->mcodelength = mcodelen + cd->dseglen;
 604         code->mcode       = CNEW(u1, alignedlen);
 605
 606         /* set the entrypoint of the method */
 607
 608         assert(code->entrypoint == NULL);
 609         code->entrypoint = epoint = (code->mcode + cd->dseglen);
 610
 611         /* fill the data segment (code->entrypoint must already be set!) */
 612
 613         dseg_finish(jd);
 614
 615         /* copy code to the new location */
 616
 617         MCOPY((void *) code->entrypoint, cd->mcodebase, u1, mcodelen);
 618
 619 #if defined(ENABLE_INTRP)
 620         /* relocate native dynamic superinstruction code (if any) */
 621
 622         if (opt_intrp) {
 623                 cd->mcodebase = code->entrypoint;
 624
 625                 if (ncodelen > 0) {
 626                         u1 *ncodebase = code->mcode + cd->dseglen + alignedmcodelen;
 627
 628                         MCOPY((void *) ncodebase, cd->ncodebase, u1, ncodelen);
 629
 630                         /* flush the instruction and data caches */
 631
 632                         md_cacheflush(ncodebase, ncodelen);
 633
 634                         /* set some cd variables for dynamic_super_rerwite */
 635
 636                         cd->ncodebase = ncodebase;
 637
 638                 } else {
 639                         cd->ncodebase = NULL;
 640                 }
 641
 642                 dynamic_super_rewrite(cd);
 643         }
 644 #endif
 645
 646         /* Fill runtime information about generated code. */
 647
 648         code->stackframesize     = cd->stackframesize;
 649         code->synchronizedoffset = rd->memuse * 8;
 650         code->savedintcount      = INT_SAV_CNT - rd->savintreguse;
 651         code->savedfltcount      = FLT_SAV_CNT - rd->savfltreguse;
 652 #if defined(HAS_ADDRESS_REGISTER_FILE)
 653         code->savedadrcount      = ADR_SAV_CNT - rd->savadrreguse;
 654 #endif
 655
 656         /* Create the exception table. */
 657
 658         exceptiontable_create(jd);
 659
 660         /* Create the linenumber table. */
 661
 662         code->linenumbertable = new LinenumberTable(jd);
 663
 664         /* jump table resolving */
 665
 666         for (jr = cd->jumpreferences; jr != NULL; jr = jr->next)
 667                 *((functionptr *) ((ptrint) epoint + jr->tablepos)) =
 668                         (functionptr) ((ptrint) epoint + (ptrint) jr->target->mpc);
 669
 670         /* patcher resolving */
 671
 672         patcher_resolve(jd);
 673
 674 #if defined(ENABLE_REPLACEMENT)
 675         /* replacement point resolving */
 676         {
 677                 int i;
 678                 rplpoint *rp;
 679
 680                 rp = code->rplpoints;
 681                 for (i=0; i<code->rplpointcount; ++i, ++rp) {
 682                         rp->pc = (u1*) ((ptrint) epoint + (ptrint) rp->pc);
 683                 }
 684         }
 685 #endif /* defined(ENABLE_REPLACEMENT) */
 686
 687         /* Insert method into methodtree to find the entrypoint. */
 688
 689         methodtree_insert(code->entrypoint, code->entrypoint + mcodelen);
 690
 691 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
 692         /* resolve data segment references */
 693
 694         dseg_resolve_datareferences(jd);
 695 #endif
 696
 697         /* flush the instruction and data caches */
 698
 699         md_cacheflush(code->mcode, code->mcodelength);
 700 }
 701
 702
 703 /* codegen_start_native_call ***************************************************
 704
 705    Prepares the stuff required for a native (JNI) function call:
 706
 707    - adds a stackframe info structure to the chain, for stacktraces
 708    - prepares the local references table on the stack
 709
 710    The layout of the native stub stackframe should look like this:
 711
 712    +---------------------------+ <- java SP (of parent Java function)
 713    | return address            |
 714    +---------------------------+ <- data SP
 715    |                           |
 716    | stackframe info structure |
 717    |                           |
 718    +---------------------------+
 719    |                           |
 720    | local references table    |
 721    |                           |
 722    +---------------------------+
 723    |                           |
 724    | saved registers (if any)  |
 725    |                           |
 726    +---------------------------+
 727    |                           |
 728    | arguments (if any)        |
 729    |                           |
 730    +---------------------------+ <- current SP (native stub)
 731
 732 *******************************************************************************/
 733
 734 java_handle_t *codegen_start_native_call(u1 *sp, u1 *pv)
 735 {
 736         stackframeinfo_t *sfi;
 737         localref_table   *lrt;
 738         codeinfo         *code;
 739         methodinfo       *m;
 740         int32_t           framesize;
 741
 742         uint8_t  *datasp;
 743         uint8_t  *javasp;
 744         uint64_t *arg_regs;
 745         uint64_t *arg_stack;
 746
 747         STATISTICS(count_calls_java_to_native++);
 748
 749         // Get information from method header.
 750         code = code_get_codeinfo_for_pv(pv);
 751         assert(code != NULL);
 752
 753         framesize = md_stacktrace_get_framesize(code);
 754         assert(framesize >= (int32_t) (sizeof(stackframeinfo_t) + sizeof(localref_table)));
 755
 756         // Get the methodinfo.
 757         m = code_get_methodinfo_for_pv(pv);
 758         assert(m);
 759
 760         /* calculate needed values */
 761
 762 #if defined(__ALPHA__) || defined(__ARM__)
 763         datasp    = sp + framesize - SIZEOF_VOID_P;
 764         javasp    = sp + framesize;
 765         arg_regs  = (uint64_t *) sp;
 766         arg_stack = (uint64_t *) javasp;
 767 #elif defined(__MIPS__)
 768         /* MIPS always uses 8 bytes to store the RA */
 769         datasp    = sp + framesize - 8;
 770         javasp    = sp + framesize;
 771 # if SIZEOF_VOID_P == 8
 772         arg_regs  = (uint64_t *) sp;
 773 # else
 774         arg_regs  = (uint64_t *) (sp + 5 * 8);
 775 # endif
 776         arg_stack = (uint64_t *) javasp;
 777 #elif defined(__S390__)
 778         datasp    = sp + framesize - 8;
 779         javasp    = sp + framesize;
 780         arg_regs  = (uint64_t *) (sp + 96);
 781         arg_stack = (uint64_t *) javasp;
 782 #elif defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
 783         datasp    = sp + framesize;
 784         javasp    = sp + framesize + SIZEOF_VOID_P;
 785         arg_regs  = (uint64_t *) sp;
 786         arg_stack = (uint64_t *) javasp;
 787 #elif defined(__POWERPC__)
 788         datasp    = sp + framesize;
 789         javasp    = sp + framesize;
 790         arg_regs  = (uint64_t *) (sp + LA_SIZE + 4 * SIZEOF_VOID_P);
 791         arg_stack = (uint64_t *) javasp;
 792 #elif defined(__POWERPC64__)
 793         datasp    = sp + framesize;
 794         javasp    = sp + framesize;
 795         arg_regs  = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 4 * SIZEOF_VOID_P);
 796         arg_stack = (uint64_t *) javasp;
 797 #else
 798         /* XXX is was unable to do this port for SPARC64, sorry. (-michi) */
 799         /* XXX maybe we need to pass the RA as argument there */
 800         os::abort("codegen_start_native_call: unsupported architecture");
 801 #endif
 802
 803         /* get data structures from stack */
 804
 805         sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
 806         lrt = (localref_table *)   (datasp - sizeof(stackframeinfo_t) -
 807                                                                 sizeof(localref_table));
 808
 809 #if defined(ENABLE_JNI)
 810         /* add current JNI local references table to this thread */
 811
 812         localref_table_add(lrt);
 813 #endif
 814
 815 #if !defined(NDEBUG)
 816 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
 817         /* print the call-trace if necesarry */
 818         /* BEFORE: filling the local reference table */
 819
 820         if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
 821                 trace_java_call_enter(m, arg_regs, arg_stack);
 822 # endif
 823 #endif
 824
 825 #if defined(ENABLE_HANDLES)
 826         /* place all references into the local reference table */
 827         /* BEFORE: creating stackframeinfo */
 828
 829         localref_native_enter(m, arg_regs, arg_stack);
 830 #endif
 831
 832         /* Add a stackframeinfo for this native method.  We don't have RA
 833            and XPC here.  These are determined in
 834            stacktrace_stackframeinfo_add. */
 835
 836         stacktrace_stackframeinfo_add(sfi, pv, sp, NULL, NULL);
 837
 838         /* Return a wrapped classinfo for static methods. */
 839
 840         if (m->flags & ACC_STATIC)
 841                 return (java_handle_t *) LLNI_classinfo_wrap(m->clazz);
 842         else
 843                 return NULL;
 844 }
 845
 846
 847 /* codegen_finish_native_call **************************************************
 848
 849    Removes the stuff required for a native (JNI) function call.
 850    Additionally it checks for an exceptions and in case, get the
 851    exception object and clear the pointer.
 852
 853 *******************************************************************************/
 854
 855 java_object_t *codegen_finish_native_call(u1 *sp, u1 *pv)
 856 {
 857         stackframeinfo_t *sfi;
 858         java_handle_t    *e;
 859         java_object_t    *o;
 860         codeinfo         *code;
 861         methodinfo       *m;
 862         int32_t           framesize;
 863
 864         uint8_t  *datasp;
 865         uint64_t *ret_regs;
 866
 867         // Get information from method header.
 868         code = code_get_codeinfo_for_pv(pv);
 869         assert(code != NULL);
 870
 871         framesize = md_stacktrace_get_framesize(code);
 872
 873         // Get the methodinfo.
 874         m = code->m;
 875         assert(m != NULL);
 876
 877         /* calculate needed values */
 878
 879 #if defined(__ALPHA__) || defined(__ARM__)
 880         datasp   = sp + framesize - SIZEOF_VOID_P;
 881         ret_regs = (uint64_t *) sp;
 882 #elif defined(__MIPS__)
 883         /* MIPS always uses 8 bytes to store the RA */
 884         datasp   = sp + framesize - 8;
 885 # if SIZEOF_VOID_P == 8
 886         ret_regs = (uint64_t *) sp;
 887 # else
 888         ret_regs = (uint64_t *) (sp + 1 * 8);
 889 # endif
 890 #elif defined(__S390__)
 891         datasp   = sp + framesize - 8;
 892         ret_regs = (uint64_t *) (sp + 96);
 893 #elif defined(__I386__)
 894         datasp   = sp + framesize;
 895         ret_regs = (uint64_t *) (sp + 2 * SIZEOF_VOID_P);
 896 #elif defined(__M68K__)
 897         datasp   = sp + framesize;
 898         ret_regs = (uint64_t *) (sp + 2 * 8);
 899 #elif defined(__X86_64__)
 900         datasp   = sp + framesize;
 901         ret_regs = (uint64_t *) sp;
 902 #elif defined(__POWERPC__)
 903         datasp   = sp + framesize;
 904         ret_regs = (uint64_t *) (sp + LA_SIZE + 2 * SIZEOF_VOID_P);
 905 #elif defined(__POWERPC64__)
 906         datasp   = sp + framesize;
 907         ret_regs = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 2 * SIZEOF_VOID_P);
 908 #else
 909         os::abort("codegen_finish_native_call: unsupported architecture");
 910 #endif
 911
 912         /* get data structures from stack */
 913
 914         sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
 915
 916         /* Remove current stackframeinfo from chain. */
 917
 918         stacktrace_stackframeinfo_remove(sfi);
 919
 920 #if defined(ENABLE_HANDLES)
 921         /* unwrap the return value from the local reference table */
 922         /* AFTER: removing the stackframeinfo */
 923         /* BEFORE: releasing the local reference table */
 924
 925         localref_native_exit(m, ret_regs);
 926 #endif
 927
 928         /* get and unwrap the exception */
 929         /* AFTER: removing the stackframe info */
 930         /* BEFORE: releasing the local reference table */
 931
 932         e = exceptions_get_and_clear_exception();
 933         o = LLNI_UNWRAP(e);
 934
 935 #if defined(ENABLE_JNI)
 936         /* release JNI local references table for this thread */
 937
 938         localref_frame_pop_all();
 939         localref_table_remove();
 940 #endif
 941
 942 #if !defined(NDEBUG)
 943 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
 944         /* print the call-trace if necesarry */
 945         /* AFTER: unwrapping the return value */
 946
 947         if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
 948                 trace_java_call_exit(m, ret_regs);
 949 # endif
 950 #endif
 951
 952         return o;
 953 }
 954
 955
 956 /* codegen_reg_of_var **********************************************************
 957
 958    This function determines a register, to which the result of an
 959    operation should go, when it is ultimatively intended to store the
 960    result in pseudoregister v.  If v is assigned to an actual
 961    register, this register will be returned.  Otherwise (when v is
 962    spilled) this function returns tempregnum.  If not already done,
 963    regoff and flags are set in the stack location.
 964
 965 *******************************************************************************/
 966
 967 s4 codegen_reg_of_var(u2 opcode, varinfo *v, s4 tempregnum)
 968 {
 969         if (!(v->flags & INMEMORY))
 970                 return v->vv.regoff;
 971
 972         return tempregnum;
 973 }
 974
 975
 976 /* codegen_reg_of_dst **********************************************************
 977
 978    This function determines a register, to which the result of an
 979    operation should go, when it is ultimatively intended to store the
 980    result in iptr->dst.var.  If dst.var is assigned to an actual
 981    register, this register will be returned.  Otherwise (when it is
 982    spilled) this function returns tempregnum.  If not already done,
 983    regoff and flags are set in the stack location.
 984
 985 *******************************************************************************/
 986
 987 s4 codegen_reg_of_dst(jitdata *jd, instruction *iptr, s4 tempregnum)
 988 {
 989         return codegen_reg_of_var(iptr->opc, VAROP(iptr->dst), tempregnum);
 990 }
 991
 992
 993 /**
 994  * Generates machine code.
 995  */
 996 bool codegen_emit(jitdata *jd)
 997 {
 998         varinfo*            var;
 999         builtintable_entry* bte;
1000         methoddesc*         md;
1001         int32_t             s1, s2, /*s3,*/ d;
1002         int32_t             fieldtype;
1003         int32_t             disp;
1004         int                 i;
1005
1006         // Get required compiler data.
1007         //methodinfo*   m    = jd->m;
1008         codeinfo*     code = jd->code;
1009         codegendata*  cd   = jd->cd;
1010         registerdata* rd   = jd->rd;
1011 #if defined(ENABLE_SSA)
1012         lsradata*     ls   = jd->ls;
1013         bool last_cmd_was_goto = false;
1014 #endif
1015
1016         // Space to save used callee saved registers.
1017         int32_t savedregs_num = 0;
1018         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
1019         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
1020 #ifdef HAS_ADDRESS_REGISTER_FILE
1021         savedregs_num += (ADR_SAV_CNT - rd->savadrreguse);
1022 #endif
1023
1024         // Calculate size of stackframe.
1025         cd->stackframesize = rd->memuse + savedregs_num;
1026
1027         // Space to save the return address.
1028 #if STACKFRAME_RA_TOP_OF_FRAME
1029 # if STACKFRAME_LEAFMETHODS_RA_REGISTER
1030         if (!code_is_leafmethod(code))
1031 # endif
1032                 cd->stackframesize += 1;
1033 #endif
1034
1035         // Space to save argument of monitor_enter.
1036 #if defined(ENABLE_THREADS)
1037         if (checksync && code_is_synchronized(code))
1038 # if STACKFRAME_SYNC_NEEDS_TWO_SLOTS
1039                 /* On some architectures the stack position for the argument can
1040                    not be shared with place to save the return register values to
1041                    survive monitor_exit since both values reside in the same register. */
1042                 cd->stackframesize += 2;
1043 # else
1044                 cd->stackframesize += 1;
1045 # endif
1046 #endif
1047
1048         // Keep stack of non-leaf functions 16-byte aligned for calls into
1049         // native code.
1050         if (!code_is_leafmethod(code) || JITDATA_HAS_FLAG_VERBOSECALL(jd))
1051 #if STACKFRMAE_RA_BETWEEN_FRAMES
1052                 ALIGN_ODD(cd->stackframesize);
1053 #else
1054                 ALIGN_EVEN(cd->stackframesize);
1055 #endif
1056
1057 #if defined(SPECIALMEMUSE)
1058         // On architectures having a linkage area, we can get rid of the whole
1059         // stackframe in leaf functions without saved registers.
1060         if (code_is_leafmethod(code) && (cd->stackframesize == LA_SIZE_IN_POINTERS))
1061                 cd->stackframesize = 0;
1062 #endif
1063
1064         /*
1065          * SECTION 1: Method header generation.
1066          */
1067
1068         // The method header was reduced to the bare minimum of one pointer
1069         // to the codeinfo structure, which in turn contains all runtime
1070         // information. However this section together with the methodheader.h
1071         // file will be kept alive for historical reasons. It might come in
1072         // handy at some point.
1073
1074         (void) dseg_add_unique_address(cd, code);   ///< CodeinfoPointer
1075
1076         // XXX, REMOVEME: We still need it for exception handling in assembler.
1077         // XXX ARM, M68K: (void) dseg_add_unique_s4(cd, cd->stackframesize);
1078 #if defined(__I386__)
1079         int align_off = (cd->stackframesize != 0) ? 4 : 0;
1080         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8 + align_off); /* FrameSize       */
1081 #else
1082         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
1083 #endif
1084         // XXX M68K: We use the IntSave as a split field for the adr now
1085         //           (void) dseg_add_unique_s4(cd, (ADR_SAV_CNT - rd->savadrreguse) << 16 | (INT_SAV_CNT - rd->savintreguse)); /* IntSave */
1086         (void) dseg_add_unique_s4(cd, code_is_leafmethod(code) ? 1 : 0);
1087         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
1088         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
1089
1090         /*
1091          * SECTION 2: Method prolog generation.
1092          */
1093
1094 #if defined(ENABLE_PROFILING)
1095         // Generate method profiling code.
1096         if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1097
1098                 // Count method frequency.
1099                 emit_profile_method(cd, code);
1100
1101 # if defined(__X86_64__)
1102                 // Start CPU cycle counting.
1103                 emit_profile_cycle_start();
1104 # endif
1105         }
1106 #endif
1107
1108         // Emit code for the method prolog.
1109         codegen_emit_prolog(jd);
1110
1111 #if defined(ENABLE_THREADS)
1112         // Emit code to call monitorenter function.
1113         if (checksync && code_is_synchronized(code))
1114                 emit_monitor_enter(jd, rd->memuse * 8);
1115 #endif
1116
1117 #if !defined(NDEBUG)
1118         // Call trace function.
1119         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1120                 emit_verbosecall_enter(jd);
1121 #endif
1122
1123 #if defined(ENABLE_SSA)
1124         // With SSA the header is basicblock 0, insert phi moves if necessary.
1125         if (ls != NULL)
1126                 codegen_emit_phi_moves(jd, ls->basicblocks[0]);
1127 #endif
1128
1129         // Create replacement points.
1130         REPLACEMENT_POINTS_INIT(cd, jd);
1131
1132         /*
1133          * SECTION 3: ICMD code generation.
1134          */
1135
1136         // Walk through all basic blocks.
1137         for (basicblock* bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
1138
1139                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
1140
1141                 // Is this basic block reached?
1142                 if (bptr->flags < BBREACHED)
1143                         continue;
1144
1145                 // Branch resolving.
1146                 codegen_resolve_branchrefs(cd, bptr);
1147
1148                 // Handle replacement points.
1149                 REPLACEMENT_POINT_BLOCK_START(cd, bptr);
1150
1151 #if defined(ENABLE_REPLACEMENT) && defined(__I386__)
1152                 // Generate countdown trap code.
1153                 methodinfo* m = jd->m;
1154                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
1155                         if (cd->replacementpoint[-1].flags & RPLPOINT_FLAG_COUNTDOWN) {
1156                                 MCODECHECK(32);
1157                                 emit_trap_countdown(cd, &(m->hitcountdown));
1158                         }
1159                 }
1160 #endif
1161
1162 #if defined(ENABLE_PROFILING)
1163                 // Generate basicblock profiling code.
1164                 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1165
1166                         // Count basicblock frequency.
1167                         emit_profile_basicblock(cd, code, bptr);
1168
1169 # if defined(__X86_64__)
1170                         // If this is an exception handler, start profiling again.
1171                         if (bptr->type == BBTYPE_EXH)
1172                                 emit_profile_cycle_start();
1173 # endif
1174                 }
1175 #endif
1176
1177                 // Copy interface registers to their destination.
1178                 int32_t indepth = bptr->indepth;
1179                 // XXX Check if this is true for all archs.
1180                 MCODECHECK(64+indepth);   // All
1181                 MCODECHECK(128+indepth);  // PPC64
1182                 MCODECHECK(512);          // I386, X86_64, S390
1183 #if defined(ENABLE_SSA)
1184                 // XXX Check if this is correct and add a propper comment!
1185                 if (ls != NULL) {
1186                         last_cmd_was_goto = false;
1187                 } else {
1188 #elif defined(ENABLE_LSRA)
1189                 if (opt_lsra) {
1190                         while (indepth > 0) {
1191                                 indepth--;
1192                                 var = VAR(bptr->invars[indepth]);
1193                                 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1194                                         if (!IS_INMEMORY(src->flags))
1195                                                 d = var->vv.regoff;
1196                                         else
1197                                                 d = REG_ITMP1_XPTR;
1198                                         // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1199                                         // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1200                                         // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1201                                         emit_imove(cd, REG_ITMP1_XPTR, d);
1202                                         emit_store(jd, NULL, var, d);
1203                                 }
1204                         }
1205                 } else {
1206 #endif
1207                         while (indepth > 0) {
1208                                 indepth--;
1209                                 var = VAR(bptr->invars[indepth]);
1210                                 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1211                                         d = codegen_reg_of_var(0, var, REG_ITMP1_XPTR);
1212                                         // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1213                                         // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1214                                         // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1215                                         emit_imove(cd, REG_ITMP1_XPTR, d);
1216                                         emit_store(jd, NULL, var, d);
1217                                 }
1218                                 else {
1219                                         assert((var->flags & INOUT));
1220                                 }
1221                         }
1222 #if defined(ENABLE_SSA) || defined(ENABLE_LSRA)
1223                 }
1224 #endif
1225
1226                 // Walk through all instructions.
1227                 int32_t len = bptr->icount;
1228                 uint16_t currentline = 0;
1229                 for (instruction* iptr = bptr->iinstr; len > 0; len--, iptr++) {
1230
1231                         // Add line number.
1232                         if (iptr->line != currentline) {
1233                                 linenumbertable_list_entry_add(cd, iptr->line);
1234                                 currentline = iptr->line;
1235                         }
1236
1237                         // An instruction usually needs < 64 words.
1238                         // XXX Check if this is true for all archs.
1239                         MCODECHECK(64);    // All
1240                         MCODECHECK(128);   // PPC64
1241                         MCODECHECK(1024);  // I386, X86_64, M68K, S390      /* 1kB should be enough */
1242
1243                         // The big switch.
1244                         switch (iptr->opc) {
1245
1246                         case ICMD_NOP:        /* ...  ==> ...                             */
1247                         case ICMD_POP:        /* ..., value  ==> ...                      */
1248                         case ICMD_POP2:       /* ..., value, value  ==> ...               */
1249                                 break;
1250
1251                         case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref       */
1252
1253                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1254                                 emit_nullpointer_check(cd, iptr, s1);
1255                                 break;
1256
1257 #if defined(ENABLE_SSA)
1258                         case ICMD_GETEXCEPTION:
1259
1260                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1261                                 emit_imove(cd, REG_ITMP1, d);
1262                                 emit_store_dst(jd, iptr, d);
1263                                 break;
1264 #endif
1265
1266                         /* inline operations **********************************************/
1267
1268                         case ICMD_INLINE_START:
1269
1270                                 REPLACEMENT_POINT_INLINE_START(cd, iptr);
1271                                 break;
1272
1273                         case ICMD_INLINE_BODY:
1274
1275                                 REPLACEMENT_POINT_INLINE_BODY(cd, iptr);
1276                                 linenumbertable_list_entry_add_inline_start(cd, iptr);
1277                                 linenumbertable_list_entry_add(cd, iptr->line);
1278                                 break;
1279
1280                         case ICMD_INLINE_END:
1281
1282                                 linenumbertable_list_entry_add_inline_end(cd, iptr);
1283                                 linenumbertable_list_entry_add(cd, iptr->line);
1284                                 break;
1285
1286
1287                         /* constant operations ********************************************/
1288
1289                         case ICMD_ICONST:     /* ...  ==> ..., constant                   */
1290
1291                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1292                                 ICONST(d, iptr->sx.val.i);
1293                                 emit_store_dst(jd, iptr, d);
1294                                 break;
1295
1296                         case ICMD_LCONST:     /* ...  ==> ..., constant                   */
1297
1298                                 d = codegen_reg_of_dst(jd, iptr, REG_LTMP12);
1299                                 LCONST(d, iptr->sx.val.l);
1300                                 emit_store_dst(jd, iptr, d);
1301                                 break;
1302
1303
1304                         /* load/store/copy/move operations ********************************/
1305
1306                         case ICMD_COPY:
1307                         case ICMD_MOVE:
1308                         case ICMD_ILOAD:      /* ...  ==> ..., content of local variable  */
1309                         case ICMD_LLOAD:      /* s1 = local variable                      */
1310                         case ICMD_FLOAD:
1311                         case ICMD_DLOAD:
1312                         case ICMD_ALOAD:
1313                         case ICMD_ISTORE:     /* ..., value  ==> ...                      */
1314                         case ICMD_LSTORE:
1315                         case ICMD_FSTORE:
1316                         case ICMD_DSTORE:
1317
1318                                 emit_copy(jd, iptr);
1319                                 break;
1320
1321                         case ICMD_ASTORE:
1322
1323                                 if (!(iptr->flags.bits & INS_FLAG_RETADDR))
1324                                         emit_copy(jd, iptr);
1325                                 break;
1326
1327
1328                         /* integer operations *********************************************/
1329
1330                         case ICMD_FCONST:     /* ...  ==> ..., constant                   */
1331                         case ICMD_DCONST:     /* ...  ==> ..., constant                   */
1332                         case ICMD_ACONST:     /* ...  ==> ..., constant                   */
1333                         case ICMD_INEG:       /* ..., value  ==> ..., - value             */
1334                         case ICMD_LNEG:       /* ..., value  ==> ..., - value             */
1335                         case ICMD_I2L:        /* ..., value  ==> ..., value               */
1336                         case ICMD_L2I:        /* ..., value  ==> ..., value               */
1337                         case ICMD_INT2BYTE:   /* ..., value  ==> ..., value               */
1338                         case ICMD_INT2CHAR:   /* ..., value  ==> ..., value               */
1339                         case ICMD_INT2SHORT:  /* ..., value  ==> ..., value               */
1340                         case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1341                         case ICMD_IINC:
1342                         case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant    */
1343                                               /* sx.val.i = constant                      */
1344                         case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1345                         case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant    */
1346                                               /* sx.val.l = constant                      */
1347                         case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1348                         case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant    */
1349                                               /* sx.val.i = constant                      */
1350                         case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1351                         case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant    */
1352                                               /* sx.val.l = constant                      */
1353                         case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1354                         case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant    */
1355                                               /* sx.val.i = constant                      */
1356                         case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1357                         case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant    */
1358                                               /* sx.val.l = constant                      */
1359                         case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1360                         case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2    */
1361                         case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value >> constant   */
1362                                               /* sx.val.i = constant                      */
1363                         case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant    */
1364                                               /* sx.val.i = constant                      */
1365                         case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1366                         case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2    */
1367                         case ICMD_LDIVPOW2:   /* ..., value  ==> ..., value >> constant   */
1368                                               /* sx.val.i = constant                      */
1369                         case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant    */
1370                                               /* sx.val.l = constant                      */
1371                         case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2   */
1372                         case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant   */
1373                                               /* sx.val.i = constant                      */
1374                         case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2   */
1375                         case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant   */
1376                                               /* sx.val.i = constant                      */
1377                         case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2  */
1378                         case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant  */
1379                                               /* sx.val.i = constant                      */
1380                         case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2   */
1381                         case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant   */
1382                                               /* sx.val.i = constant                      */
1383                         case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2   */
1384                         case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant   */
1385                                               /* sx.val.i = constant                      */
1386                         case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2  */
1387                         case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant  */
1388                                               /* sx.val.l = constant                      */
1389                         case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2    */
1390                         case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant    */
1391                                               /* sx.val.i = constant                      */
1392                         case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2    */
1393                         case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant    */
1394                                               /* sx.val.l = constant                      */
1395                         case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2    */
1396                         case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant    */
1397                                               /* sx.val.i = constant                      */
1398                         case ICMD_LOR:        /* ..., val1, val2  ==> ..., val1 | val2    */
1399                         case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant    */
1400                                               /* sx.val.l = constant                      */
1401                         case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2    */
1402                         case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant    */
1403                                               /* sx.val.i = constant                      */
1404                         case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2    */
1405                         case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant    */
1406                                               /* sx.val.l = constant                      */
1407
1408                                 // Generate architecture specific instructions.
1409                                 codegen_emit_instruction(jd, iptr);
1410                                 break;
1411
1412
1413                         /* floating operations ********************************************/
1414
1415 #if !defined(ENABLE_SOFTFLOAT)
1416                         case ICMD_FNEG:       /* ..., value  ==> ..., - value             */
1417                         case ICMD_DNEG:
1418                         case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2    */
1419                         case ICMD_DADD:
1420                         case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2    */
1421                         case ICMD_DSUB:
1422                         case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
1423                         case ICMD_DMUL:
1424                         case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
1425                         case ICMD_DDIV:
1426                         case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1427                         case ICMD_DREM:
1428                         case ICMD_I2F:        /* ..., value  ==> ..., (float) value       */
1429                         case ICMD_I2D:        /* ..., value  ==> ..., (double) value      */
1430                         case ICMD_L2F:        /* ..., value  ==> ..., (float) value       */
1431                         case ICMD_L2D:        /* ..., value  ==> ..., (double) value      */
1432                         case ICMD_F2I:        /* ..., value  ==> ..., (int) value         */
1433                         case ICMD_D2I:
1434                         case ICMD_F2L:        /* ..., value  ==> ..., (long) value        */
1435                         case ICMD_D2L:
1436                         case ICMD_F2D:        /* ..., value  ==> ..., (double) value      */
1437                         case ICMD_D2F:        /* ..., value  ==> ..., (float) value       */
1438                         case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2 */
1439                         case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                 */
1440                         case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2 */
1441                         case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                 */
1442
1443                                 // Generate architecture specific instructions.
1444                                 codegen_emit_instruction(jd, iptr);
1445                                 break;
1446 #endif /* !defined(ENABLE_SOFTFLOAT) */
1447
1448
1449                         /* memory operations **********************************************/
1450
1451                         case ICMD_ARRAYLENGTH:/* ..., arrayref  ==> ..., length           */
1452
1453                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1454                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1455                                 /* implicit null-pointer check */
1456                                 // XXX PPC64: Here we had an explicit null-pointer check
1457                                 //     which I think was obsolete, please confirm. Otherwise:
1458                                 // emit_nullpointer_check(cd, iptr, s1);
1459                                 M_ILD(d, s1, OFFSET(java_array_t, size));
1460                                 emit_store_dst(jd, iptr, d);
1461                                 break;
1462
1463                         case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value     */
1464                         case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value     */
1465                         case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value     */
1466                         case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value     */
1467                         case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value     */
1468                         case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value     */
1469                         case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value     */
1470                         case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value     */
1471                         case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...     */
1472                         case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...     */
1473                         case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...     */
1474                         case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...     */
1475                         case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...     */
1476                         case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...     */
1477                         case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...     */
1478                         case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...     */
1479                         case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...        */
1480                         case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...        */
1481                         case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...        */
1482                         case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...        */
1483                         case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...        */
1484                         case ICMD_FASTORECONST:   /* ..., arrayref, index  ==> ...        */
1485                         case ICMD_DASTORECONST:   /* ..., arrayref, index  ==> ...        */
1486                         case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...        */
1487                         case ICMD_GETFIELD:   /* ...  ==> ..., value                      */
1488                         case ICMD_PUTFIELD:   /* ..., value  ==> ...                      */
1489                         case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...              */
1490                                                   /* val = value (in current instruction) */
1491                         case ICMD_PUTSTATICCONST: /* ...  ==> ...                         */
1492                                                   /* val = value (in current instruction) */
1493
1494                                 // Generate architecture specific instructions.
1495                                 codegen_emit_instruction(jd, iptr);
1496                                 break;
1497
1498                         case ICMD_GETSTATIC:  /* ...  ==> ..., value                      */
1499
1500 #if defined(__I386__)
1501                                 // Generate architecture specific instructions.
1502                                 codegen_emit_instruction(jd, iptr);
1503 #else
1504                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1505                                         unresolved_field* uf = iptr->sx.s23.s3.uf;
1506                                         fieldtype = uf->fieldref->parseddesc.fd->type;
1507                                         disp      = dseg_add_unique_address(cd, 0);
1508
1509                                         patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1510                                 }
1511                                 else {
1512                                         fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1513                                         fieldtype = fi->type;
1514                                         disp      = dseg_add_address(cd, fi->value);
1515
1516                                         if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1517                                                 PROFILE_CYCLE_STOP;
1518                                                 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1519                                                 PROFILE_CYCLE_START;
1520                                         }
1521                                 }
1522
1523                                 // XXX X86_64: Here We had this:
1524                                 /* This approach is much faster than moving the field
1525                                    address inline into a register. */
1526
1527                                 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1528                                 M_ALD_DSEG(REG_ITMP1, disp);
1529
1530                                 switch (fieldtype) {
1531                                 case TYPE_ADR:
1532                                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1533                                         M_ALD(d, REG_ITMP1, 0);
1534                                         break;
1535                                 case TYPE_INT:
1536                                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1537                                         M_ILD(d, REG_ITMP1, 0);
1538                                         break;
1539                                 case TYPE_LNG:
1540                                         d = codegen_reg_of_dst(jd, iptr, REG_LTMP23);
1541                                         M_LLD(d, REG_ITMP1, 0);
1542                                         break;
1543                                 case TYPE_FLT:
1544                                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1545                                         M_FLD(d, REG_ITMP1, 0);
1546                                         break;
1547                                 case TYPE_DBL:
1548                                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1549                                         M_DLD(d, REG_ITMP1, 0);
1550                                         break;
1551                                 }
1552                                 emit_store_dst(jd, iptr, d);
1553 #endif
1554                                 break;
1555
1556                         case ICMD_PUTSTATIC:  /* ..., value  ==> ...                      */
1557
1558 #if defined(__I386__)
1559                                 // Generate architecture specific instructions.
1560                                 codegen_emit_instruction(jd, iptr);
1561 #else
1562                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1563                                         unresolved_field* uf = iptr->sx.s23.s3.uf;
1564                                         fieldtype = uf->fieldref->parseddesc.fd->type;
1565                                         disp      = dseg_add_unique_address(cd, 0);
1566
1567                                         patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1568                                 }
1569                                 else {
1570                                         fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1571                                         fieldtype = fi->type;
1572                                         disp      = dseg_add_address(cd, fi->value);
1573
1574                                         if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1575                                                 PROFILE_CYCLE_STOP;
1576                                                 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1577                                                 PROFILE_CYCLE_START;
1578                                         }
1579                                 }
1580
1581                                 // XXX X86_64: Here We had this:
1582                                 /* This approach is much faster than moving the field
1583                                    address inline into a register. */
1584
1585                                 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1586                                 M_ALD_DSEG(REG_ITMP1, disp);
1587
1588                                 switch (fieldtype) {
1589                                 case TYPE_ADR:
1590                                         s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1591                                         M_AST(s1, REG_ITMP1, 0);
1592                                         break;
1593                                 case TYPE_INT:
1594                                         s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1595                                         M_IST(s1, REG_ITMP1, 0);
1596                                         break;
1597                                 case TYPE_LNG:
1598                                         s1 = emit_load_s1(jd, iptr, REG_LTMP23);
1599                                         M_LST(s1, REG_ITMP1, 0);
1600                                         break;
1601                                 case TYPE_FLT:
1602                                         s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1603                                         M_FST(s1, REG_ITMP1, 0);
1604                                         break;
1605                                 case TYPE_DBL:
1606                                         s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1607                                         M_DST(s1, REG_ITMP1, 0);
1608                                         break;
1609                                 }
1610 #endif
1611                                 break;
1612
1613                         /* branch operations **********************************************/
1614
1615                         case ICMD_ATHROW:     /* ..., objectref ==> ... (, objectref)     */
1616
1617                                 // We might leave this method, stop profiling.
1618                                 PROFILE_CYCLE_STOP;
1619
1620                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1621                                 // XXX M68K: Actually this is M_ADRMOVE(s1, REG_ATMP1_XPTR);
1622                                 // XXX Sparc64: We use REG_ITMP2_XPTR here, fix me!
1623                                 emit_imove(cd, s1, REG_ITMP1_XPTR);
1624
1625 #ifdef ENABLE_VERIFIER
1626                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1627                                         unresolved_class *uc = iptr->sx.s23.s2.uc;
1628                                         patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1629                                 }
1630 #endif /* ENABLE_VERIFIER */
1631
1632                                 // Generate architecture specific instructions.
1633                                 codegen_emit_instruction(jd, iptr);
1634                                 ALIGNCODENOP;
1635                                 break;
1636
1637                         case ICMD_GOTO:       /* ... ==> ...                              */
1638                         case ICMD_RET:        /* ... ==> ...                              */
1639
1640 #if defined(ENABLE_SSA)
1641                                 // In case of a goto, phimoves have to be inserted
1642                                 // before the jump.
1643                                 if (ls != NULL) {
1644                                         last_cmd_was_goto = true;
1645                                         codegen_emit_phi_moves(jd, bptr);
1646                                 }
1647 #endif
1648                                 emit_br(cd, iptr->dst.block);
1649                                 ALIGNCODENOP;
1650                                 break;
1651
1652                         case ICMD_JSR:        /* ... ==> ...                              */
1653
1654                                 emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1655                                 ALIGNCODENOP;
1656                                 break;
1657
1658                         case ICMD_IFNULL:     /* ..., value ==> ...                       */
1659                         case ICMD_IFNONNULL:
1660
1661                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1662 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1663                                 emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, s1, BRANCH_OPT_NONE);
1664 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1665                                 M_TEST(s1);
1666                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1667 #else
1668 # error Unable to generate code for this configuration!
1669 #endif
1670                                 break;
1671
1672                         case ICMD_IFEQ:       /* ..., value ==> ...                       */
1673                         case ICMD_IFNE:
1674                         case ICMD_IFLT:
1675                         case ICMD_IFLE:
1676                         case ICMD_IFGT:
1677                         case ICMD_IFGE:
1678
1679                                 // XXX Sparc64: int compares must not branch on the
1680                                 // register directly. Reason is, that register content is
1681                                 // not 32-bit clean. Fix this!
1682
1683 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1684                                 if (iptr->sx.val.i == 0) {
1685                                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1686                                         emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, s1, BRANCH_OPT_NONE);
1687                                 } else {
1688                                         // Generate architecture specific instructions.
1689                                         codegen_emit_instruction(jd, iptr);
1690                                 }
1691 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1692                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1693                                 emit_icmp_imm(cd, s1, iptr->sx.val.i);
1694                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1695 #else
1696 # error Unable to generate code for this configuration!
1697 #endif
1698                                 break;
1699
1700                         case ICMD_IF_LEQ:     /* ..., value ==> ...                       */
1701                         case ICMD_IF_LNE:
1702                         case ICMD_IF_LLT:
1703                         case ICMD_IF_LGE:
1704                         case ICMD_IF_LGT:
1705                         case ICMD_IF_LLE:
1706
1707                                 // Generate architecture specific instructions.
1708                                 codegen_emit_instruction(jd, iptr);
1709                                 break;
1710
1711                         case ICMD_IF_ACMPEQ:  /* ..., value, value ==> ...                */
1712                         case ICMD_IF_ACMPNE:  /* op1 = target JavaVM pc                   */
1713
1714                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1715                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1716 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1717                                 switch (iptr->opc) {
1718                                         case ICMD_IF_ACMPEQ:
1719                                                 emit_beq(cd, iptr->dst.block, s1, s2);
1720                                                 break;
1721                                         case ICMD_IF_ACMPNE:
1722                                                 emit_bne(cd, iptr->dst.block, s1, s2);
1723                                                 break;
1724                                 }
1725 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1726                                 M_ACMP(s1, s2);
1727                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1728 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1729                                 M_CMPEQ(s1, s2, REG_ITMP1);
1730                                 switch (iptr->opc) {
1731                                         case ICMD_IF_ACMPEQ:
1732                                                 emit_bnez(cd, iptr->dst.block, REG_ITMP1);
1733                                                 break;
1734                                         case ICMD_IF_ACMPNE:
1735                                                 emit_beqz(cd, iptr->dst.block, REG_ITMP1);
1736                                                 break;
1737                                 }
1738 #else
1739 # error Unable to generate code for this configuration!
1740 #endif
1741                                 break;
1742
1743                         case ICMD_IF_ICMPEQ:  /* ..., value, value ==> ...                */
1744                         case ICMD_IF_ICMPNE:  /* op1 = target JavaVM pc                   */
1745
1746 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1747                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1748                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1749                                 switch (iptr->opc) {
1750                                         case ICMD_IF_ICMPEQ:
1751                                                 emit_beq(cd, iptr->dst.block, s1, s2);
1752                                                 break;
1753                                         case ICMD_IF_ICMPNE:
1754                                                 emit_bne(cd, iptr->dst.block, s1, s2);
1755                                                 break;
1756                                 }
1757                                 break;
1758 #else
1759                                 /* fall-through */
1760 #endif
1761
1762                         case ICMD_IF_ICMPLT:  /* ..., value, value ==> ...                */
1763                         case ICMD_IF_ICMPGT:  /* op1 = target JavaVM pc                   */
1764                         case ICMD_IF_ICMPLE:
1765                         case ICMD_IF_ICMPGE:
1766
1767                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1768                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1769 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1770 # if defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
1771                                 // XXX Fix this soon!!!
1772                                 M_ICMP(s2, s1);
1773 # else
1774                                 M_ICMP(s1, s2);
1775 # endif
1776                                 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1777 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1778                                 // Generate architecture specific instructions.
1779                                 codegen_emit_instruction(jd, iptr);
1780 #else
1781 # error Unable to generate code for this configuration!
1782 #endif
1783                                 break;
1784
1785                         case ICMD_IF_LCMPEQ:  /* ..., value, value ==> ...                */
1786                         case ICMD_IF_LCMPNE:  /* op1 = target JavaVM pc                   */
1787                         case ICMD_IF_LCMPLT:
1788                         case ICMD_IF_LCMPGT:
1789                         case ICMD_IF_LCMPLE:
1790                         case ICMD_IF_LCMPGE:
1791
1792                                 // Generate architecture specific instructions.
1793                                 codegen_emit_instruction(jd, iptr);
1794                                 break;
1795
1796                         case ICMD_RETURN:     /* ...  ==> ...                             */
1797
1798                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1799                                 goto nowperformreturn;
1800
1801                         case ICMD_ARETURN:    /* ..., retvalue ==> ...                    */
1802
1803                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1804                                 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1805                                 // XXX M68K: This should actually be M_ADR2INTMOVE(s1, REG_RESULT);
1806                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1807                                 emit_imove(cd, s1, REG_RESULT);
1808
1809 #ifdef ENABLE_VERIFIER
1810                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1811                                         PROFILE_CYCLE_STOP;
1812                                         unresolved_class *uc = iptr->sx.s23.s2.uc;
1813                                         patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1814                                         PROFILE_CYCLE_START;
1815                                 }
1816 #endif /* ENABLE_VERIFIER */
1817                                 goto nowperformreturn;
1818
1819                         case ICMD_IRETURN:    /* ..., retvalue ==> ...                    */
1820
1821                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1822                                 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1823                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1824                                 emit_imove(cd, s1, REG_RESULT);
1825                                 goto nowperformreturn;
1826
1827                         case ICMD_LRETURN:    /* ..., retvalue ==> ...                    */
1828
1829                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1830                                 s1 = emit_load_s1(jd, iptr, REG_LRESULT);
1831                                 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1832                                 emit_lmove(cd, s1, REG_LRESULT);
1833                                 goto nowperformreturn;
1834
1835                         case ICMD_FRETURN:    /* ..., retvalue ==> ...                    */
1836
1837                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1838                                 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1839                                 // XXX ARM: Here this was M_CAST_F2I(s1, REG_RESULT);
1840                                 emit_fmove(cd, s1, REG_FRESULT);
1841                                 goto nowperformreturn;
1842
1843                         case ICMD_DRETURN:    /* ..., retvalue ==> ...                    */
1844
1845                                 REPLACEMENT_POINT_RETURN(cd, iptr);
1846                                 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1847                                 // XXX ARM: Here this was M_CAST_D2L(s1, REG_RESULT_PACKED);
1848                                 emit_dmove(cd, s1, REG_FRESULT);
1849                                 goto nowperformreturn;
1850
1851 nowperformreturn:
1852 #if !defined(NDEBUG)
1853                                 // Call trace function.
1854                                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1855                                         emit_verbosecall_exit(jd);
1856 #endif
1857
1858 #if defined(ENABLE_THREADS)
1859                                 // Emit code to call monitorexit function.
1860                                 if (checksync && code_is_synchronized(code)) {
1861                                         emit_monitor_exit(jd, rd->memuse * 8);
1862                                 }
1863 #endif
1864
1865                                 // Generate method profiling code.
1866                                 PROFILE_CYCLE_STOP;
1867
1868                                 // Emit code for the method epilog.
1869                                 codegen_emit_epilog(jd);
1870                                 ALIGNCODENOP;
1871                                 break;
1872
1873                         case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...        */
1874
1875                                 REPLACEMENT_POINT_FORGC_BUILTIN(cd, iptr);
1876
1877                                 bte = iptr->sx.s23.s3.bte;
1878                                 md  = bte->md;
1879
1880 #if defined(ENABLE_ESCAPE_REASON) && defined(__I386__)
1881                                 if (bte->fp == BUILTIN_escape_reason_new) {
1882                                         void set_escape_reasons(void *);
1883                                         M_ASUB_IMM(8, REG_SP);
1884                                         M_MOV_IMM(iptr->escape_reasons, REG_ITMP1);
1885                                         M_AST(EDX, REG_SP, 4);
1886                                         M_AST(REG_ITMP1, REG_SP, 0);
1887                                         M_MOV_IMM(set_escape_reasons, REG_ITMP1);
1888                                         M_CALL(REG_ITMP1);
1889                                         M_ALD(EDX, REG_SP, 4);
1890                                         M_AADD_IMM(8, REG_SP);
1891                                 }
1892 #endif
1893
1894                                 goto gen_method;
1895
1896                         case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...        */
1897                         case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
1898                         case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
1899                         case ICMD_INVOKEINTERFACE:
1900
1901                                 REPLACEMENT_POINT_INVOKE(cd, iptr);
1902
1903                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1904                                         unresolved_method* um = iptr->sx.s23.s3.um;
1905                                         md = um->methodref->parseddesc.md;
1906                                 }
1907                                 else {
1908                                         methodinfo* lm = iptr->sx.s23.s3.fmiref->p.method;
1909                                         md = lm->parseddesc;
1910                                 }
1911
1912 gen_method:
1913                                 i = md->paramcount;
1914
1915                                 // XXX Check this again!
1916                                 MCODECHECK((i << 1) + 64);   // PPC
1917
1918                                 // Copy arguments to registers or stack location.
1919                                 for (i = i - 1; i >= 0; i--) {
1920                                         var = VAR(iptr->sx.s23.s2.args[i]);
1921                                         d   = md->params[i].regoff;
1922
1923                                         // Already pre-allocated?
1924                                         if (var->flags & PREALLOC)
1925                                                 continue;
1926
1927                                         if (!md->params[i].inmemory) {
1928                                                 assert(ARG_CNT > 0);
1929                                                 s1 = emit_load(jd, iptr, var, d);
1930
1931                                                 switch (var->type) {
1932                                                 case TYPE_ADR:
1933                                                 case TYPE_INT:
1934                                                         assert(INT_ARG_CNT > 0);
1935                                                         emit_imove(cd, s1, d);
1936                                                         break;
1937
1938 #if 0 //XXX For ARM:
1939 if (!md->params[s3].inmemory) {
1940         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1941         if (IS_2_WORD_TYPE(var->type))
1942                 M_CAST_D2L(s1, d);
1943         else
1944                 M_CAST_F2I(s1, d);
1945 }
1946 #endif //XXX End of ARM!
1947
1948                                                 case TYPE_LNG:
1949                                                         emit_lmove(cd, s1, d);
1950                                                         break;
1951
1952                                                 case TYPE_FLT:
1953                                                         emit_fmove(cd, s1, d);
1954                                                         break;
1955
1956                                                 case TYPE_DBL:
1957                                                         emit_dmove(cd, s1, d);
1958                                                         break;
1959                                                 }
1960                                         }
1961                                         else {
1962                                                 switch (var->type) {
1963                                                 case TYPE_ADR:
1964                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
1965                                                         // XXX M68K: This should actually be like this:
1966                                                         //     s1 = emit_load(jd, iptr, var, REG_ATMP1);
1967                                                         // XXX Sparc64: Here this actually was:
1968                                                         //     M_STX(s1, REG_SP, JITSTACK + d);
1969                                                         M_AST(s1, REG_SP, d);
1970                                                         break;
1971
1972                                                 case TYPE_INT:
1973 #if SIZEOF_VOID_P == 4
1974                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
1975                                                         M_IST(s1, REG_SP, d);
1976                                                         break;
1977 #else
1978                                                         /* fall-through */
1979 #endif
1980
1981                                                 case TYPE_LNG:
1982                                                         s1 = emit_load(jd, iptr, var, REG_LTMP12);
1983                                                         // XXX Sparc64: Here this actually was:
1984                                                         //     M_STX(s1, REG_SP, JITSTACK + d);
1985                                                         M_LST(s1, REG_SP, d);
1986                                                         break;
1987
1988                                                 case TYPE_FLT:
1989 #if SIZEOF_VOID_P == 4
1990                                                         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1991                                                         M_FST(s1, REG_SP, d);
1992                                                         break;
1993 #else
1994                                                         /* fall-through */
1995 #endif
1996
1997                                                 case TYPE_DBL:
1998                                                         s1 = emit_load(jd, iptr, var, REG_FTMP1);
1999                                                         // XXX Sparc64: Here this actually was:
2000                                                         //     M_DST(s1, REG_SP, JITSTACK + d);
2001                                                         M_DST(s1, REG_SP, d);
2002                                                         break;
2003                                                 }
2004                                         }
2005                                 }
2006
2007                                 // Generate method profiling code.
2008                                 PROFILE_CYCLE_STOP;
2009
2010                                 // Generate architecture specific instructions.
2011                                 codegen_emit_instruction(jd, iptr);
2012
2013                                 // Generate method profiling code.
2014                                 PROFILE_CYCLE_START;
2015
2016                                 // Store size of call code in replacement point.
2017                                 REPLACEMENT_POINT_INVOKE_RETURN(cd, iptr);
2018                                 REPLACEMENT_POINT_FORGC_BUILTIN_RETURN(cd, iptr);
2019
2020                                 // Recompute the procedure vector (PV).
2021                                 emit_recompute_pv(cd);
2022
2023                                 // Store return value.
2024 #if defined(ENABLE_SSA)
2025                                 if ((ls == NULL) /* || (!IS_TEMPVAR_INDEX(iptr->dst.varindex)) */ ||
2026                                         (ls->lifetime[iptr->dst.varindex].type != UNUSED))
2027                                         /* a "living" stackslot */
2028 #endif
2029                                 switch (md->returntype.type) {
2030                                 case TYPE_INT:
2031                                 case TYPE_ADR:
2032                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2033                                         // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2034                                         emit_imove(cd, REG_RESULT, s1);
2035                                         emit_store_dst(jd, iptr, s1);
2036                                         break;
2037
2038                                 case TYPE_LNG:
2039                                         s1 = codegen_reg_of_dst(jd, iptr, REG_LRESULT);
2040                                         // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2041                                         emit_lmove(cd, REG_LRESULT, s1);
2042                                         emit_store_dst(jd, iptr, s1);
2043                                         break;
2044
2045 #if 0 //XXX For ARM!!!
2046 #if !defined(ENABLE_SOFTFLOAT)
2047                                 } else {
2048                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2049                                         if (IS_2_WORD_TYPE(d))
2050                                                 M_CAST_L2D(REG_RESULT_PACKED, s1);
2051                                         else
2052                                                 M_CAST_I2F(REG_RESULT, s1);
2053                                 }
2054 #endif /* !defined(ENABLE_SOFTFLOAT) */
2055 #endif //XXX End of ARM
2056
2057                                 case TYPE_FLT:
2058                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2059                                         emit_fmove(cd, REG_FRESULT, s1);
2060                                         emit_store_dst(jd, iptr, s1);
2061                                         break;
2062
2063                                 case TYPE_DBL:
2064                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2065                                         emit_dmove(cd, REG_FRESULT, s1);
2066                                         emit_store_dst(jd, iptr, s1);
2067                                         break;
2068
2069                                 case TYPE_VOID:
2070                                         break;
2071                                 }
2072
2073                                 break;
2074
2075                         case ICMD_TABLESWITCH:  /* ..., index ==> ...                     */
2076
2077                                 // Generate architecture specific instructions.
2078                                 codegen_emit_instruction(jd, iptr);
2079                                 break;
2080
2081                         case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                       */
2082
2083                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2084                                 i = iptr->sx.s23.s2.lookupcount;
2085
2086                                 // XXX Again we need to check this
2087                                 MCODECHECK((i<<2)+8);   // Alpha, ARM, i386, MIPS, M68K, Sparc64
2088                                 MCODECHECK((i<<3)+8);   // PPC64
2089                                 MCODECHECK(8 + ((7 + 6) * i) + 5);   // X86_64, S390
2090
2091                                 // Compare keys.
2092                                 for (lookup_target_t* lookup = iptr->dst.lookup; i > 0; ++lookup, --i) {
2093 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
2094                                         emit_icmp_imm(cd, s1, lookup->value);
2095                                         emit_beq(cd, lookup->target.block);
2096 #elif SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
2097                                         ICONST(REG_ITMP2, lookup->value);
2098                                         emit_beq(cd, lookup->target.block, s1, REG_ITMP2);
2099 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
2100                                         emit_icmpeq_imm(cd, s1, lookup->value, REG_ITMP2);
2101                                         emit_bnez(cd, lookup->target.block, REG_ITMP2);
2102 #else
2103 # error Unable to generate code for this configuration!
2104 #endif
2105                                 }
2106
2107                                 // Default branch.
2108                                 emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2109                                 ALIGNCODENOP;
2110                                 break;
2111
2112                         case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref        */
2113                         case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult        */
2114                         case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2115
2116                                 // Generate architecture specific instructions.
2117                                 codegen_emit_instruction(jd, iptr);
2118                                 break;
2119
2120                         default:
2121                                 exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2122                                                                                            iptr->opc);
2123                                 return false;
2124
2125                         } // the big switch
2126
2127                 } // for all instructions
2128
2129 #if defined(ENABLE_SSA)
2130                 // By edge splitting, in blocks with phi moves there can only
2131                 // be a goto as last command, no other jump/branch command.
2132                 if (ls != NULL) {
2133                         if (!last_cmd_was_goto)
2134                                 codegen_emit_phi_moves(jd, bptr);
2135                 }
2136 #endif
2137
2138 #if defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__S390__) || defined(__SPARC_64__) || defined(__X86_64__)
2139                 // XXX Again!!!
2140                 /* XXX require a lower number? */
2141                 MCODECHECK(64);  // I386, MIPS, Sparc64
2142                 MCODECHECK(512); // S390, X86_64
2143
2144                 /* XXX We can remove that when we don't use UD2 anymore on i386
2145                    and x86_64. */
2146
2147                 /* At the end of a basic block we may have to append some nops,
2148                    because the patcher stub calling code might be longer than the
2149                    actual instruction. So codepatching does not change the
2150                    following block unintentionally. */
2151
2152                 if (cd->mcodeptr < cd->lastmcodeptr) {
2153                         while (cd->mcodeptr < cd->lastmcodeptr) {
2154                                 M_NOP;
2155                         }
2156                 }
2157 #endif
2158
2159         } // for all basic blocks
2160
2161         // Generate traps.
2162         emit_patcher_traps(jd);
2163
2164         // Everything's ok.
2165         return true;
2166 }
2167
2168
2169 /* codegen_emit_phi_moves ****************************************************
2170
2171    Emits phi moves at the end of the basicblock.
2172
2173 *******************************************************************************/
2174
2175 #if defined(ENABLE_SSA)
2176 void codegen_emit_phi_moves(jitdata *jd, basicblock *bptr)
2177 {
2178         int lt_d,lt_s,i;
2179         lsradata *ls;
2180         codegendata *cd;
2181         varinfo *s, *d;
2182         instruction tmp_i;
2183
2184         cd = jd->cd;
2185         ls = jd->ls;
2186
2187         MCODECHECK(512);
2188
2189         /* Moves from phi functions with highest indices have to be */
2190         /* inserted first, since this is the order as is used for   */
2191         /* conflict resolution */
2192
2193         for(i = ls->num_phi_moves[bptr->nr] - 1; i >= 0 ; i--) {
2194                 lt_d = ls->phi_moves[bptr->nr][i][0];
2195                 lt_s = ls->phi_moves[bptr->nr][i][1];
2196 #if defined(SSA_DEBUG_VERBOSE)
2197                 if (compileverbose)
2198                         printf("BB %3i Move %3i <- %3i ", bptr->nr, lt_d, lt_s);
2199 #endif
2200                 if (lt_s == UNUSED) {
2201 #if defined(SSA_DEBUG_VERBOSE)
2202                 if (compileverbose)
2203                         printf(" ... not processed \n");
2204 #endif
2205                         continue;
2206                 }
2207
2208                 d = VAR(ls->lifetime[lt_d].v_index);
2209                 s = VAR(ls->lifetime[lt_s].v_index);
2210
2211
2212                 if (d->type == -1) {
2213 #if defined(SSA_DEBUG_VERBOSE)
2214                         if (compileverbose)
2215                                 printf("...returning - phi lifetimes where joined\n");
2216 #endif
2217                         continue;
2218                 }
2219
2220                 if (s->type == -1) {
2221 #if defined(SSA_DEBUG_VERBOSE)
2222                         if (compileverbose)
2223                                 printf("...returning - phi lifetimes where joined\n");
2224 #endif
2225                         continue;
2226                 }
2227
2228                 tmp_i.opc = 0;
2229                 tmp_i.s1.varindex = ls->lifetime[lt_s].v_index;
2230                 tmp_i.dst.varindex = ls->lifetime[lt_d].v_index;
2231                 emit_copy(jd, &tmp_i);
2232
2233 #if defined(SSA_DEBUG_VERBOSE)
2234                 if (compileverbose) {
2235                         if (IS_INMEMORY(d->flags) && IS_INMEMORY(s->flags)) {
2236                                 /* mem -> mem */
2237                                 printf("M%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2238                         }
2239                         else if (IS_INMEMORY(s->flags)) {
2240                                 /* mem -> reg */
2241                                 printf("R%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2242                         }
2243                         else if (IS_INMEMORY(d->flags)) {
2244                                 /* reg -> mem */
2245                                 printf("M%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2246                         }
2247                         else {
2248                                 /* reg -> reg */
2249                                 printf("R%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2250                         }
2251                         printf("\n");
2252                 }
2253 #endif /* defined(SSA_DEBUG_VERBOSE) */
2254         }
2255 }
2256 #endif /* defined(ENABLE_SSA) */
2257
2258
2259 /* REMOVEME When we have exception handling in C. */
2260
2261 void *md_asm_codegen_get_pv_from_pc(void *ra)
2262 {
2263         return md_codegen_get_pv_from_pc(ra);
2264 }
2265
2266
2267 /*
2268  * These are local overrides for various environment variables in Emacs.
2269  * Please do not remove this and leave it at the end of the file, where
2270  * Emacs will automagically detect them.
2271  * ---------------------------------------------------------------------
2272  * Local variables:
2273  * mode: c++
2274  * indent-tabs-mode: t
2275  * c-basic-offset: 4
2276  * tab-width: 4
2277  * End:
2278  * vim:noexpandtab:sw=4:ts=4:
2279  */