1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
38 #include "vm/jit/arm/codegen.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
47 #include "vm/exceptions.h"
48 #include "vm/global.h"
50 #include "vm/jit/abi.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
56 #include "toolbox/logging.h" /* XXX for debugging only */
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->vv.regoff * 4;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 #if defined(ENABLE_SOFTFLOAT)
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_DLD(tempreg, REG_SP, disp);
90 M_FLD(tempreg, REG_SP, disp);
94 if (IS_2_WORD_TYPE(src->type))
95 M_LLD(tempreg, REG_SP, disp);
97 M_ILD(tempreg, REG_SP, disp);
103 reg = src->vv.regoff;
109 /* emit_load_low ***************************************************************
111 Emits a possible load of the low 32-bits of a long source operand.
113 *******************************************************************************/
115 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
121 assert(src->type == TYPE_LNG);
123 /* get required compiler data */
127 if (src->flags & INMEMORY) {
130 disp = src->vv.regoff * 4;
132 #if defined(__ARMEL__)
133 M_ILD(tempreg, REG_SP, disp);
135 M_ILD(tempreg, REG_SP, disp + 4);
141 reg = GET_LOW_REG(src->vv.regoff);
147 /* emit_load_high **************************************************************
149 Emits a possible load of the high 32-bits of a long source operand.
151 *******************************************************************************/
153 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
159 assert(src->type == TYPE_LNG);
161 /* get required compiler data */
165 if (src->flags & INMEMORY) {
168 disp = src->vv.regoff * 4;
170 #if defined(__ARMEL__)
171 M_ILD(tempreg, REG_SP, disp + 4);
173 M_ILD(tempreg, REG_SP, disp);
179 reg = GET_HIGH_REG(src->vv.regoff);
185 /* emit_store ******************************************************************
187 Emits a possible store to a variable.
189 *******************************************************************************/
191 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
196 /* get required compiler data */
200 if (dst->flags & INMEMORY) {
203 disp = dst->vv.regoff * 4;
205 if (IS_FLT_DBL_TYPE(dst->type)) {
206 #if defined(ENABLE_SOFTFLOAT)
207 if (IS_2_WORD_TYPE(dst->type))
208 M_LST(d, REG_SP, disp);
210 M_IST(d, REG_SP, disp);
212 if (IS_2_WORD_TYPE(dst->type))
213 M_DST(d, REG_SP, disp);
215 M_FST(d, REG_SP, disp);
219 if (IS_2_WORD_TYPE(dst->type))
220 M_LST(d, REG_SP, disp);
222 M_IST(d, REG_SP, disp);
225 else if (IS_LNG_TYPE(dst->type)) {
226 #if defined(__ARMEL__)
227 if (GET_HIGH_REG(dst->vv.regoff) == REG_SPLIT)
228 M_IST_INTERN(GET_HIGH_REG(d), REG_SP, 0 * 4);
230 if (GET_LOW_REG(dst->vv.regoff) == REG_SPLIT)
231 M_IST_INTERN(GET_LOW_REG(d), REG_SP, 0 * 4);
237 /* emit_copy *******************************************************************
241 *******************************************************************************/
243 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
249 /* get required compiler data */
254 /* XXX dummy call, removed me!!! */
255 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
257 if ((src->vv.regoff != dst->vv.regoff) ||
258 ((src->flags ^ dst->flags) & INMEMORY)) {
260 /* If one of the variables resides in memory, we can eliminate
261 the register move from/to the temporary register with the
262 order of getting the destination register and the load. */
264 if (IS_INMEMORY(src->flags)) {
265 #if !defined(ENABLE_SOFTFLOAT)
266 if (IS_FLT_DBL_TYPE(src->type))
267 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
271 if (IS_2_WORD_TYPE(src->type))
272 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
274 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
277 s1 = emit_load(jd, iptr, src, d);
280 #if !defined(ENABLE_SOFTFLOAT)
281 if (IS_FLT_DBL_TYPE(src->type))
282 s1 = emit_load(jd, iptr, src, REG_FTMP1);
286 if (IS_2_WORD_TYPE(src->type))
287 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
289 s1 = emit_load(jd, iptr, src, REG_ITMP1);
292 d = codegen_reg_of_var(iptr->opc, dst, s1);
296 if (IS_FLT_DBL_TYPE(src->type)) {
297 #if defined(ENABLE_SOFTFLOAT)
298 if (IS_2_WORD_TYPE(src->type))
301 /* XXX grrrr, wrong direction! */
304 if (IS_2_WORD_TYPE(src->type))
311 if (IS_2_WORD_TYPE(src->type))
314 /* XXX grrrr, wrong direction! */
319 emit_store(jd, iptr, dst, d);
324 /* emit_iconst *****************************************************************
328 *******************************************************************************/
330 void emit_iconst(codegendata *cd, s4 d, s4 value)
337 disp = dseg_add_s4(cd, value);
338 M_DSEG_LOAD(d, disp);
343 /* emit_branch *****************************************************************
345 Emits the code for conditional and unconditional branchs.
347 *******************************************************************************/
349 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
354 /* calculate the different displacements */
356 checkdisp = (disp - 8);
357 branchdisp = (disp - 8) >> 2;
359 /* check which branch to generate */
361 if (condition == BRANCH_UNCONDITIONAL) {
362 /* check displacement for overflow */
364 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
365 /* if the long-branches flag isn't set yet, do it */
367 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
368 cd->flags |= (CODEGENDATA_FLAG_ERROR |
369 CODEGENDATA_FLAG_LONGBRANCHES);
372 vm_abort("emit_branch: emit unconditional long-branch code");
379 /* and displacement for overflow */
381 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
382 /* if the long-branches flag isn't set yet, do it */
384 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
385 cd->flags |= (CODEGENDATA_FLAG_ERROR |
386 CODEGENDATA_FLAG_LONGBRANCHES);
389 vm_abort("emit_branch: emit conditional long-branch code");
415 vm_abort("emit_branch: unknown condition %d", condition);
422 /* emit_arithmetic_check *******************************************************
424 Emit an ArithmeticException check.
426 *******************************************************************************/
428 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
430 if (INSTRUCTION_MUST_CHECK(iptr)) {
433 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
438 /* emit_nullpointer_check ******************************************************
440 Emit a NullPointerException check.
442 *******************************************************************************/
444 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
446 if (INSTRUCTION_MUST_CHECK(iptr)) {
448 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
452 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
455 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
459 /* emit_arrayindexoutofbounds_check ********************************************
461 Emit a ArrayIndexOutOfBoundsException check.
463 *******************************************************************************/
465 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
467 if (INSTRUCTION_MUST_CHECK(iptr)) {
468 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
469 M_CMP(s2, REG_ITMP3);
470 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
475 /* emit_classcast_check ********************************************************
477 Emit a ClassCastException check.
479 *******************************************************************************/
481 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
483 if (INSTRUCTION_MUST_CHECK(iptr)) {
486 M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
490 M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
494 M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
498 vm_abort("emit_classcast_check: unknown condition %d", condition);
503 /* emit_exception_check ********************************************************
505 Emit an Exception check.
507 *******************************************************************************/
509 void emit_exception_check(codegendata *cd, instruction *iptr)
511 if (INSTRUCTION_MUST_CHECK(iptr)) {
512 M_TST(REG_RESULT, REG_RESULT);
513 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
518 /* emit_patcher_stubs **********************************************************
520 Generates the code for the patcher stubs.
522 *******************************************************************************/
524 void emit_patcher_stubs(jitdata *jd)
534 /* get required compiler data */
538 /* generate patcher stub call code */
542 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
543 /* check code segment size */
547 /* Get machine code which is patched back in later. The
548 call is 1 instruction word long. */
550 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
552 mcode = *((u4 *) tmpmcodeptr);
554 /* Patch in the call to call the following code (done at
557 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
558 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
560 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
563 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
565 /* create stack frame (align stack to 8-byte) */
567 M_SUB_IMM(REG_SP, REG_SP, 8 * 4);
569 /* save itmp3 onto stack */
571 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
573 /* calculate return address and move it onto stack */
574 /* ATTENTION: we can not use BL to branch to patcher stub, */
575 /* ATTENTION: because we need to preserve LR for leaf methods */
577 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
579 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
580 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
582 /* move pointer to java_objectheader onto stack */
584 #if defined(ENABLE_THREADS)
585 /* order reversed because of data segment layout */
587 (void) dseg_add_unique_address(cd, NULL); /* flcword */
588 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
589 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
591 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PV, -disp / 4);
592 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
594 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
595 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
598 /* move machine code onto stack */
600 disp = dseg_add_unique_s4(cd, mcode);
601 M_DSEG_LOAD(REG_ITMP3, disp);
602 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
604 /* move class/method/field reference onto stack */
606 disp = dseg_add_unique_address(cd, pref->ref);
607 M_DSEG_LOAD(REG_ITMP3, disp);
608 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
610 /* move data segment displacement onto stack */
612 disp = dseg_add_unique_s4(cd, pref->disp);
613 M_DSEG_LOAD(REG_ITMP3, disp);
614 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
616 /* move patcher function pointer onto stack */
618 disp = dseg_add_functionptr(cd, pref->patcher);
619 M_DSEG_LOAD(REG_ITMP3, disp);
620 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
622 /* finally call the patcher via asm_patcher_wrapper */
623 /* ATTENTION: don't use REG_PV here, because some patchers need it */
625 if (targetdisp == 0) {
626 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
628 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
629 /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_PV, a);*/
630 /* TODO: this is only a hack */
631 M_DSEG_LOAD(REG_ITMP3, disp);
632 M_MOV(REG_PC, REG_ITMP3);
635 disp = (((u4 *) cd->mcodebase) + targetdisp) -
636 (((u4 *) cd->mcodeptr) + 2);
644 /* emit_replacement_stubs ******************************************************
646 Generates the code for the replacement stubs.
648 *******************************************************************************/
650 #if defined(ENABLE_REPLACEMENT)
651 void emit_replacement_stubs(jitdata *jd)
660 /* get required compiler data */
665 #endif /* defined(ENABLE_REPLACEMENT) */
668 /* emit_verbosecall_enter ******************************************************
670 Generates the code for the call trace.
672 *******************************************************************************/
675 void emit_verbosecall_enter(jitdata *jd)
685 /* get required compiler data */
693 /* stackframesize is changed below */
695 stackframesize = cd->stackframesize;
697 /* mark trace code */
701 /* Save argument registers to stack (including LR and PV). Keep
702 stack 8-byte aligned. */
704 M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
705 M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
707 stackframesize += 6 + 2 + 2 + 1 + 1;
709 /* prepare args for tracer */
711 i = md->paramcount - 1;
716 for (; i >= 0; i--) {
717 t = md->paramtypes[i].type;
719 /* load argument into register (s1) and make it of TYPE_LNG */
721 if (!md->params[i].inmemory) {
722 s1 = md->params[i].regoff;
724 if (!IS_2_WORD_TYPE(t)) {
725 M_MOV_IMM(REG_ITMP1, 0);
726 s1 = PACK_REGS(s1, REG_ITMP1);
729 SPLIT_OPEN(t, s1, REG_ITMP1);
730 SPLIT_LOAD(t, s1, stackframesize);
734 s1 = REG_ITMP12_PACKED;
735 s2 = md->params[i].regoff + stackframesize;
737 if (IS_2_WORD_TYPE(t))
738 M_LLD(s1, REG_SP, s2 * 4);
740 M_ILD(GET_LOW_REG(s1), REG_SP, s2 * 4);
741 M_MOV_IMM(GET_HIGH_REG(s1), 0);
745 /* place argument for tracer */
748 #if defined(__ARMEL__)
749 s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
750 abi_registers_integer_argument[i * 2 + 1]);
751 #else /* defined(__ARMEB__) */
752 s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
753 abi_registers_integer_argument[i * 2]);
759 M_LST(s1, REG_SP, s2 * 4);
763 /* prepare methodinfo pointer for tracer */
765 disp = dseg_add_address(cd, m);
766 M_DSEG_LOAD(REG_ITMP1, disp);
767 M_STR_INTERN(REG_ITMP1, REG_SP, 16);
769 /* call tracer here (we use a long branch) */
771 M_LONGBRANCH(builtin_verbosecall_enter);
773 /* Restore argument registers from stack. Keep stack 8-byte
776 M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* free argument stack */
777 M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
779 /* mark trace code */
783 #endif /* !defined(NDEBUG) */
786 /* emit_verbosecall_exit *******************************************************
788 Generates the code for the call trace.
790 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
792 *******************************************************************************/
795 void emit_verbosecall_exit(jitdata *jd)
803 /* get required compiler data */
811 /* mark trace code */
815 /* Keep stack 8-byte aligned. */
817 M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
818 M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for f and m */
820 switch (md->returntype.type) {
823 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
824 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
828 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
832 M_IST(REG_RESULT, REG_SP, 0 * 4);
836 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
840 disp = dseg_add_address(cd, m);
841 M_DSEG_LOAD(REG_ITMP1, disp);
842 M_AST(REG_ITMP1, REG_SP, 1 * 4);
843 M_LONGBRANCH(builtin_verbosecall_exit);
845 /* Keep stack 8-byte aligned. */
847 M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
848 M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
850 /* mark trace code */
854 #endif /* !defined(NDEBUG) */
858 * These are local overrides for various environment variables in Emacs.
859 * Please do not remove this and leave it at the end of the file, where
860 * Emacs will automagically detect them.
861 * ---------------------------------------------------------------------
864 * indent-tabs-mode: t
868 * vim:noexpandtab:sw=4:ts=4: