1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/arm/codegen.h"
37 #include "mm/memory.h"
39 #include "threads/lock-common.h"
41 #include "vm/exceptions.h"
42 #include "vm/global.h"
44 #include "vm/jit/abi.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/emit-common.h"
47 #include "vm/jit/jit.h"
48 #include "vm/jit/patcher-common.h"
49 #include "vm/jit/replace.h"
50 #include "vm/jit/trace.h"
51 #include "vm/jit/trap.h"
53 #include "toolbox/logging.h" /* XXX for debugging only */
56 /* emit_load *******************************************************************
58 Emits a possible load of an operand.
60 *******************************************************************************/
62 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
68 /* get required compiler data */
72 if (src->flags & INMEMORY) {
75 disp = src->vv.regoff;
77 #if defined(ENABLE_SOFTFLOAT)
82 M_ILD(tempreg, REG_SP, disp);
86 M_LLD(tempreg, REG_SP, disp);
89 vm_abort("emit_load: unknown type %d", src->type);
95 M_ILD(tempreg, REG_SP, disp);
98 M_LLD(tempreg, REG_SP, disp);
101 M_FLD(tempreg, REG_SP, disp);
104 M_DLD(tempreg, REG_SP, disp);
107 vm_abort("emit_load: unknown type %d", src->type);
114 reg = src->vv.regoff;
120 /* emit_load_low ***************************************************************
122 Emits a possible load of the low 32-bits of a long source operand.
124 *******************************************************************************/
126 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
132 assert(src->type == TYPE_LNG);
134 /* get required compiler data */
138 if (src->flags & INMEMORY) {
141 disp = src->vv.regoff;
143 #if defined(__ARMEL__)
144 M_ILD(tempreg, REG_SP, disp);
146 M_ILD(tempreg, REG_SP, disp + 4);
152 reg = GET_LOW_REG(src->vv.regoff);
158 /* emit_load_high **************************************************************
160 Emits a possible load of the high 32-bits of a long source operand.
162 *******************************************************************************/
164 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
170 assert(src->type == TYPE_LNG);
172 /* get required compiler data */
176 if (src->flags & INMEMORY) {
179 disp = src->vv.regoff;
181 #if defined(__ARMEL__)
182 M_ILD(tempreg, REG_SP, disp + 4);
184 M_ILD(tempreg, REG_SP, disp);
190 reg = GET_HIGH_REG(src->vv.regoff);
196 /* emit_store ******************************************************************
198 Emits a possible store to a variable.
200 *******************************************************************************/
202 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
207 /* get required compiler data */
211 if (dst->flags & INMEMORY) {
214 disp = dst->vv.regoff;
216 #if defined(ENABLE_SOFTFLOAT)
221 M_IST(d, REG_SP, disp);
225 M_LST(d, REG_SP, disp);
228 vm_abort("emit_store: unknown type %d", dst->type);
234 M_IST(d, REG_SP, disp);
237 M_LST(d, REG_SP, disp);
240 M_FST(d, REG_SP, disp);
243 M_DST(d, REG_SP, disp);
246 vm_abort("emit_store: unknown type %d", dst->type);
253 /* emit_copy *******************************************************************
255 Generates a register/memory to register/memory copy.
257 *******************************************************************************/
259 void emit_copy(jitdata *jd, instruction *iptr)
266 /* get required compiler data */
270 /* get source and destination variables */
272 src = VAROP(iptr->s1);
273 dst = VAROP(iptr->dst);
275 /* XXX dummy call, removed me!!! */
276 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
278 if ((src->vv.regoff != dst->vv.regoff) ||
279 ((src->flags ^ dst->flags) & INMEMORY)) {
281 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
282 /* emit nothing, as the value won't be used anyway */
286 /* If one of the variables resides in memory, we can eliminate
287 the register move from/to the temporary register with the
288 order of getting the destination register and the load. */
290 if (IS_INMEMORY(src->flags)) {
291 #if !defined(ENABLE_SOFTFLOAT)
292 if (IS_FLT_DBL_TYPE(src->type))
293 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
297 if (IS_2_WORD_TYPE(src->type))
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
303 s1 = emit_load(jd, iptr, src, d);
306 #if !defined(ENABLE_SOFTFLOAT)
307 if (IS_FLT_DBL_TYPE(src->type))
308 s1 = emit_load(jd, iptr, src, REG_FTMP1);
312 if (IS_2_WORD_TYPE(src->type))
313 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
315 s1 = emit_load(jd, iptr, src, REG_ITMP1);
318 d = codegen_reg_of_var(iptr->opc, dst, s1);
322 #if defined(ENABLE_SOFTFLOAT)
327 /* XXX grrrr, wrong direction! */
332 /* XXX grrrr, wrong direction! */
333 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
334 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
337 vm_abort("emit_copy: unknown type %d", src->type);
343 /* XXX grrrr, wrong direction! */
347 /* XXX grrrr, wrong direction! */
348 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
349 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
358 vm_abort("emit_copy: unknown type %d", src->type);
363 emit_store(jd, iptr, dst, d);
368 /* emit_iconst *****************************************************************
372 *******************************************************************************/
374 void emit_iconst(codegendata *cd, s4 d, s4 value)
381 disp = dseg_add_s4(cd, value);
382 M_DSEG_LOAD(d, disp);
387 /* emit_branch *****************************************************************
389 Emits the code for conditional and unconditional branchs.
391 *******************************************************************************/
393 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
398 /* calculate the different displacements */
400 checkdisp = (disp - 8);
401 branchdisp = (disp - 8) >> 2;
403 /* check which branch to generate */
405 if (condition == BRANCH_UNCONDITIONAL) {
406 /* check displacement for overflow */
408 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
409 /* if the long-branches flag isn't set yet, do it */
411 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
412 cd->flags |= (CODEGENDATA_FLAG_ERROR |
413 CODEGENDATA_FLAG_LONGBRANCHES);
416 vm_abort("emit_branch: emit unconditional long-branch code");
423 /* and displacement for overflow */
425 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
426 /* if the long-branches flag isn't set yet, do it */
428 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
429 cd->flags |= (CODEGENDATA_FLAG_ERROR |
430 CODEGENDATA_FLAG_LONGBRANCHES);
433 vm_abort("emit_branch: emit conditional long-branch code");
459 vm_abort("emit_branch: unknown condition %d", condition);
466 /* emit_arithmetic_check *******************************************************
468 Emit an ArithmeticException check.
470 *******************************************************************************/
472 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
474 if (INSTRUCTION_MUST_CHECK(iptr)) {
477 M_TRAPEQ(0, TRAP_ArithmeticException);
482 /* emit_nullpointer_check ******************************************************
484 Emit a NullPointerException check.
486 *******************************************************************************/
488 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
490 if (INSTRUCTION_MUST_CHECK(iptr)) {
492 M_TRAPEQ(0, TRAP_NullPointerException);
496 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
499 M_TRAPEQ(0, TRAP_NullPointerException);
503 /* emit_arrayindexoutofbounds_check ********************************************
505 Emit a ArrayIndexOutOfBoundsException check.
507 *******************************************************************************/
509 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
511 if (INSTRUCTION_MUST_CHECK(iptr)) {
512 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
513 M_CMP(s2, REG_ITMP3);
514 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
519 /* emit_arraystore_check *******************************************************
521 Emit an ArrayStoreException check.
523 *******************************************************************************/
525 void emit_arraystore_check(codegendata *cd, instruction *iptr)
527 if (INSTRUCTION_MUST_CHECK(iptr)) {
528 M_TST(REG_RESULT, REG_RESULT);
529 M_TRAPEQ(0, TRAP_ArrayStoreException);
534 /* emit_classcast_check ********************************************************
536 Emit a ClassCastException check.
538 *******************************************************************************/
540 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
542 if (INSTRUCTION_MUST_CHECK(iptr)) {
545 M_TRAPEQ(s1, TRAP_ClassCastException);
549 M_TRAPLE(s1, TRAP_ClassCastException);
553 M_TRAPHI(s1, TRAP_ClassCastException);
557 vm_abort("emit_classcast_check: unknown condition %d", condition);
562 /* emit_exception_check ********************************************************
564 Emit an Exception check.
566 *******************************************************************************/
568 void emit_exception_check(codegendata *cd, instruction *iptr)
570 if (INSTRUCTION_MUST_CHECK(iptr)) {
571 M_TST(REG_RESULT, REG_RESULT);
572 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
577 /* emit_trap *******************************************************************
579 Emit a trap instruction and return the original machine code.
581 *******************************************************************************/
583 uint32_t emit_trap(codegendata *cd)
587 /* Get machine code which is patched back in later. The
588 trap is 1 instruction word long. */
590 mcode = *((uint32_t *) cd->mcodeptr);
592 M_TRAP(0, TRAP_PATCHER);
598 /* emit_verbosecall_enter ******************************************************
600 Generates the code for the call trace.
602 *******************************************************************************/
605 void emit_verbosecall_enter(jitdata *jd)
614 /* get required compiler data */
622 /* mark trace code */
626 /* Keep stack 8-byte aligned. */
628 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
629 M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
631 /* save argument registers */
633 for (i = 0; i < md->paramcount; i++) {
634 if (!md->params[i].inmemory) {
635 s = md->params[i].regoff;
637 #if defined(ENABLE_SOFTFLOAT)
638 switch (md->paramtypes[i].type) {
642 M_IST(s, REG_SP, i * 8);
646 M_LST(s, REG_SP, i * 8);
650 switch (md->paramtypes[i].type) {
653 M_IST(s, REG_SP, i * 8);
656 M_LST(s, REG_SP, i * 8);
659 M_FST(s, REG_SP, i * 8);
662 M_DST(s, REG_SP, i * 8);
669 disp = dseg_add_address(cd, m);
670 M_DSEG_LOAD(REG_A0, disp);
671 M_MOV(REG_A1, REG_SP);
672 M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
673 M_LONGBRANCH(trace_java_call_enter);
675 /* restore argument registers */
677 for (i = 0; i < md->paramcount; i++) {
678 if (!md->params[i].inmemory) {
679 s = md->params[i].regoff;
681 #if defined(ENABLE_SOFTFLOAT)
682 switch (md->paramtypes[i].type) {
686 M_ILD(s, REG_SP, i * 8);
690 M_LLD(s, REG_SP, i * 8);
694 switch (md->paramtypes[i].type) {
697 M_ILD(s, REG_SP, i * 8);
700 M_LLD(s, REG_SP, i * 8);
703 M_FLD(s, REG_SP, i * 8);
706 M_DLD(s, REG_SP, i * 8);
713 /* Keep stack 8-byte aligned. */
715 M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
716 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
718 /* mark trace code */
722 #endif /* !defined(NDEBUG) */
725 /* emit_verbosecall_exit *******************************************************
727 Generates the code for the call trace.
729 *******************************************************************************/
732 void emit_verbosecall_exit(jitdata *jd)
740 /* get required compiler data */
748 /* mark trace code */
752 /* Keep stack 8-byte aligned. */
754 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
755 M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
757 /* save return value */
759 switch (md->returntype.type) {
763 M_IST(REG_RESULT, REG_SP, 0 * 8);
767 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
771 disp = dseg_add_address(cd, m);
772 M_DSEG_LOAD(REG_A0, disp);
773 M_MOV(REG_A1, REG_SP);
774 M_LONGBRANCH(trace_java_call_exit);
776 /* restore return value */
778 switch (md->returntype.type) {
782 M_ILD(REG_RESULT, REG_SP, 0 * 8);
786 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
790 /* Keep stack 8-byte aligned. */
792 M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
793 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
795 /* mark trace code */
799 #endif /* !defined(NDEBUG) */
803 * These are local overrides for various environment variables in Emacs.
804 * Please do not remove this and leave it at the end of the file, where
805 * Emacs will automagically detect them.
806 * ---------------------------------------------------------------------
809 * indent-tabs-mode: t
813 * vim:noexpandtab:sw=4:ts=4: