1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/arm/codegen.h"
37 #include "mm/memory.h"
39 #include "threads/lock-common.h"
41 #include "vm/global.h"
43 #include "vm/jit/abi.h"
44 #include "vm/jit/asmpart.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/trace.hpp"
50 #include "vm/jit/trap.h"
52 #include "toolbox/logging.h" /* XXX for debugging only */
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (src->flags & INMEMORY) {
74 disp = src->vv.regoff;
76 #if defined(ENABLE_SOFTFLOAT)
81 M_ILD(tempreg, REG_SP, disp);
85 M_LLD(tempreg, REG_SP, disp);
88 vm_abort("emit_load: unknown type %d", src->type);
94 M_ILD(tempreg, REG_SP, disp);
97 M_LLD(tempreg, REG_SP, disp);
100 M_FLD(tempreg, REG_SP, disp);
103 M_DLD(tempreg, REG_SP, disp);
106 vm_abort("emit_load: unknown type %d", src->type);
113 reg = src->vv.regoff;
119 /* emit_load_low ***************************************************************
121 Emits a possible load of the low 32-bits of a long source operand.
123 *******************************************************************************/
125 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
131 assert(src->type == TYPE_LNG);
133 /* get required compiler data */
137 if (src->flags & INMEMORY) {
140 disp = src->vv.regoff;
142 #if defined(__ARMEL__)
143 M_ILD(tempreg, REG_SP, disp);
145 M_ILD(tempreg, REG_SP, disp + 4);
151 reg = GET_LOW_REG(src->vv.regoff);
157 /* emit_load_high **************************************************************
159 Emits a possible load of the high 32-bits of a long source operand.
161 *******************************************************************************/
163 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
169 assert(src->type == TYPE_LNG);
171 /* get required compiler data */
175 if (src->flags & INMEMORY) {
178 disp = src->vv.regoff;
180 #if defined(__ARMEL__)
181 M_ILD(tempreg, REG_SP, disp + 4);
183 M_ILD(tempreg, REG_SP, disp);
189 reg = GET_HIGH_REG(src->vv.regoff);
195 /* emit_store ******************************************************************
197 Emits a possible store to a variable.
199 *******************************************************************************/
201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
206 /* get required compiler data */
210 if (dst->flags & INMEMORY) {
213 disp = dst->vv.regoff;
215 #if defined(ENABLE_SOFTFLOAT)
220 M_IST(d, REG_SP, disp);
224 M_LST(d, REG_SP, disp);
227 vm_abort("emit_store: unknown type %d", dst->type);
233 M_IST(d, REG_SP, disp);
236 M_LST(d, REG_SP, disp);
239 M_FST(d, REG_SP, disp);
242 M_DST(d, REG_SP, disp);
245 vm_abort("emit_store: unknown type %d", dst->type);
252 /* emit_copy *******************************************************************
254 Generates a register/memory to register/memory copy.
256 *******************************************************************************/
258 void emit_copy(jitdata *jd, instruction *iptr)
265 /* get required compiler data */
269 /* get source and destination variables */
271 src = VAROP(iptr->s1);
272 dst = VAROP(iptr->dst);
274 /* XXX dummy call, removed me!!! */
275 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
277 if ((src->vv.regoff != dst->vv.regoff) ||
278 ((src->flags ^ dst->flags) & INMEMORY)) {
280 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
281 /* emit nothing, as the value won't be used anyway */
285 /* If one of the variables resides in memory, we can eliminate
286 the register move from/to the temporary register with the
287 order of getting the destination register and the load. */
289 if (IS_INMEMORY(src->flags)) {
290 #if !defined(ENABLE_SOFTFLOAT)
291 if (IS_FLT_DBL_TYPE(src->type))
292 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
296 if (IS_2_WORD_TYPE(src->type))
297 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 #if !defined(ENABLE_SOFTFLOAT)
306 if (IS_FLT_DBL_TYPE(src->type))
307 s1 = emit_load(jd, iptr, src, REG_FTMP1);
311 if (IS_2_WORD_TYPE(src->type))
312 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
314 s1 = emit_load(jd, iptr, src, REG_ITMP1);
317 d = codegen_reg_of_var(iptr->opc, dst, s1);
321 #if defined(ENABLE_SOFTFLOAT)
326 /* XXX grrrr, wrong direction! */
331 /* XXX grrrr, wrong direction! */
332 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
333 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
336 vm_abort("emit_copy: unknown type %d", src->type);
342 /* XXX grrrr, wrong direction! */
346 /* XXX grrrr, wrong direction! */
347 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
348 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
357 vm_abort("emit_copy: unknown type %d", src->type);
362 emit_store(jd, iptr, dst, d);
367 /* emit_iconst *****************************************************************
371 *******************************************************************************/
373 void emit_iconst(codegendata *cd, s4 d, s4 value)
380 disp = dseg_add_s4(cd, value);
381 M_DSEG_LOAD(d, disp);
386 /* emit_branch *****************************************************************
388 Emits the code for conditional and unconditional branchs.
390 *******************************************************************************/
392 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
397 /* calculate the different displacements */
399 checkdisp = (disp - 8);
400 branchdisp = (disp - 8) >> 2;
402 /* check which branch to generate */
404 if (condition == BRANCH_UNCONDITIONAL) {
405 /* check displacement for overflow */
407 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
408 /* if the long-branches flag isn't set yet, do it */
410 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
411 cd->flags |= (CODEGENDATA_FLAG_ERROR |
412 CODEGENDATA_FLAG_LONGBRANCHES);
415 vm_abort("emit_branch: emit unconditional long-branch code");
422 /* and displacement for overflow */
424 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
425 /* if the long-branches flag isn't set yet, do it */
427 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
428 cd->flags |= (CODEGENDATA_FLAG_ERROR |
429 CODEGENDATA_FLAG_LONGBRANCHES);
432 vm_abort("emit_branch: emit conditional long-branch code");
458 vm_abort("emit_branch: unknown condition %d", condition);
465 /* emit_arithmetic_check *******************************************************
467 Emit an ArithmeticException check.
469 *******************************************************************************/
471 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
473 if (INSTRUCTION_MUST_CHECK(iptr)) {
476 M_TRAPEQ(0, TRAP_ArithmeticException);
481 /* emit_nullpointer_check ******************************************************
483 Emit a NullPointerException check.
485 *******************************************************************************/
487 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
489 if (INSTRUCTION_MUST_CHECK(iptr)) {
491 M_TRAPEQ(0, TRAP_NullPointerException);
495 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
498 M_TRAPEQ(0, TRAP_NullPointerException);
502 /* emit_arrayindexoutofbounds_check ********************************************
504 Emit a ArrayIndexOutOfBoundsException check.
506 *******************************************************************************/
508 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
510 if (INSTRUCTION_MUST_CHECK(iptr)) {
511 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
512 M_CMP(s2, REG_ITMP3);
513 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
518 /* emit_arraystore_check *******************************************************
520 Emit an ArrayStoreException check.
522 *******************************************************************************/
524 void emit_arraystore_check(codegendata *cd, instruction *iptr)
526 if (INSTRUCTION_MUST_CHECK(iptr)) {
527 M_TST(REG_RESULT, REG_RESULT);
528 M_TRAPEQ(0, TRAP_ArrayStoreException);
533 /* emit_classcast_check ********************************************************
535 Emit a ClassCastException check.
537 *******************************************************************************/
539 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
541 if (INSTRUCTION_MUST_CHECK(iptr)) {
544 M_TRAPEQ(s1, TRAP_ClassCastException);
548 M_TRAPLE(s1, TRAP_ClassCastException);
552 M_TRAPHI(s1, TRAP_ClassCastException);
556 vm_abort("emit_classcast_check: unknown condition %d", condition);
561 /* emit_exception_check ********************************************************
563 Emit an Exception check.
565 *******************************************************************************/
567 void emit_exception_check(codegendata *cd, instruction *iptr)
569 if (INSTRUCTION_MUST_CHECK(iptr)) {
570 M_TST(REG_RESULT, REG_RESULT);
571 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
576 /* emit_trap *******************************************************************
578 Emit a trap instruction and return the original machine code.
580 *******************************************************************************/
582 uint32_t emit_trap(codegendata *cd)
586 /* Get machine code which is patched back in later. The
587 trap is 1 instruction word long. */
589 mcode = *((uint32_t *) cd->mcodeptr);
591 M_TRAP(0, TRAP_PATCHER);
597 /* emit_verbosecall_enter ******************************************************
599 Generates the code for the call trace.
601 *******************************************************************************/
604 void emit_verbosecall_enter(jitdata *jd)
613 /* get required compiler data */
621 /* mark trace code */
625 /* Keep stack 8-byte aligned. */
627 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
628 M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
630 /* save argument registers */
632 for (i = 0; i < md->paramcount; i++) {
633 if (!md->params[i].inmemory) {
634 s = md->params[i].regoff;
636 #if defined(ENABLE_SOFTFLOAT)
637 switch (md->paramtypes[i].type) {
641 M_IST(s, REG_SP, i * 8);
645 M_LST(s, REG_SP, i * 8);
649 switch (md->paramtypes[i].type) {
652 M_IST(s, REG_SP, i * 8);
655 M_LST(s, REG_SP, i * 8);
658 M_FST(s, REG_SP, i * 8);
661 M_DST(s, REG_SP, i * 8);
668 disp = dseg_add_address(cd, m);
669 M_DSEG_LOAD(REG_A0, disp);
670 M_MOV(REG_A1, REG_SP);
671 M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
672 M_LONGBRANCH(trace_java_call_enter);
674 /* restore argument registers */
676 for (i = 0; i < md->paramcount; i++) {
677 if (!md->params[i].inmemory) {
678 s = md->params[i].regoff;
680 #if defined(ENABLE_SOFTFLOAT)
681 switch (md->paramtypes[i].type) {
685 M_ILD(s, REG_SP, i * 8);
689 M_LLD(s, REG_SP, i * 8);
693 switch (md->paramtypes[i].type) {
696 M_ILD(s, REG_SP, i * 8);
699 M_LLD(s, REG_SP, i * 8);
702 M_FLD(s, REG_SP, i * 8);
705 M_DLD(s, REG_SP, i * 8);
712 /* Keep stack 8-byte aligned. */
714 M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
715 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
717 /* mark trace code */
721 #endif /* !defined(NDEBUG) */
724 /* emit_verbosecall_exit *******************************************************
726 Generates the code for the call trace.
728 *******************************************************************************/
731 void emit_verbosecall_exit(jitdata *jd)
739 /* get required compiler data */
747 /* mark trace code */
751 /* Keep stack 8-byte aligned. */
753 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
754 M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
756 /* save return value */
758 switch (md->returntype.type) {
762 M_IST(REG_RESULT, REG_SP, 0 * 8);
766 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
770 disp = dseg_add_address(cd, m);
771 M_DSEG_LOAD(REG_A0, disp);
772 M_MOV(REG_A1, REG_SP);
773 M_LONGBRANCH(trace_java_call_exit);
775 /* restore return value */
777 switch (md->returntype.type) {
781 M_ILD(REG_RESULT, REG_SP, 0 * 8);
785 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
789 /* Keep stack 8-byte aligned. */
791 M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
792 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
794 /* mark trace code */
798 #endif /* !defined(NDEBUG) */
802 * These are local overrides for various environment variables in Emacs.
803 * Please do not remove this and leave it at the end of the file, where
804 * Emacs will automagically detect them.
805 * ---------------------------------------------------------------------
808 * indent-tabs-mode: t
812 * vim:noexpandtab:sw=4:ts=4: