1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
42 #include "vm/jit/arm/codegen.h"
44 #if defined(ENABLE_THREADS)
45 # include "threads/native/lock.h"
48 #include "vm/builtin.h"
49 #include "vm/jit/asmpart.h"
50 #include "vm/jit/emit-common.h"
51 #include "vm/jit/jit.h"
52 #include "vm/jit/replace.h"
54 #include "toolbox/logging.h" /* XXX for debugging only */
57 /* emit_load *******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (src->flags & INMEMORY) {
76 disp = src->vv.regoff * 4;
78 if (IS_FLT_DBL_TYPE(src->type)) {
79 #if !defined(ENABLE_SOFTFLOAT)
80 if (IS_2_WORD_TYPE(src->type))
81 M_DLD(tempreg, REG_SP, disp);
83 M_FLD(tempreg, REG_SP, disp);
89 if (IS_2_WORD_TYPE(src->type))
90 M_LLD(tempreg, REG_SP, disp);
92 M_ILD(tempreg, REG_SP, disp);
104 /* emit_load_low ***************************************************************
106 Emits a possible load of the low 32-bits of a long source operand.
108 *******************************************************************************/
110 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
116 assert(src->type == TYPE_LNG);
118 /* get required compiler data */
122 if (src->flags & INMEMORY) {
125 disp = src->vv.regoff * 4;
127 #if defined(__ARMEL__)
128 M_ILD(tempreg, REG_SP, disp);
130 M_ILD(tempreg, REG_SP, disp + 4);
136 reg = GET_LOW_REG(src->vv.regoff);
142 /* emit_load_high **************************************************************
144 Emits a possible load of the high 32-bits of a long source operand.
146 *******************************************************************************/
148 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
154 assert(src->type == TYPE_LNG);
156 /* get required compiler data */
160 if (src->flags & INMEMORY) {
163 disp = src->vv.regoff * 4;
165 #if defined(__ARMEL__)
166 M_ILD(tempreg, REG_SP, disp + 4);
168 M_ILD(tempreg, REG_SP, disp);
174 reg = GET_HIGH_REG(src->vv.regoff);
180 /* emit_store ******************************************************************
182 Emits a possible store to a variable.
184 *******************************************************************************/
186 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
191 /* get required compiler data */
195 if (dst->flags & INMEMORY) {
198 disp = dst->vv.regoff * 4;
200 #if !defined(ENABLE_SOFTFLOAT)
201 if (IS_FLT_DBL_TYPE(dst->type)) {
202 if (IS_2_WORD_TYPE(dst->type))
203 M_DST(d, REG_SP, disp);
205 M_FST(d, REG_SP, disp);
208 if (IS_2_WORD_TYPE(dst->type))
209 M_LST(d, REG_SP, disp);
211 M_IST(d, REG_SP, disp);
214 if (IS_2_WORD_TYPE(dst->type))
215 M_LST(d, REG_SP, disp);
217 M_IST(d, REG_SP, disp);
220 else if (IS_LNG_TYPE(dst->type)) {
221 #if defined(__ARMEL__)
222 if (GET_HIGH_REG(dst->vv.regoff) == REG_SPLIT)
223 M_IST_INTERN(GET_HIGH_REG(d), REG_SP, 0 * 4);
225 if (GET_LOW_REG(dst->vv.regoff) == REG_SPLIT)
226 M_IST_INTERN(GET_LOW_REG(d), REG_SP, 0 * 4);
232 /* emit_copy *******************************************************************
236 *******************************************************************************/
238 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
244 /* get required compiler data */
249 /* XXX dummy call, removed me!!! */
250 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
252 if ((src->vv.regoff != dst->vv.regoff) ||
253 ((src->flags ^ dst->flags) & INMEMORY)) {
255 /* If one of the variables resides in memory, we can eliminate
256 the register move from/to the temporary register with the
257 order of getting the destination register and the load. */
259 if (IS_INMEMORY(src->flags)) {
260 #if !defined(ENABLE_SOFTFLOAT)
261 if (IS_FLT_DBL_TYPE(src->type))
262 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
266 if (IS_2_WORD_TYPE(src->type))
267 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
269 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
272 s1 = emit_load(jd, iptr, src, d);
275 #if !defined(ENABLE_SOFTFLOAT)
276 if (IS_FLT_DBL_TYPE(src->type))
277 s1 = emit_load(jd, iptr, src, REG_FTMP1);
281 if (IS_2_WORD_TYPE(src->type))
282 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
284 s1 = emit_load(jd, iptr, src, REG_ITMP1);
287 d = codegen_reg_of_var(iptr->opc, dst, s1);
291 #if !defined(ENABLE_SOFTFLOAT)
292 if (IS_FLT_DBL_TYPE(src->type)) {
293 if (IS_2_WORD_TYPE(src->type))
299 if (IS_2_WORD_TYPE(src->type))
302 /* XXX grrrr, wrong direction! */
306 if (IS_2_WORD_TYPE(src->type))
309 /* XXX grrrr, wrong direction! */
314 emit_store(jd, iptr, dst, d);
319 /* emit_iconst *****************************************************************
323 *******************************************************************************/
325 void emit_iconst(codegendata *cd, s4 d, s4 value)
332 disp = dseg_add_s4(cd, value);
333 M_DSEG_LOAD(d, disp);
338 /* emit_nullpointer_check ******************************************************
340 Emit a NullPointerException check.
342 *******************************************************************************/
344 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
346 if (INSTRUCTION_MUST_CHECK(iptr)) {
349 codegen_add_nullpointerexception_ref(cd);
354 /* emit_arrayindexoutofbounds_check ********************************************
356 Emit a ArrayIndexOutOfBoundsException check.
358 *******************************************************************************/
360 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
362 if (INSTRUCTION_MUST_CHECK(iptr)) {
363 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
364 M_CMP(s2, REG_ITMP3);
366 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
371 /* emit_exception_stubs ********************************************************
373 Generates the code for the exception stubs.
375 *******************************************************************************/
377 void emit_exception_stubs(jitdata *jd)
387 /* get required compiler data */
392 /* generate exception stubs */
396 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
397 /* back-patch the branch to this exception code */
399 branchmpc = er->branchpos;
400 targetmpc = cd->mcodeptr - cd->mcodebase;
402 md_codegen_patch_branch(cd, branchmpc, targetmpc);
406 /* Check if the exception is an
407 ArrayIndexOutOfBoundsException. If so, move index register
411 M_MOV(REG_ITMP1, er->reg);
413 /* calcuate exception address */
415 assert((er->branchpos - 4) % 4 == 0);
416 M_ADD_IMM_EXT_MUL4(REG_ITMP2_XPC, REG_IP, (er->branchpos - 4) / 4);
418 /* move function to call into REG_ITMP3 */
420 disp = dseg_add_functionptr(cd, er->function);
421 M_DSEG_LOAD(REG_ITMP3, disp);
423 if (targetdisp == 0) {
424 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
426 M_MOV(rd->argintregs[0], REG_IP);
427 M_MOV(rd->argintregs[1], REG_SP);
429 if (jd->isleafmethod)
430 M_MOV(rd->argintregs[2], REG_LR);
432 M_LDR(rd->argintregs[2], REG_SP,
433 cd->stackframesize * 4 - SIZEOF_VOID_P);
435 M_MOV(rd->argintregs[3], REG_ITMP2_XPC);
438 /* TODO: we only need to save LR in leaf methods */
440 M_STMFD(BITMASK_ARGS | 1<<REG_IP | 1<<REG_LR, REG_SP);
442 /* move a3 to stack */
444 M_STR_UPDATE(REG_ITMP1, REG_SP, -4);
446 /* do the exception call */
448 M_MOV(REG_LR, REG_PC);
449 M_MOV(REG_PC, REG_ITMP3);
451 M_ADD_IMM(REG_SP, REG_SP, 4);
453 /* result of stacktrace is our XPTR */
455 M_MOV(REG_ITMP1_XPTR, REG_RESULT);
457 /* restore registers */
459 M_LDMFD(BITMASK_ARGS | 1<<REG_IP | 1<<REG_LR, REG_SP);
461 disp = dseg_add_functionptr(cd, asm_handle_exception);
462 M_DSEG_LOAD(REG_ITMP3, disp);
463 M_MOV(REG_PC, REG_ITMP3);
466 disp = (((u4 *) cd->mcodebase) + targetdisp) -
467 (((u4 *) cd->mcodeptr) + 2);
475 /* emit_patcher_stubs **********************************************************
477 Generates the code for the patcher stubs.
479 *******************************************************************************/
481 void emit_patcher_stubs(jitdata *jd)
491 /* get required compiler data */
495 /* generate patcher stub call code */
499 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
500 /* check code segment size */
504 /* Get machine code which is patched back in later. The
505 call is 1 instruction word long. */
507 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
509 mcode = *((u4 *) tmpmcodeptr);
511 /* Patch in the call to call the following code (done at
514 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
515 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
517 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
520 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
522 /* create stack frame */
524 M_SUB_IMM(REG_SP, REG_SP, 7 * 4);
526 /* save itmp3 onto stack */
528 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
530 /* calculate return address and move it onto stack */
531 /* ATTENTION: we can not use BL to branch to patcher stub, */
532 /* ATTENTION: because we need to preserve LR for leaf methods */
534 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
536 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
537 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
539 /* move pointer to java_objectheader onto stack */
541 #if defined(ENABLE_THREADS)
542 /* order reversed because of data segment layout */
544 (void) dseg_add_unique_address(cd, NULL); /* flcword */
545 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
546 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
548 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_IP, -disp / 4);
549 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
551 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
552 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
555 /* move machine code onto stack */
557 disp = dseg_add_unique_s4(cd, mcode);
558 M_DSEG_LOAD(REG_ITMP3, disp);
559 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
561 /* move class/method/field reference onto stack */
563 disp = dseg_add_unique_address(cd, pref->ref);
564 M_DSEG_LOAD(REG_ITMP3, disp);
565 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
567 /* move data segment displacement onto stack */
569 disp = dseg_add_unique_s4(cd, pref->disp);
570 M_DSEG_LOAD(REG_ITMP3, disp);
571 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
573 /* move patcher function pointer onto stack */
575 disp = dseg_add_functionptr(cd, pref->patcher);
576 M_DSEG_LOAD(REG_ITMP3, disp);
577 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
579 /* finally call the patcher via asm_patcher_wrapper */
580 /* ATTENTION: don't use REG_IP here, because some patchers need it */
582 if (targetdisp == 0) {
583 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
585 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
586 /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_IP, a);*/
587 /* TODO: this is only a hack */
588 M_DSEG_LOAD(REG_ITMP3, disp);
589 M_MOV(REG_PC, REG_ITMP3);
592 disp = (((u4 *) cd->mcodebase) + targetdisp) -
593 (((u4 *) cd->mcodeptr) + 2);
601 /* emit_replacement_stubs ******************************************************
603 Generates the code for the replacement stubs.
605 *******************************************************************************/
607 #if defined(ENABLE_REPLACEMENT)
608 void emit_replacement_stubs(jitdata *jd)
617 /* get required compiler data */
622 #endif /* defined(ENABLE_REPLACEMENT) */
625 /* emit_verbosecall_enter ******************************************************
627 Generates the code for the call trace.
629 *******************************************************************************/
632 void emit_verbosecall_enter(jitdata *jd)
642 /* get required compiler data */
650 /* stackframesize is changed below */
652 stackframesize = cd->stackframesize;
654 /* mark trace code */
658 /* save argument registers to stack (including LR and IP) */
659 M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_IP), REG_SP);
660 M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* space for a3, a4 and m */
662 stackframesize += 6 + 2 + 2 + 1;
664 /* prepare args for tracer */
666 i = md->paramcount - 1;
671 for (; i >= 0; i--) {
672 t = md->paramtypes[i].type;
674 /* load argument into register (s1) and make it of TYPE_LNG */
676 if (!md->params[i].inmemory) {
677 s1 = md->params[i].regoff;
679 if (!IS_2_WORD_TYPE(t)) {
680 M_MOV_IMM(REG_ITMP1, 0);
681 s1 = PACK_REGS(s1, REG_ITMP1);
684 SPLIT_OPEN(t, s1, REG_ITMP1);
685 SPLIT_LOAD(t, s1, stackframesize);
689 s1 = md->params[i].regoff + stackframesize;
691 if (IS_2_WORD_TYPE(t))
692 M_LLD(REG_ITMP12_PACKED, REG_SP, s1 * 4);
694 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
697 /* place argument for tracer */
700 #if defined(__ARMEL__)
701 s2 = PACK_REGS(rd->argintregs[i * 2], rd->argintregs[i * 2 + 1]);
702 #else /* defined(__ARMEB__) */
703 s2 = PACK_REGS(rd->argintregs[i * 2 + 1], rd->argintregs[i * 2]);
709 M_LST(s1, REG_SP, s2 * 4);
713 /* prepare methodinfo pointer for tracer */
715 disp = dseg_add_address(cd, m);
716 M_DSEG_LOAD(REG_ITMP1, disp);
717 M_STR_INTERN(REG_ITMP1, REG_SP, 16);
719 /* call tracer here (we use a long branch) */
721 M_LONGBRANCH(builtin_trace_args);
723 /* restore argument registers from stack */
725 M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* free argument stack */
726 M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_IP), REG_SP);
728 /* mark trace code */
732 #endif /* !defined(NDEBUG) */
735 /* emit_verbosecall_exit *******************************************************
737 Generates the code for the call trace.
739 *******************************************************************************/
742 void emit_verbosecall_exit(jitdata *jd)
751 /* get required compiler data */
759 /* mark trace code */
763 M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_IP), REG_SP);
764 M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for d[high reg] and f */
766 #if defined(__ARMEL__)
767 s1 = PACK_REGS(rd->argintregs[1], rd->argintregs[2]);
768 #else /* defined(__ARMEB__) */
769 s1 = PACK_REGS(rd->argintregs[2], rd->argintregs[1]);
772 switch (md->returntype.type) {
775 M_INTMOVE(REG_RESULT, GET_LOW_REG(s1));
776 M_MOV_IMM(GET_HIGH_REG(s1), 0);
780 M_LNGMOVE(REG_RESULT_PACKED, s1);
784 M_IST(REG_RESULT, REG_SP, 1 * 4);
788 s1 = rd->argintregs[3];
789 M_INTMOVE(REG_RESULT, s1);
790 M_IST(REG_RESULT2, REG_SP, 0 * 4);
794 disp = dseg_add_address(cd, m);
795 M_DSEG_LOAD(rd->argintregs[0], disp);
796 M_LONGBRANCH(builtin_displaymethodstop);
798 M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
799 M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_IP), REG_SP);
801 /* mark trace code */
805 #endif /* !defined(NDEBUG) */
809 * These are local overrides for various environment variables in Emacs.
810 * Please do not remove this and leave it at the end of the file, where
811 * Emacs will automagically detect them.
812 * ---------------------------------------------------------------------
815 * indent-tabs-mode: t
819 * vim:noexpandtab:sw=4:ts=4: