* src/vm/jit/arm/emit.c (emit_load): Use switch-case instead of
[cacao.git] / src / vm / jit / arm / emit.c
1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
2
3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6    J. Wenninger, Institut f. Computersprachen - TU Wien
7
8    This file is part of CACAO.
9
10    This program is free software; you can redistribute it and/or
11    modify it under the terms of the GNU General Public License as
12    published by the Free Software Foundation; either version 2, or (at
13    your option) any later version.
14
15    This program is distributed in the hope that it will be useful, but
16    WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    General Public License for more details.
19
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23    02110-1301, USA.
24
25    $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
26
27 */
28
29
30 #include "config.h"
31
32 #include <assert.h>
33
34 #include "vm/types.h"
35
36 #include "md-abi.h"
37
38 #include "vm/jit/arm/codegen.h"
39
40 #include "mm/memory.h"
41
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
44 #endif
45
46 #include "vm/builtin.h"
47 #include "vm/exceptions.h"
48 #include "vm/global.h"
49
50 #include "vm/jit/abi.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
55
56 #include "toolbox/logging.h" /* XXX for debugging only */
57
58
59 /* emit_load *******************************************************************
60
61    Emits a possible load of an operand.
62
63 *******************************************************************************/
64
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 {
67         codegendata  *cd;
68         s4            disp;
69         s4            reg;
70
71         /* get required compiler data */
72
73         cd = jd->cd;
74
75         if (src->flags & INMEMORY) {
76                 COUNT_SPILLS;
77
78                 disp = src->vv.regoff * 4;
79
80 #if defined(ENABLE_SOFTFLOAT)
81                 switch (src->type) {
82                 case TYPE_INT:
83                 case TYPE_FLT:
84                 case TYPE_ADR:
85                         M_ILD(tempreg, REG_SP, disp);
86                         break;
87                 case TYPE_LNG:
88                 case TYPE_DBL:
89                         M_LLD(tempreg, REG_SP, disp);
90                         break;
91                 default:
92                         vm_abort("emit_load: unknown type %d", src->type);
93                 }
94 #else
95                 switch (src->type) {
96                 case TYPE_INT:
97                 case TYPE_ADR:
98                         M_ILD(tempreg, REG_SP, disp);
99                         break;
100                 case TYPE_LNG:
101                         M_LLD(tempreg, REG_SP, disp);
102                         break;
103                 case TYPE_FLT:
104                         M_FLD(tempreg, REG_SP, disp);
105                         break;
106                 case TYPE_DBL:
107                         M_DLD(tempreg, REG_SP, disp);
108                         break;
109                 default:
110                         vm_abort("emit_load: unknown type %d", src->type);
111                 }
112 #endif
113
114                 reg = tempreg;
115         }
116         else
117                 reg = src->vv.regoff;
118
119         return reg;
120 }
121
122
123 /* emit_load_low ***************************************************************
124
125    Emits a possible load of the low 32-bits of a long source operand.
126
127 *******************************************************************************/
128
129 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
130 {
131         codegendata  *cd;
132         s4            disp;
133         s4            reg;
134
135         assert(src->type == TYPE_LNG);
136
137         /* get required compiler data */
138
139         cd = jd->cd;
140
141         if (src->flags & INMEMORY) {
142                 COUNT_SPILLS;
143
144                 disp = src->vv.regoff * 4;
145
146 #if defined(__ARMEL__)
147                 M_ILD(tempreg, REG_SP, disp);
148 #else
149                 M_ILD(tempreg, REG_SP, disp + 4);
150 #endif
151
152                 reg = tempreg;
153         }
154         else
155                 reg = GET_LOW_REG(src->vv.regoff);
156
157         return reg;
158 }
159
160
161 /* emit_load_high **************************************************************
162
163    Emits a possible load of the high 32-bits of a long source operand.
164
165 *******************************************************************************/
166
167 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
168 {
169         codegendata  *cd;
170         s4            disp;
171         s4            reg;
172
173         assert(src->type == TYPE_LNG);
174
175         /* get required compiler data */
176
177         cd = jd->cd;
178
179         if (src->flags & INMEMORY) {
180                 COUNT_SPILLS;
181
182                 disp = src->vv.regoff * 4;
183
184 #if defined(__ARMEL__)
185                 M_ILD(tempreg, REG_SP, disp + 4);
186 #else
187                 M_ILD(tempreg, REG_SP, disp);
188 #endif
189
190                 reg = tempreg;
191         }
192         else
193                 reg = GET_HIGH_REG(src->vv.regoff);
194
195         return reg;
196 }
197
198
199 /* emit_store ******************************************************************
200
201    Emits a possible store to a variable.
202
203 *******************************************************************************/
204
205 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
206 {
207         codegendata  *cd;
208         s4            disp;
209
210         /* get required compiler data */
211
212         cd = jd->cd;
213
214         if (dst->flags & INMEMORY) {
215                 COUNT_SPILLS;
216
217                 disp = dst->vv.regoff * 4;
218
219 #if defined(ENABLE_SOFTFLOAT)
220                 switch (dst->type) {
221                 case TYPE_INT:
222                 case TYPE_FLT:
223                 case TYPE_ADR:
224                         M_IST(d, REG_SP, disp);
225                         break;
226                 case TYPE_LNG:
227                 case TYPE_DBL:
228                         M_LST(d, REG_SP, disp);
229                         break;
230                 default:
231                         vm_abort("emit_store: unknown type %d", dst->type);
232                 }
233 #else
234                 switch (dst->type) {
235                 case TYPE_INT:
236                 case TYPE_ADR:
237                         M_IST(d, REG_SP, disp);
238                         break;
239                 case TYPE_LNG:
240                         M_LST(d, REG_SP, disp);
241                         break;
242                 case TYPE_FLT:
243                         M_FST(d, REG_SP, disp);
244                         break;
245                 case TYPE_DBL:
246                         M_DST(d, REG_SP, disp);
247                         break;
248                 default:
249                         vm_abort("emit_store: unknown type %d", dst->type);
250                 }
251 #endif
252         }
253         else if (IS_LNG_TYPE(dst->type)) {
254 #if defined(__ARMEL__)
255                 assert(GET_HIGH_REG(dst->vv.regoff) != REG_SPLIT);
256 #else
257                 assert(GET_LOW_REG(dst->vv.regoff) != REG_SPLIT);
258 #endif
259         }
260 }
261
262
263 /* emit_copy *******************************************************************
264
265    Generates a register/memory to register/memory copy.
266
267 *******************************************************************************/
268
269 void emit_copy(jitdata *jd, instruction *iptr)
270 {
271         codegendata *cd;
272         varinfo     *src;
273         varinfo     *dst;
274         s4           s1, d;
275
276         /* get required compiler data */
277
278         cd = jd->cd;
279
280         /* get source and destination variables */
281
282         src = VAROP(iptr->s1);
283         dst = VAROP(iptr->dst);
284
285         /* XXX dummy call, removed me!!! */
286         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
287
288         if ((src->vv.regoff != dst->vv.regoff) ||
289                 ((src->flags ^ dst->flags) & INMEMORY)) {
290
291                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
292                         /* emit nothing, as the value won't be used anyway */
293                         return;
294                 }
295
296                 /* If one of the variables resides in memory, we can eliminate
297                    the register move from/to the temporary register with the
298                    order of getting the destination register and the load. */
299
300                 if (IS_INMEMORY(src->flags)) {
301 #if !defined(ENABLE_SOFTFLOAT)
302                         if (IS_FLT_DBL_TYPE(src->type))
303                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
304                         else
305 #endif
306                         {
307                                 if (IS_2_WORD_TYPE(src->type))
308                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
309                                 else
310                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
311                         }
312
313                         s1 = emit_load(jd, iptr, src, d);
314                 }
315                 else {
316 #if !defined(ENABLE_SOFTFLOAT)
317                         if (IS_FLT_DBL_TYPE(src->type))
318                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
319                         else
320 #endif
321                         {
322                                 if (IS_2_WORD_TYPE(src->type))
323                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
324                                 else
325                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
326                         }
327
328                         d = codegen_reg_of_var(iptr->opc, dst, s1);
329                 }
330
331                 if (s1 != d) {
332 #if defined(ENABLE_SOFTFLOAT)
333                         switch (src->type) {
334                         case TYPE_INT:
335                         case TYPE_FLT:
336                         case TYPE_ADR:
337                                 /* XXX grrrr, wrong direction! */
338                                 M_MOV(d, s1);
339                                 break;
340                         case TYPE_LNG:
341                         case TYPE_DBL:
342                                 /* XXX grrrr, wrong direction! */
343                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
344                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
345                                 break;
346                         default:
347                                 vm_abort("emit_copy: unknown type %d", src->type);
348                         }
349 #else
350                         switch (src->type) {
351                         case TYPE_INT:
352                         case TYPE_ADR:
353                                 /* XXX grrrr, wrong direction! */
354                                 M_MOV(d, s1);
355                                 break;
356                         case TYPE_LNG:
357                                 /* XXX grrrr, wrong direction! */
358                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
359                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
360                                 break;
361                         case TYPE_FLT:
362                                 M_FMOV(s1, d);
363                                 break;
364                         case TYPE_DBL:
365                                 M_DMOV(s1, d);
366                                 break;
367                         default:
368                                 vm_abort("emit_copy: unknown type %d", src->type);
369                         }
370 #endif
371                 }
372
373                 emit_store(jd, iptr, dst, d);
374         }
375 }
376
377
378 /* emit_iconst *****************************************************************
379
380    XXX
381
382 *******************************************************************************/
383
384 void emit_iconst(codegendata *cd, s4 d, s4 value)
385 {
386         s4 disp;
387
388         if (IS_IMM(value))
389                 M_MOV_IMM(d, value);
390         else {
391                 disp = dseg_add_s4(cd, value);
392                 M_DSEG_LOAD(d, disp);
393         }
394 }
395
396
397 /* emit_branch *****************************************************************
398
399    Emits the code for conditional and unconditional branchs.
400
401 *******************************************************************************/
402
403 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
404 {
405         s4 checkdisp;
406         s4 branchdisp;
407
408         /* calculate the different displacements */
409
410         checkdisp  = (disp - 8);
411         branchdisp = (disp - 8) >> 2;
412
413         /* check which branch to generate */
414
415         if (condition == BRANCH_UNCONDITIONAL) {
416                 /* check displacement for overflow */
417
418                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
419                         /* if the long-branches flag isn't set yet, do it */
420
421                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
422                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
423                                                           CODEGENDATA_FLAG_LONGBRANCHES);
424                         }
425
426                         vm_abort("emit_branch: emit unconditional long-branch code");
427                 }
428                 else {
429                         M_B(branchdisp);
430                 }
431         }
432         else {
433                 /* and displacement for overflow */
434
435                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
436                         /* if the long-branches flag isn't set yet, do it */
437
438                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
439                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
440                                                           CODEGENDATA_FLAG_LONGBRANCHES);
441                         }
442
443                         vm_abort("emit_branch: emit conditional long-branch code");
444                 }
445                 else {
446                         switch (condition) {
447                         case BRANCH_EQ:
448                                 M_BEQ(branchdisp);
449                                 break;
450                         case BRANCH_NE:
451                                 M_BNE(branchdisp);
452                                 break;
453                         case BRANCH_LT:
454                                 M_BLT(branchdisp);
455                                 break;
456                         case BRANCH_GE:
457                                 M_BGE(branchdisp);
458                                 break;
459                         case BRANCH_GT:
460                                 M_BGT(branchdisp);
461                                 break;
462                         case BRANCH_LE:
463                                 M_BLE(branchdisp);
464                                 break;
465                         case BRANCH_UGT:
466                                 M_BHI(branchdisp);
467                                 break;
468                         default:
469                                 vm_abort("emit_branch: unknown condition %d", condition);
470                         }
471                 }
472         }
473 }
474
475
476 /* emit_arithmetic_check *******************************************************
477
478    Emit an ArithmeticException check.
479
480 *******************************************************************************/
481
482 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
483 {
484         if (INSTRUCTION_MUST_CHECK(iptr)) {
485                 CHECK_INT_REG(reg);
486                 M_TEQ_IMM(reg, 0);
487                 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
488         }
489 }
490
491
492 /* emit_nullpointer_check ******************************************************
493
494    Emit a NullPointerException check.
495
496 *******************************************************************************/
497
498 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
499 {
500         if (INSTRUCTION_MUST_CHECK(iptr)) {
501                 M_TST(reg, reg);
502                 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
503         }
504 }
505
506 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
507 {
508         M_TST(reg, reg);
509         M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
510 }
511
512
513 /* emit_arrayindexoutofbounds_check ********************************************
514
515    Emit a ArrayIndexOutOfBoundsException check.
516
517 *******************************************************************************/
518
519 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
520 {
521         if (INSTRUCTION_MUST_CHECK(iptr)) {
522                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
523                 M_CMP(s2, REG_ITMP3);
524                 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
525         }
526 }
527
528
529 /* emit_classcast_check ********************************************************
530
531    Emit a ClassCastException check.
532
533 *******************************************************************************/
534
535 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
536 {
537         if (INSTRUCTION_MUST_CHECK(iptr)) {
538                 switch (condition) {
539                 case BRANCH_EQ:
540                         M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
541                         break;
542
543                 case BRANCH_LE:
544                         M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
545                         break;
546
547                 case BRANCH_UGT:
548                         M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
549                         break;
550
551                 default:
552                         vm_abort("emit_classcast_check: unknown condition %d", condition);
553                 }
554         }
555 }
556
557 /* emit_exception_check ********************************************************
558
559    Emit an Exception check.
560
561 *******************************************************************************/
562
563 void emit_exception_check(codegendata *cd, instruction *iptr)
564 {
565         if (INSTRUCTION_MUST_CHECK(iptr)) {
566                 M_TST(REG_RESULT, REG_RESULT);
567                 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
568         }
569 }
570
571
572 /* emit_patcher_stubs **********************************************************
573
574    Generates the code for the patcher stubs.
575
576 *******************************************************************************/
577
578 void emit_patcher_stubs(jitdata *jd)
579 {
580         codegendata *cd;
581         patchref    *pref;
582         u4           mcode;
583         u1          *savedmcodeptr;
584         u1          *tmpmcodeptr;
585         s4           targetdisp;
586         s4           disp;
587
588         /* get required compiler data */
589
590         cd = jd->cd;
591
592         /* generate patcher stub call code */
593
594         targetdisp = 0;
595
596         for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
597                 /* check code segment size */
598
599                 MCODECHECK(100);
600
601                 /* Get machine code which is patched back in later. The
602                    call is 1 instruction word long. */
603
604                 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
605
606                 mcode = *((u4 *) tmpmcodeptr);
607
608                 /* Patch in the call to call the following code (done at
609                    compile time). */
610
611                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr              */
612                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position     */
613
614                 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
615                 M_B(disp);
616
617                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr       */
618
619                 /* create stack frame (align stack to 8-byte) */
620
621                 M_SUB_IMM(REG_SP, REG_SP, 8 * 4);
622
623                 /* save itmp3 onto stack */
624
625                 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
626
627                 /* calculate return address and move it onto stack */
628                 /* ATTENTION: we can not use BL to branch to patcher stub,        */
629                 /* ATTENTION: because we need to preserve LR for leaf methods     */
630
631                 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
632
633                 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
634                 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
635
636                 /* move pointer to java_objectheader onto stack */
637
638 #if defined(ENABLE_THREADS)
639                 /* order reversed because of data segment layout */
640
641                 (void) dseg_add_unique_address(cd, NULL);           /* flcword    */
642                 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
643                 disp = dseg_add_unique_address(cd, NULL);           /* vftbl      */
644
645                 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PV, -disp / 4);
646                 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
647 #else
648                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
649                 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
650 #endif
651
652                 /* move machine code onto stack */
653
654                 disp = dseg_add_unique_s4(cd, mcode);
655                 M_DSEG_LOAD(REG_ITMP3, disp);
656                 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
657
658                 /* move class/method/field reference onto stack */
659
660                 disp = dseg_add_unique_address(cd, pref->ref);
661                 M_DSEG_LOAD(REG_ITMP3, disp);
662                 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
663
664                 /* move data segment displacement onto stack */
665
666                 disp = dseg_add_unique_s4(cd, pref->disp);
667                 M_DSEG_LOAD(REG_ITMP3, disp);
668                 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
669
670                 /* move patcher function pointer onto stack */
671
672                 disp = dseg_add_functionptr(cd, pref->patcher);
673                 M_DSEG_LOAD(REG_ITMP3, disp);
674                 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
675
676                 /* finally call the patcher via asm_patcher_wrapper */
677                 /* ATTENTION: don't use REG_PV here, because some patchers need it */
678
679                 if (targetdisp == 0) {
680                         targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
681
682                         disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
683                         /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_PV, a);*/
684                         /* TODO: this is only a hack */
685                         M_DSEG_LOAD(REG_ITMP3, disp);
686                         M_MOV(REG_PC, REG_ITMP3);
687                 }
688                 else {
689                         disp = (((u4 *) cd->mcodebase) + targetdisp) -
690                                 (((u4 *) cd->mcodeptr) + 2);
691
692                         M_B(disp);
693                 }
694         }
695 }
696
697
698 /* emit_replacement_stubs ******************************************************
699
700    Generates the code for the replacement stubs.
701
702 *******************************************************************************/
703
704 #if defined(ENABLE_REPLACEMENT)
705 void emit_replacement_stubs(jitdata *jd)
706 {
707         codegendata *cd;
708         codeinfo    *code;
709         rplpoint    *rplp;
710         u1          *savedmcodeptr;
711         s4           disp;
712         s4           i;
713
714         /* get required compiler data */
715
716         cd   = jd->cd;
717         code = jd->code;
718 }
719 #endif /* defined(ENABLE_REPLACEMENT) */
720
721
722 /* emit_verbosecall_enter ******************************************************
723
724    Generates the code for the call trace.
725
726 *******************************************************************************/
727
728 #if !defined(NDEBUG)
729 void emit_verbosecall_enter(jitdata *jd)
730 {
731         methodinfo   *m;
732         codegendata  *cd;
733         registerdata *rd;
734         methoddesc   *md;
735         s4            stackframesize;
736         s4            disp;
737         s4            i, t, s1, s2;
738
739         /* get required compiler data */
740
741         m  = jd->m;
742         cd = jd->cd;
743         rd = jd->rd;
744
745         md = m->parseddesc;
746
747         /* stackframesize is changed below */
748
749         stackframesize = cd->stackframesize;
750
751         /* mark trace code */
752
753         M_NOP;
754
755         /* Save argument registers to stack (including LR and PV).  Keep
756            stack 8-byte aligned. */
757
758         M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
759         M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
760
761         stackframesize += 6 + 2 + 2 + 1 + 1;
762
763         /* prepare args for tracer */
764
765         i = md->paramcount - 1;
766
767         if (i > 3)
768                 i = 3;
769
770         for (; i >= 0; i--) {
771                 t = md->paramtypes[i].type;
772
773                 /* load argument into register (s1) and make it of TYPE_LNG */
774
775                 if (!md->params[i].inmemory) {
776                         s1 = md->params[i].regoff;
777
778                         if (!IS_2_WORD_TYPE(t)) {
779                                 M_MOV_IMM(REG_ITMP1, 0);
780                                 s1 = PACK_REGS(s1, REG_ITMP1);
781                         }
782                         else {
783                                 SPLIT_OPEN(t, s1, REG_ITMP1);
784                                 SPLIT_LOAD(t, s1, stackframesize);
785                         }
786                 }
787                 else {
788                         s1 = REG_ITMP12_PACKED;
789                         s2 = md->params[i].regoff + stackframesize;
790
791                         if (IS_2_WORD_TYPE(t))
792                                 M_LLD(s1, REG_SP, s2 * 4);
793                         else {
794                                 M_ILD(GET_LOW_REG(s1), REG_SP, s2 * 4);
795                                 M_MOV_IMM(GET_HIGH_REG(s1), 0);
796                         }
797                 }
798
799                 /* place argument for tracer */
800
801                 if (i < 2) {
802 #if defined(__ARMEL__)
803                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
804                                                    abi_registers_integer_argument[i * 2 + 1]);
805 #else /* defined(__ARMEB__) */
806                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
807                                                    abi_registers_integer_argument[i * 2]);
808 #endif          
809                         M_LNGMOVE(s1, s2);
810                 }
811                 else {
812                         s2 = (i - 2) * 2;
813                         M_LST(s1, REG_SP, s2 * 4);
814                 }
815         }
816
817         /* prepare methodinfo pointer for tracer */
818
819         disp = dseg_add_address(cd, m);
820         M_DSEG_LOAD(REG_ITMP1, disp);
821         M_STR_INTERN(REG_ITMP1, REG_SP, 16);
822
823         /* call tracer here (we use a long branch) */
824
825         M_LONGBRANCH(builtin_verbosecall_enter);
826
827         /* Restore argument registers from stack.  Keep stack 8-byte
828            aligned. */
829
830         M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4);    /* free argument stack */
831         M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
832
833         /* mark trace code */
834
835         M_NOP;
836 }
837 #endif /* !defined(NDEBUG) */
838
839
840 /* emit_verbosecall_exit *******************************************************
841
842    Generates the code for the call trace.
843
844    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
845
846 *******************************************************************************/
847
848 #if !defined(NDEBUG)
849 void emit_verbosecall_exit(jitdata *jd)
850 {
851         methodinfo   *m;
852         codegendata  *cd;
853         registerdata *rd;
854         methoddesc   *md;
855         s4            disp;
856
857         /* get required compiler data */
858
859         m  = jd->m;
860         cd = jd->cd;
861         rd = jd->rd;
862
863         md = m->parseddesc;
864
865         /* mark trace code */
866
867         M_NOP;
868
869         /* Keep stack 8-byte aligned. */
870
871         M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
872         M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4);              /* space for f and m */
873
874         switch (md->returntype.type) {
875         case TYPE_ADR:
876         case TYPE_INT:
877                 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
878                 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
879                 break;
880
881         case TYPE_LNG:
882                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
883                 break;
884
885         case TYPE_FLT:
886                 M_IST(REG_RESULT, REG_SP, 0 * 4);
887                 break;
888
889         case TYPE_DBL:
890                 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
891                 break;
892         }
893
894         disp = dseg_add_address(cd, m);
895         M_DSEG_LOAD(REG_ITMP1, disp);
896         M_AST(REG_ITMP1, REG_SP, 1 * 4);
897         M_LONGBRANCH(builtin_verbosecall_exit);
898
899         /* Keep stack 8-byte aligned. */
900
901         M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4);            /* free argument stack */
902         M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
903
904         /* mark trace code */
905
906         M_NOP;
907 }
908 #endif /* !defined(NDEBUG) */
909
910
911 /*
912  * These are local overrides for various environment variables in Emacs.
913  * Please do not remove this and leave it at the end of the file, where
914  * Emacs will automagically detect them.
915  * ---------------------------------------------------------------------
916  * Local variables:
917  * mode: c
918  * indent-tabs-mode: t
919  * c-basic-offset: 4
920  * tab-width: 4
921  * End:
922  * vim:noexpandtab:sw=4:ts=4:
923  */