src/vm/jit/arm/emit.c

   1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33
  34 #include "vm/types.h"
  35
  36 #include "md-abi.h"
  37
  38 #include "vm/jit/arm/codegen.h"
  39
  40 #include "mm/memory.h"
  41
  42 #include "threads/lock-common.h"
  43
  44 #include "vm/builtin.h"
  45 #include "vm/exceptions.h"
  46 #include "vm/global.h"
  47
  48 #include "vm/jit/abi.h"
  49 #include "vm/jit/asmpart.h"
  50 #include "vm/jit/emit-common.h"
  51 #include "vm/jit/jit.h"
  52 #include "vm/jit/patcher-common.h"
  53 #include "vm/jit/replace.h"
  54
  55 #include "toolbox/logging.h" /* XXX for debugging only */
  56
  57
  58 /* emit_load *******************************************************************
  59
  60    Emits a possible load of an operand.
  61
  62 *******************************************************************************/
  63
  64 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  65 {
  66         codegendata  *cd;
  67         s4            disp;
  68         s4            reg;
  69
  70         /* get required compiler data */
  71
  72         cd = jd->cd;
  73
  74         if (src->flags & INMEMORY) {
  75                 COUNT_SPILLS;
  76
  77                 disp = src->vv.regoff;
  78
  79 #if defined(ENABLE_SOFTFLOAT)
  80                 switch (src->type) {
  81                 case TYPE_INT:
  82                 case TYPE_FLT:
  83                 case TYPE_ADR:
  84                         M_ILD(tempreg, REG_SP, disp);
  85                         break;
  86                 case TYPE_LNG:
  87                 case TYPE_DBL:
  88                         M_LLD(tempreg, REG_SP, disp);
  89                         break;
  90                 default:
  91                         vm_abort("emit_load: unknown type %d", src->type);
  92                 }
  93 #else
  94                 switch (src->type) {
  95                 case TYPE_INT:
  96                 case TYPE_ADR:
  97                         M_ILD(tempreg, REG_SP, disp);
  98                         break;
  99                 case TYPE_LNG:
 100                         M_LLD(tempreg, REG_SP, disp);
 101                         break;
 102                 case TYPE_FLT:
 103                         M_FLD(tempreg, REG_SP, disp);
 104                         break;
 105                 case TYPE_DBL:
 106                         M_DLD(tempreg, REG_SP, disp);
 107                         break;
 108                 default:
 109                         vm_abort("emit_load: unknown type %d", src->type);
 110                 }
 111 #endif
 112
 113                 reg = tempreg;
 114         }
 115         else
 116                 reg = src->vv.regoff;
 117
 118         return reg;
 119 }
 120
 121
 122 /* emit_load_low ***************************************************************
 123
 124    Emits a possible load of the low 32-bits of a long source operand.
 125
 126 *******************************************************************************/
 127
 128 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 129 {
 130         codegendata  *cd;
 131         s4            disp;
 132         s4            reg;
 133
 134         assert(src->type == TYPE_LNG);
 135
 136         /* get required compiler data */
 137
 138         cd = jd->cd;
 139
 140         if (src->flags & INMEMORY) {
 141                 COUNT_SPILLS;
 142
 143                 disp = src->vv.regoff;
 144
 145 #if defined(__ARMEL__)
 146                 M_ILD(tempreg, REG_SP, disp);
 147 #else
 148                 M_ILD(tempreg, REG_SP, disp + 4);
 149 #endif
 150
 151                 reg = tempreg;
 152         }
 153         else
 154                 reg = GET_LOW_REG(src->vv.regoff);
 155
 156         return reg;
 157 }
 158
 159
 160 /* emit_load_high **************************************************************
 161
 162    Emits a possible load of the high 32-bits of a long source operand.
 163
 164 *******************************************************************************/
 165
 166 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 167 {
 168         codegendata  *cd;
 169         s4            disp;
 170         s4            reg;
 171
 172         assert(src->type == TYPE_LNG);
 173
 174         /* get required compiler data */
 175
 176         cd = jd->cd;
 177
 178         if (src->flags & INMEMORY) {
 179                 COUNT_SPILLS;
 180
 181                 disp = src->vv.regoff;
 182
 183 #if defined(__ARMEL__)
 184                 M_ILD(tempreg, REG_SP, disp + 4);
 185 #else
 186                 M_ILD(tempreg, REG_SP, disp);
 187 #endif
 188
 189                 reg = tempreg;
 190         }
 191         else
 192                 reg = GET_HIGH_REG(src->vv.regoff);
 193
 194         return reg;
 195 }
 196
 197
 198 /* emit_store ******************************************************************
 199
 200    Emits a possible store to a variable.
 201
 202 *******************************************************************************/
 203
 204 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 205 {
 206         codegendata  *cd;
 207         s4            disp;
 208
 209         /* get required compiler data */
 210
 211         cd = jd->cd;
 212
 213         if (dst->flags & INMEMORY) {
 214                 COUNT_SPILLS;
 215
 216                 disp = dst->vv.regoff;
 217
 218 #if defined(ENABLE_SOFTFLOAT)
 219                 switch (dst->type) {
 220                 case TYPE_INT:
 221                 case TYPE_FLT:
 222                 case TYPE_ADR:
 223                         M_IST(d, REG_SP, disp);
 224                         break;
 225                 case TYPE_LNG:
 226                 case TYPE_DBL:
 227                         M_LST(d, REG_SP, disp);
 228                         break;
 229                 default:
 230                         vm_abort("emit_store: unknown type %d", dst->type);
 231                 }
 232 #else
 233                 switch (dst->type) {
 234                 case TYPE_INT:
 235                 case TYPE_ADR:
 236                         M_IST(d, REG_SP, disp);
 237                         break;
 238                 case TYPE_LNG:
 239                         M_LST(d, REG_SP, disp);
 240                         break;
 241                 case TYPE_FLT:
 242                         M_FST(d, REG_SP, disp);
 243                         break;
 244                 case TYPE_DBL:
 245                         M_DST(d, REG_SP, disp);
 246                         break;
 247                 default:
 248                         vm_abort("emit_store: unknown type %d", dst->type);
 249                 }
 250 #endif
 251         }
 252 }
 253
 254
 255 /* emit_copy *******************************************************************
 256
 257    Generates a register/memory to register/memory copy.
 258
 259 *******************************************************************************/
 260
 261 void emit_copy(jitdata *jd, instruction *iptr)
 262 {
 263         codegendata *cd;
 264         varinfo     *src;
 265         varinfo     *dst;
 266         s4           s1, d;
 267
 268         /* get required compiler data */
 269
 270         cd = jd->cd;
 271
 272         /* get source and destination variables */
 273
 274         src = VAROP(iptr->s1);
 275         dst = VAROP(iptr->dst);
 276
 277         /* XXX dummy call, removed me!!! */
 278         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 279
 280         if ((src->vv.regoff != dst->vv.regoff) ||
 281                 ((src->flags ^ dst->flags) & INMEMORY)) {
 282
 283                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 284                         /* emit nothing, as the value won't be used anyway */
 285                         return;
 286                 }
 287
 288                 /* If one of the variables resides in memory, we can eliminate
 289                    the register move from/to the temporary register with the
 290                    order of getting the destination register and the load. */
 291
 292                 if (IS_INMEMORY(src->flags)) {
 293 #if !defined(ENABLE_SOFTFLOAT)
 294                         if (IS_FLT_DBL_TYPE(src->type))
 295                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
 296                         else
 297 #endif
 298                         {
 299                                 if (IS_2_WORD_TYPE(src->type))
 300                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 301                                 else
 302                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 303                         }
 304
 305                         s1 = emit_load(jd, iptr, src, d);
 306                 }
 307                 else {
 308 #if !defined(ENABLE_SOFTFLOAT)
 309                         if (IS_FLT_DBL_TYPE(src->type))
 310                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
 311                         else
 312 #endif
 313                         {
 314                                 if (IS_2_WORD_TYPE(src->type))
 315                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 316                                 else
 317                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
 318                         }
 319
 320                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 321                 }
 322
 323                 if (s1 != d) {
 324 #if defined(ENABLE_SOFTFLOAT)
 325                         switch (src->type) {
 326                         case TYPE_INT:
 327                         case TYPE_FLT:
 328                         case TYPE_ADR:
 329                                 /* XXX grrrr, wrong direction! */
 330                                 M_MOV(d, s1);
 331                                 break;
 332                         case TYPE_LNG:
 333                         case TYPE_DBL:
 334                                 /* XXX grrrr, wrong direction! */
 335                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 336                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 337                                 break;
 338                         default:
 339                                 vm_abort("emit_copy: unknown type %d", src->type);
 340                         }
 341 #else
 342                         switch (src->type) {
 343                         case TYPE_INT:
 344                         case TYPE_ADR:
 345                                 /* XXX grrrr, wrong direction! */
 346                                 M_MOV(d, s1);
 347                                 break;
 348                         case TYPE_LNG:
 349                                 /* XXX grrrr, wrong direction! */
 350                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 351                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 352                                 break;
 353                         case TYPE_FLT:
 354                                 M_FMOV(s1, d);
 355                                 break;
 356                         case TYPE_DBL:
 357                                 M_DMOV(s1, d);
 358                                 break;
 359                         default:
 360                                 vm_abort("emit_copy: unknown type %d", src->type);
 361                         }
 362 #endif
 363                 }
 364
 365                 emit_store(jd, iptr, dst, d);
 366         }
 367 }
 368
 369
 370 /* emit_iconst *****************************************************************
 371
 372    XXX
 373
 374 *******************************************************************************/
 375
 376 void emit_iconst(codegendata *cd, s4 d, s4 value)
 377 {
 378         s4 disp;
 379
 380         if (IS_IMM(value))
 381                 M_MOV_IMM(d, value);
 382         else {
 383                 disp = dseg_add_s4(cd, value);
 384                 M_DSEG_LOAD(d, disp);
 385         }
 386 }
 387
 388
 389 /* emit_branch *****************************************************************
 390
 391    Emits the code for conditional and unconditional branchs.
 392
 393 *******************************************************************************/
 394
 395 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 396 {
 397         s4 checkdisp;
 398         s4 branchdisp;
 399
 400         /* calculate the different displacements */
 401
 402         checkdisp  = (disp - 8);
 403         branchdisp = (disp - 8) >> 2;
 404
 405         /* check which branch to generate */
 406
 407         if (condition == BRANCH_UNCONDITIONAL) {
 408                 /* check displacement for overflow */
 409
 410                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 411                         /* if the long-branches flag isn't set yet, do it */
 412
 413                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 414                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 415                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 416                         }
 417
 418                         vm_abort("emit_branch: emit unconditional long-branch code");
 419                 }
 420                 else {
 421                         M_B(branchdisp);
 422                 }
 423         }
 424         else {
 425                 /* and displacement for overflow */
 426
 427                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 428                         /* if the long-branches flag isn't set yet, do it */
 429
 430                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 431                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 432                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 433                         }
 434
 435                         vm_abort("emit_branch: emit conditional long-branch code");
 436                 }
 437                 else {
 438                         switch (condition) {
 439                         case BRANCH_EQ:
 440                                 M_BEQ(branchdisp);
 441                                 break;
 442                         case BRANCH_NE:
 443                                 M_BNE(branchdisp);
 444                                 break;
 445                         case BRANCH_LT:
 446                                 M_BLT(branchdisp);
 447                                 break;
 448                         case BRANCH_GE:
 449                                 M_BGE(branchdisp);
 450                                 break;
 451                         case BRANCH_GT:
 452                                 M_BGT(branchdisp);
 453                                 break;
 454                         case BRANCH_LE:
 455                                 M_BLE(branchdisp);
 456                                 break;
 457                         case BRANCH_UGT:
 458                                 M_BHI(branchdisp);
 459                                 break;
 460                         default:
 461                                 vm_abort("emit_branch: unknown condition %d", condition);
 462                         }
 463                 }
 464         }
 465 }
 466
 467
 468 /* emit_arithmetic_check *******************************************************
 469
 470    Emit an ArithmeticException check.
 471
 472 *******************************************************************************/
 473
 474 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 475 {
 476         if (INSTRUCTION_MUST_CHECK(iptr)) {
 477                 CHECK_INT_REG(reg);
 478                 M_TEQ_IMM(reg, 0);
 479                 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
 480         }
 481 }
 482
 483
 484 /* emit_nullpointer_check ******************************************************
 485
 486    Emit a NullPointerException check.
 487
 488 *******************************************************************************/
 489
 490 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 491 {
 492         if (INSTRUCTION_MUST_CHECK(iptr)) {
 493                 M_TST(reg, reg);
 494                 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 495         }
 496 }
 497
 498 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
 499 {
 500         M_TST(reg, reg);
 501         M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
 502 }
 503
 504
 505 /* emit_arrayindexoutofbounds_check ********************************************
 506
 507    Emit a ArrayIndexOutOfBoundsException check.
 508
 509 *******************************************************************************/
 510
 511 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 512 {
 513         if (INSTRUCTION_MUST_CHECK(iptr)) {
 514                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
 515                 M_CMP(s2, REG_ITMP3);
 516                 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
 517         }
 518 }
 519
 520
 521 /* emit_classcast_check ********************************************************
 522
 523    Emit a ClassCastException check.
 524
 525 *******************************************************************************/
 526
 527 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 528 {
 529         if (INSTRUCTION_MUST_CHECK(iptr)) {
 530                 switch (condition) {
 531                 case BRANCH_EQ:
 532                         M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
 533                         break;
 534
 535                 case BRANCH_LE:
 536                         M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
 537                         break;
 538
 539                 case BRANCH_UGT:
 540                         M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
 541                         break;
 542
 543                 default:
 544                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 545                 }
 546         }
 547 }
 548
 549 /* emit_exception_check ********************************************************
 550
 551    Emit an Exception check.
 552
 553 *******************************************************************************/
 554
 555 void emit_exception_check(codegendata *cd, instruction *iptr)
 556 {
 557         if (INSTRUCTION_MUST_CHECK(iptr)) {
 558                 M_TST(REG_RESULT, REG_RESULT);
 559                 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
 560         }
 561 }
 562
 563
 564 /* emit_patcher_traps **********************************************************
 565
 566    Generates the code for the patcher traps.
 567
 568 *******************************************************************************/
 569
 570 void emit_patcher_traps(jitdata *jd)
 571 {
 572         codegendata *cd;
 573         codeinfo    *code;
 574         patchref_t  *pr;
 575         u1          *savedmcodeptr;
 576         u1          *tmpmcodeptr;
 577
 578         /* get required compiler data */
 579
 580         cd   = jd->cd;
 581         code = jd->code;
 582
 583         /* generate patcher traps code */
 584
 585         for (pr = list_first_unsynced(code->patchers); pr != NULL; pr = list_next_unsynced(code->patchers, pr)) {
 586
 587                 /* Get machine code which is patched back in later. The
 588                    trap is 1 instruction word long. */
 589
 590                 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->mpc);
 591
 592                 pr->mcode = *((u4 *) tmpmcodeptr);
 593
 594                 /* Patch in the trap to call the signal handler (done at
 595                    compile time). */
 596
 597                 savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr              */
 598                 cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position     */
 599
 600                 M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
 601
 602                 cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr       */
 603         }
 604 }
 605
 606
 607 /* emit_verbosecall_enter ******************************************************
 608
 609    Generates the code for the call trace.
 610
 611 *******************************************************************************/
 612
 613 #if !defined(NDEBUG)
 614 void emit_verbosecall_enter(jitdata *jd)
 615 {
 616         methodinfo   *m;
 617         codegendata  *cd;
 618         registerdata *rd;
 619         methoddesc   *md;
 620         s4            stackframesize;
 621         s4            disp;
 622         s4            i, t, s1, s2;
 623
 624         /* get required compiler data */
 625
 626         m  = jd->m;
 627         cd = jd->cd;
 628         rd = jd->rd;
 629
 630         md = m->parseddesc;
 631
 632         /* stackframesize is changed below */
 633
 634         stackframesize = cd->stackframesize;
 635
 636         /* mark trace code */
 637
 638         M_NOP;
 639
 640         /* Save argument registers to stack (including LR and PV).  Keep
 641            stack 8-byte aligned. */
 642
 643         M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 644         M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
 645
 646         stackframesize += (6 + 2 + 2 + 1 + 1) * 4;
 647
 648         /* prepare args for tracer */
 649
 650         i = md->paramcount - 1;
 651
 652         if (i > 3)
 653                 i = 3;
 654
 655         for (; i >= 0; i--) {
 656                 t = md->paramtypes[i].type;
 657
 658                 /* load argument into register (s1) and make it of TYPE_LNG */
 659
 660                 if (!md->params[i].inmemory) {
 661                         s1 = md->params[i].regoff;
 662
 663                         if (!IS_2_WORD_TYPE(t)) {
 664                                 M_MOV_IMM(REG_ITMP1, 0);
 665                                 s1 = PACK_REGS(s1, REG_ITMP1);
 666                         }
 667                 }
 668                 else {
 669                         s1 = REG_ITMP12_PACKED;
 670                         s2 = md->params[i].regoff + stackframesize;
 671
 672                         if (IS_2_WORD_TYPE(t))
 673                                 M_LLD(s1, REG_SP, s2);
 674                         else {
 675                                 M_ILD(GET_LOW_REG(s1), REG_SP, s2);
 676                                 M_MOV_IMM(GET_HIGH_REG(s1), 0);
 677                         }
 678                 }
 679
 680                 /* place argument for tracer */
 681
 682                 if (i < 2) {
 683 #if defined(__ARMEL__)
 684                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
 685                                                    abi_registers_integer_argument[i * 2 + 1]);
 686 #else /* defined(__ARMEB__) */
 687                         s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
 688                                                    abi_registers_integer_argument[i * 2]);
 689 #endif
 690                         M_LNGMOVE(s1, s2);
 691                 }
 692                 else {
 693                         s2 = (i - 2) * 2;
 694                         M_LST(s1, REG_SP, s2 * 4);
 695                 }
 696         }
 697
 698         /* prepare methodinfo pointer for tracer */
 699
 700         disp = dseg_add_address(cd, m);
 701         M_DSEG_LOAD(REG_ITMP1, disp);
 702         M_STR_INTERN(REG_ITMP1, REG_SP, 16);
 703
 704         /* call tracer here (we use a long branch) */
 705
 706         M_LONGBRANCH(builtin_verbosecall_enter);
 707
 708         /* Restore argument registers from stack.  Keep stack 8-byte
 709            aligned. */
 710
 711         M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4);    /* free argument stack */
 712         M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 713
 714         /* mark trace code */
 715
 716         M_NOP;
 717 }
 718 #endif /* !defined(NDEBUG) */
 719
 720
 721 /* emit_verbosecall_exit *******************************************************
 722
 723    Generates the code for the call trace.
 724
 725    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
 726
 727 *******************************************************************************/
 728
 729 #if !defined(NDEBUG)
 730 void emit_verbosecall_exit(jitdata *jd)
 731 {
 732         methodinfo   *m;
 733         codegendata  *cd;
 734         registerdata *rd;
 735         methoddesc   *md;
 736         s4            disp;
 737
 738         /* get required compiler data */
 739
 740         m  = jd->m;
 741         cd = jd->cd;
 742         rd = jd->rd;
 743
 744         md = m->parseddesc;
 745
 746         /* mark trace code */
 747
 748         M_NOP;
 749
 750         /* Keep stack 8-byte aligned. */
 751
 752         M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 753         M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4);              /* space for f and m */
 754
 755         switch (md->returntype.type) {
 756         case TYPE_ADR:
 757         case TYPE_INT:
 758                 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
 759                 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
 760                 break;
 761
 762         case TYPE_LNG:
 763                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
 764                 break;
 765
 766         case TYPE_FLT:
 767                 M_IST(REG_RESULT, REG_SP, 0 * 4);
 768                 break;
 769
 770         case TYPE_DBL:
 771                 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
 772                 break;
 773         }
 774
 775         disp = dseg_add_address(cd, m);
 776         M_DSEG_LOAD(REG_ITMP1, disp);
 777         M_AST(REG_ITMP1, REG_SP, 1 * 4);
 778         M_LONGBRANCH(builtin_verbosecall_exit);
 779
 780         /* Keep stack 8-byte aligned. */
 781
 782         M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4);            /* free argument stack */
 783         M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
 784
 785         /* mark trace code */
 786
 787         M_NOP;
 788 }
 789 #endif /* !defined(NDEBUG) */
 790
 791
 792 /*
 793  * These are local overrides for various environment variables in Emacs.
 794  * Please do not remove this and leave it at the end of the file, where
 795  * Emacs will automagically detect them.
 796  * ---------------------------------------------------------------------
 797  * Local variables:
 798  * mode: c
 799  * indent-tabs-mode: t
 800  * c-basic-offset: 4
 801  * tab-width: 4
 802  * End:
 803  * vim:noexpandtab:sw=4:ts=4:
 804  */