Merged with michi branch at rev 1684fe51cf3d.
[cacao.git] / src / vm / jit / arm / emit.c
1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
2
3    Copyright (C) 1996-2005, 2006, 2007, 2008
4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
5
6    This file is part of CACAO.
7
8    This program is free software; you can redistribute it and/or
9    modify it under the terms of the GNU General Public License as
10    published by the Free Software Foundation; either version 2, or (at
11    your option) any later version.
12
13    This program is distributed in the hope that it will be useful, but
14    WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16    General Public License for more details.
17
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21    02110-1301, USA.
22
23 */
24
25
26 #include "config.h"
27
28 #include <assert.h>
29 #include <stdint.h>
30
31 #include "vm/types.h"
32
33 #include "md-abi.h"
34
35 #include "vm/jit/arm/codegen.h"
36
37 #include "mm/memory.hpp"
38
39 #include "threads/lock.hpp"
40
41 #include "vm/global.h"
42
43 #include "vm/jit/abi.h"
44 #include "vm/jit/asmpart.h"
45 #include "vm/jit/emit-common.hpp"
46 #include "vm/jit/jit.hpp"
47 #include "vm/jit/patcher-common.hpp"
48 #include "vm/jit/replace.hpp"
49 #include "vm/jit/trace.hpp"
50 #include "vm/jit/trap.hpp"
51
52 #include "toolbox/logging.hpp" /* XXX for debugging only */
53
54
55 /* emit_load *******************************************************************
56
57    Emits a possible load of an operand.
58
59 *******************************************************************************/
60
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
62 {
63         codegendata  *cd;
64         s4            disp;
65         s4            reg;
66
67         /* get required compiler data */
68
69         cd = jd->cd;
70
71         if (src->flags & INMEMORY) {
72                 COUNT_SPILLS;
73
74                 disp = src->vv.regoff;
75
76 #if defined(ENABLE_SOFTFLOAT)
77                 switch (src->type) {
78                 case TYPE_INT:
79                 case TYPE_FLT:
80                 case TYPE_ADR:
81                         M_ILD(tempreg, REG_SP, disp);
82                         break;
83                 case TYPE_LNG:
84                 case TYPE_DBL:
85                         M_LLD(tempreg, REG_SP, disp);
86                         break;
87                 default:
88                         vm_abort("emit_load: unknown type %d", src->type);
89                 }
90 #else
91                 switch (src->type) {
92                 case TYPE_INT:
93                 case TYPE_ADR:
94                         M_ILD(tempreg, REG_SP, disp);
95                         break;
96                 case TYPE_LNG:
97                         M_LLD(tempreg, REG_SP, disp);
98                         break;
99                 case TYPE_FLT:
100                         M_FLD(tempreg, REG_SP, disp);
101                         break;
102                 case TYPE_DBL:
103                         M_DLD(tempreg, REG_SP, disp);
104                         break;
105                 default:
106                         vm_abort("emit_load: unknown type %d", src->type);
107                 }
108 #endif
109
110                 reg = tempreg;
111         }
112         else
113                 reg = src->vv.regoff;
114
115         return reg;
116 }
117
118
119 /* emit_load_low ***************************************************************
120
121    Emits a possible load of the low 32-bits of a long source operand.
122
123 *******************************************************************************/
124
125 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
126 {
127         codegendata  *cd;
128         s4            disp;
129         s4            reg;
130
131         assert(src->type == TYPE_LNG);
132
133         /* get required compiler data */
134
135         cd = jd->cd;
136
137         if (src->flags & INMEMORY) {
138                 COUNT_SPILLS;
139
140                 disp = src->vv.regoff;
141
142 #if defined(__ARMEL__)
143                 M_ILD(tempreg, REG_SP, disp);
144 #else
145                 M_ILD(tempreg, REG_SP, disp + 4);
146 #endif
147
148                 reg = tempreg;
149         }
150         else
151                 reg = GET_LOW_REG(src->vv.regoff);
152
153         return reg;
154 }
155
156
157 /* emit_load_high **************************************************************
158
159    Emits a possible load of the high 32-bits of a long source operand.
160
161 *******************************************************************************/
162
163 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
164 {
165         codegendata  *cd;
166         s4            disp;
167         s4            reg;
168
169         assert(src->type == TYPE_LNG);
170
171         /* get required compiler data */
172
173         cd = jd->cd;
174
175         if (src->flags & INMEMORY) {
176                 COUNT_SPILLS;
177
178                 disp = src->vv.regoff;
179
180 #if defined(__ARMEL__)
181                 M_ILD(tempreg, REG_SP, disp + 4);
182 #else
183                 M_ILD(tempreg, REG_SP, disp);
184 #endif
185
186                 reg = tempreg;
187         }
188         else
189                 reg = GET_HIGH_REG(src->vv.regoff);
190
191         return reg;
192 }
193
194
195 /* emit_store ******************************************************************
196
197    Emits a possible store to a variable.
198
199 *******************************************************************************/
200
201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
202 {
203         codegendata  *cd;
204         s4            disp;
205
206         /* get required compiler data */
207
208         cd = jd->cd;
209
210         if (dst->flags & INMEMORY) {
211                 COUNT_SPILLS;
212
213                 disp = dst->vv.regoff;
214
215 #if defined(ENABLE_SOFTFLOAT)
216                 switch (dst->type) {
217                 case TYPE_INT:
218                 case TYPE_FLT:
219                 case TYPE_ADR:
220                         M_IST(d, REG_SP, disp);
221                         break;
222                 case TYPE_LNG:
223                 case TYPE_DBL:
224                         M_LST(d, REG_SP, disp);
225                         break;
226                 default:
227                         vm_abort("emit_store: unknown type %d", dst->type);
228                 }
229 #else
230                 switch (dst->type) {
231                 case TYPE_INT:
232                 case TYPE_ADR:
233                         M_IST(d, REG_SP, disp);
234                         break;
235                 case TYPE_LNG:
236                         M_LST(d, REG_SP, disp);
237                         break;
238                 case TYPE_FLT:
239                         M_FST(d, REG_SP, disp);
240                         break;
241                 case TYPE_DBL:
242                         M_DST(d, REG_SP, disp);
243                         break;
244                 default:
245                         vm_abort("emit_store: unknown type %d", dst->type);
246                 }
247 #endif
248         }
249 }
250
251
252 /* emit_copy *******************************************************************
253
254    Generates a register/memory to register/memory copy.
255
256 *******************************************************************************/
257
258 void emit_copy(jitdata *jd, instruction *iptr)
259 {
260         codegendata *cd;
261         varinfo     *src;
262         varinfo     *dst;
263         s4           s1, d;
264
265         /* get required compiler data */
266
267         cd = jd->cd;
268
269         /* get source and destination variables */
270
271         src = VAROP(iptr->s1);
272         dst = VAROP(iptr->dst);
273
274         /* XXX dummy call, removed me!!! */
275         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
276
277         if ((src->vv.regoff != dst->vv.regoff) ||
278                 ((src->flags ^ dst->flags) & INMEMORY)) {
279
280                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
281                         /* emit nothing, as the value won't be used anyway */
282                         return;
283                 }
284
285                 /* If one of the variables resides in memory, we can eliminate
286                    the register move from/to the temporary register with the
287                    order of getting the destination register and the load. */
288
289                 if (IS_INMEMORY(src->flags)) {
290 #if !defined(ENABLE_SOFTFLOAT)
291                         if (IS_FLT_DBL_TYPE(src->type))
292                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
293                         else
294 #endif
295                         {
296                                 if (IS_2_WORD_TYPE(src->type))
297                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
298                                 else
299                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
300                         }
301
302                         s1 = emit_load(jd, iptr, src, d);
303                 }
304                 else {
305 #if !defined(ENABLE_SOFTFLOAT)
306                         if (IS_FLT_DBL_TYPE(src->type))
307                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
308                         else
309 #endif
310                         {
311                                 if (IS_2_WORD_TYPE(src->type))
312                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
313                                 else
314                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
315                         }
316
317                         d = codegen_reg_of_var(iptr->opc, dst, s1);
318                 }
319
320                 if (s1 != d) {
321 #if defined(ENABLE_SOFTFLOAT)
322                         switch (src->type) {
323                         case TYPE_INT:
324                         case TYPE_FLT:
325                         case TYPE_ADR:
326                                 /* XXX grrrr, wrong direction! */
327                                 M_MOV(d, s1);
328                                 break;
329                         case TYPE_LNG:
330                         case TYPE_DBL:
331                                 /* XXX grrrr, wrong direction! */
332                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
333                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
334                                 break;
335                         default:
336                                 vm_abort("emit_copy: unknown type %d", src->type);
337                         }
338 #else
339                         switch (src->type) {
340                         case TYPE_INT:
341                         case TYPE_ADR:
342                                 /* XXX grrrr, wrong direction! */
343                                 M_MOV(d, s1);
344                                 break;
345                         case TYPE_LNG:
346                                 /* XXX grrrr, wrong direction! */
347                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
348                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
349                                 break;
350                         case TYPE_FLT:
351                                 M_FMOV(s1, d);
352                                 break;
353                         case TYPE_DBL:
354                                 M_DMOV(s1, d);
355                                 break;
356                         default:
357                                 vm_abort("emit_copy: unknown type %d", src->type);
358                         }
359 #endif
360                 }
361
362                 emit_store(jd, iptr, dst, d);
363         }
364 }
365
366
367 /* emit_iconst *****************************************************************
368
369    XXX
370
371 *******************************************************************************/
372
373 void emit_iconst(codegendata *cd, s4 d, s4 value)
374 {
375         s4 disp;
376
377         if (IS_IMM(value))
378                 M_MOV_IMM(d, value);
379         else {
380                 disp = dseg_add_s4(cd, value);
381                 M_DSEG_LOAD(d, disp);
382         }
383 }
384
385
386 /* emit_branch *****************************************************************
387
388    Emits the code for conditional and unconditional branchs.
389
390 *******************************************************************************/
391
392 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
393 {
394         s4 checkdisp;
395         s4 branchdisp;
396
397         /* calculate the different displacements */
398
399         checkdisp  = (disp - 8);
400         branchdisp = (disp - 8) >> 2;
401
402         /* check which branch to generate */
403
404         if (condition == BRANCH_UNCONDITIONAL) {
405                 /* check displacement for overflow */
406
407                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
408                         /* if the long-branches flag isn't set yet, do it */
409
410                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
411                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
412                                                           CODEGENDATA_FLAG_LONGBRANCHES);
413                         }
414
415                         vm_abort("emit_branch: emit unconditional long-branch code");
416                 }
417                 else {
418                         M_B(branchdisp);
419                 }
420         }
421         else {
422                 /* and displacement for overflow */
423
424                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
425                         /* if the long-branches flag isn't set yet, do it */
426
427                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
428                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
429                                                           CODEGENDATA_FLAG_LONGBRANCHES);
430                         }
431
432                         vm_abort("emit_branch: emit conditional long-branch code");
433                 }
434                 else {
435                         switch (condition) {
436                         case BRANCH_EQ:
437                                 M_BEQ(branchdisp);
438                                 break;
439                         case BRANCH_NE:
440                                 M_BNE(branchdisp);
441                                 break;
442                         case BRANCH_LT:
443                                 M_BLT(branchdisp);
444                                 break;
445                         case BRANCH_GE:
446                                 M_BGE(branchdisp);
447                                 break;
448                         case BRANCH_GT:
449                                 M_BGT(branchdisp);
450                                 break;
451                         case BRANCH_LE:
452                                 M_BLE(branchdisp);
453                                 break;
454                         case BRANCH_UGT:
455                                 M_BHI(branchdisp);
456                                 break;
457                         default:
458                                 vm_abort("emit_branch: unknown condition %d", condition);
459                         }
460                 }
461         }
462 }
463
464
465 /* emit_arithmetic_check *******************************************************
466
467    Emit an ArithmeticException check.
468
469 *******************************************************************************/
470
471 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
472 {
473         if (INSTRUCTION_MUST_CHECK(iptr)) {
474                 CHECK_INT_REG(reg);
475                 M_TEQ_IMM(reg, 0);
476                 M_TRAPEQ(0, TRAP_ArithmeticException);
477         }
478 }
479
480
481 /* emit_nullpointer_check ******************************************************
482
483    Emit a NullPointerException check.
484
485 *******************************************************************************/
486
487 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
488 {
489         if (INSTRUCTION_MUST_CHECK(iptr)) {
490                 M_TST(reg, reg);
491                 M_TRAPEQ(0, TRAP_NullPointerException);
492         }
493 }
494
495 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
496 {
497         M_TST(reg, reg);
498         M_TRAPEQ(0, TRAP_NullPointerException);
499 }
500
501
502 /* emit_arrayindexoutofbounds_check ********************************************
503
504    Emit a ArrayIndexOutOfBoundsException check.
505
506 *******************************************************************************/
507
508 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
509 {
510         if (INSTRUCTION_MUST_CHECK(iptr)) {
511                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
512                 M_CMP(s2, REG_ITMP3);
513                 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
514         }
515 }
516
517
518 /* emit_arraystore_check *******************************************************
519
520    Emit an ArrayStoreException check.
521
522 *******************************************************************************/
523
524 void emit_arraystore_check(codegendata *cd, instruction *iptr)
525 {
526         if (INSTRUCTION_MUST_CHECK(iptr)) {
527                 M_TST(REG_RESULT, REG_RESULT);
528                 M_TRAPEQ(0, TRAP_ArrayStoreException);
529         }
530 }
531
532
533 /* emit_classcast_check ********************************************************
534
535    Emit a ClassCastException check.
536
537 *******************************************************************************/
538
539 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
540 {
541         if (INSTRUCTION_MUST_CHECK(iptr)) {
542                 switch (condition) {
543                 case BRANCH_EQ:
544                         M_TRAPEQ(s1, TRAP_ClassCastException);
545                         break;
546
547                 case BRANCH_NE:
548                         M_TRAPNE(s1, TRAP_ClassCastException);
549                         break;
550
551                 case BRANCH_LT:
552                         M_TRAPLT(s1, TRAP_ClassCastException);
553                         break;
554
555                 case BRANCH_LE:
556                         M_TRAPLE(s1, TRAP_ClassCastException);
557                         break;
558
559                 case BRANCH_UGT:
560                         M_TRAPHI(s1, TRAP_ClassCastException);
561                         break;
562
563                 default:
564                         vm_abort("emit_classcast_check: unknown condition %d", condition);
565                 }
566         }
567 }
568
569 /* emit_exception_check ********************************************************
570
571    Emit an Exception check.
572
573 *******************************************************************************/
574
575 void emit_exception_check(codegendata *cd, instruction *iptr)
576 {
577         if (INSTRUCTION_MUST_CHECK(iptr)) {
578                 M_TST(REG_RESULT, REG_RESULT);
579                 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
580         }
581 }
582
583
584 /* emit_trap_compiler **********************************************************
585
586    Emit a trap instruction which calls the JIT compiler.
587
588 *******************************************************************************/
589
590 void emit_trap_compiler(codegendata *cd)
591 {
592         M_TRAP(REG_METHODPTR, TRAP_COMPILER);
593 }
594
595
596 /* emit_trap *******************************************************************
597
598    Emit a trap instruction and return the original machine code.
599
600 *******************************************************************************/
601
602 uint32_t emit_trap(codegendata *cd)
603 {
604         uint32_t mcode;
605
606         /* Get machine code which is patched back in later. The
607            trap is 1 instruction word long. */
608
609         mcode = *((uint32_t *) cd->mcodeptr);
610
611         M_TRAP(0, TRAP_PATCHER);
612
613         return mcode;
614 }
615
616
617 /* emit_verbosecall_enter ******************************************************
618
619    Generates the code for the call trace.
620
621 *******************************************************************************/
622
623 #if !defined(NDEBUG)
624 void emit_verbosecall_enter(jitdata *jd)
625 {
626         methodinfo   *m;
627         codegendata  *cd;
628         registerdata *rd;
629         methoddesc   *md;
630         s4            disp;
631         s4            i, s;
632
633         /* get required compiler data */
634
635         m  = jd->m;
636         cd = jd->cd;
637         rd = jd->rd;
638
639         md = m->parseddesc;
640
641         /* mark trace code */
642
643         M_NOP;
644
645         /* Keep stack 8-byte aligned. */
646
647         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
648         M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
649
650         /* save argument registers */
651
652         for (i = 0; i < md->paramcount; i++) {
653                 if (!md->params[i].inmemory) {
654                         s = md->params[i].regoff;
655
656 #if defined(ENABLE_SOFTFLOAT)
657                         switch (md->paramtypes[i].type) {
658                         case TYPE_INT:
659                         case TYPE_FLT:
660                         case TYPE_ADR:
661                                 M_IST(s, REG_SP, i * 8);
662                                 break;
663                         case TYPE_LNG:
664                         case TYPE_DBL:
665                                 M_LST(s, REG_SP, i * 8);
666                                 break;
667                         }
668 #else
669                         switch (md->paramtypes[i].type) {
670                         case TYPE_ADR:
671                         case TYPE_INT:
672                                 M_IST(s, REG_SP, i * 8);
673                                 break;
674                         case TYPE_LNG:
675                                 M_LST(s, REG_SP, i * 8);
676                                 break;
677                         case TYPE_FLT:
678                                 M_FST(s, REG_SP, i * 8);
679                                 break;
680                         case TYPE_DBL:
681                                 M_DST(s, REG_SP, i * 8);
682                                 break;
683                         }
684 #endif
685                 }
686         }
687
688         disp = dseg_add_address(cd, m);
689         M_DSEG_LOAD(REG_A0, disp);
690         M_MOV(REG_A1, REG_SP);
691         M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
692         M_LONGBRANCH(trace_java_call_enter);
693
694         /* restore argument registers */
695
696         for (i = 0; i < md->paramcount; i++) {
697                 if (!md->params[i].inmemory) {
698                         s = md->params[i].regoff;
699
700 #if defined(ENABLE_SOFTFLOAT)
701                         switch (md->paramtypes[i].type) {
702                         case TYPE_INT:
703                         case TYPE_FLT:
704                         case TYPE_ADR:
705                                 M_ILD(s, REG_SP, i * 8);
706                                 break;
707                         case TYPE_LNG:
708                         case TYPE_DBL:
709                                 M_LLD(s, REG_SP, i * 8);
710                                 break;
711                         }
712 #else
713                         switch (md->paramtypes[i].type) {
714                         case TYPE_ADR:
715                         case TYPE_INT:
716                                 M_ILD(s, REG_SP, i * 8);
717                                 break;
718                         case TYPE_LNG:
719                                 M_LLD(s, REG_SP, i * 8);
720                                 break;
721                         case TYPE_FLT:
722                                 M_FLD(s, REG_SP, i * 8);
723                                 break;
724                         case TYPE_DBL:
725                                 M_DLD(s, REG_SP, i * 8);
726                                 break;
727                         }
728 #endif
729                 }
730         }
731
732         /* Keep stack 8-byte aligned. */
733
734         M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
735         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
736
737         /* mark trace code */
738
739         M_NOP;
740 }
741 #endif /* !defined(NDEBUG) */
742
743
744 /* emit_verbosecall_exit *******************************************************
745
746    Generates the code for the call trace.
747
748 *******************************************************************************/
749
750 #if !defined(NDEBUG)
751 void emit_verbosecall_exit(jitdata *jd)
752 {
753         methodinfo   *m;
754         codegendata  *cd;
755         registerdata *rd;
756         methoddesc   *md;
757         s4            disp;
758
759         /* get required compiler data */
760
761         m  = jd->m;
762         cd = jd->cd;
763         rd = jd->rd;
764
765         md = m->parseddesc;
766
767         /* mark trace code */
768
769         M_NOP;
770
771         /* Keep stack 8-byte aligned. */
772
773         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
774         M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
775
776         /* save return value */
777
778         switch (md->returntype.type) {
779         case TYPE_ADR:
780         case TYPE_INT:
781         case TYPE_FLT:
782                 M_IST(REG_RESULT, REG_SP, 0 * 8);
783                 break;
784         case TYPE_LNG:
785         case TYPE_DBL:
786                 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
787                 break;
788         }
789
790         disp = dseg_add_address(cd, m);
791         M_DSEG_LOAD(REG_A0, disp);
792         M_MOV(REG_A1, REG_SP);
793         M_LONGBRANCH(trace_java_call_exit);
794
795         /* restore return value */
796
797         switch (md->returntype.type) {
798         case TYPE_ADR:
799         case TYPE_INT:
800         case TYPE_FLT:
801                 M_ILD(REG_RESULT, REG_SP, 0 * 8);
802                 break;
803         case TYPE_LNG:
804         case TYPE_DBL:
805                 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
806                 break;
807         }
808
809         /* Keep stack 8-byte aligned. */
810
811         M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
812         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
813
814         /* mark trace code */
815
816         M_NOP;
817 }
818 #endif /* !defined(NDEBUG) */
819
820
821 /*
822  * These are local overrides for various environment variables in Emacs.
823  * Please do not remove this and leave it at the end of the file, where
824  * Emacs will automagically detect them.
825  * ---------------------------------------------------------------------
826  * Local variables:
827  * mode: c
828  * indent-tabs-mode: t
829  * c-basic-offset: 4
830  * tab-width: 4
831  * End:
832  * vim:noexpandtab:sw=4:ts=4:
833  */