src/vm/jit/arm/emit.c

   1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29 #include <stdint.h>
  30
  31 #include "vm/types.h"
  32
  33 #include "md-abi.h"
  34
  35 #include "vm/jit/arm/codegen.h"
  36
  37 #include "mm/memory.h"
  38
  39 #include "threads/lock-common.h"
  40
  41 #include "vm/global.h"
  42
  43 #include "vm/jit/abi.h"
  44 #include "vm/jit/asmpart.h"
  45 #include "vm/jit/emit-common.hpp"
  46 #include "vm/jit/jit.hpp"
  47 #include "vm/jit/patcher-common.hpp"
  48 #include "vm/jit/replace.hpp"
  49 #include "vm/jit/trace.hpp"
  50 #include "vm/jit/trap.h"
  51
  52 #include "toolbox/logging.h" /* XXX for debugging only */
  53
  54
  55 /* emit_load *******************************************************************
  56
  57    Emits a possible load of an operand.
  58
  59 *******************************************************************************/
  60
  61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  62 {
  63         codegendata  *cd;
  64         s4            disp;
  65         s4            reg;
  66
  67         /* get required compiler data */
  68
  69         cd = jd->cd;
  70
  71         if (src->flags & INMEMORY) {
  72                 COUNT_SPILLS;
  73
  74                 disp = src->vv.regoff;
  75
  76 #if defined(ENABLE_SOFTFLOAT)
  77                 switch (src->type) {
  78                 case TYPE_INT:
  79                 case TYPE_FLT:
  80                 case TYPE_ADR:
  81                         M_ILD(tempreg, REG_SP, disp);
  82                         break;
  83                 case TYPE_LNG:
  84                 case TYPE_DBL:
  85                         M_LLD(tempreg, REG_SP, disp);
  86                         break;
  87                 default:
  88                         vm_abort("emit_load: unknown type %d", src->type);
  89                 }
  90 #else
  91                 switch (src->type) {
  92                 case TYPE_INT:
  93                 case TYPE_ADR:
  94                         M_ILD(tempreg, REG_SP, disp);
  95                         break;
  96                 case TYPE_LNG:
  97                         M_LLD(tempreg, REG_SP, disp);
  98                         break;
  99                 case TYPE_FLT:
 100                         M_FLD(tempreg, REG_SP, disp);
 101                         break;
 102                 case TYPE_DBL:
 103                         M_DLD(tempreg, REG_SP, disp);
 104                         break;
 105                 default:
 106                         vm_abort("emit_load: unknown type %d", src->type);
 107                 }
 108 #endif
 109
 110                 reg = tempreg;
 111         }
 112         else
 113                 reg = src->vv.regoff;
 114
 115         return reg;
 116 }
 117
 118
 119 /* emit_load_low ***************************************************************
 120
 121    Emits a possible load of the low 32-bits of a long source operand.
 122
 123 *******************************************************************************/
 124
 125 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 126 {
 127         codegendata  *cd;
 128         s4            disp;
 129         s4            reg;
 130
 131         assert(src->type == TYPE_LNG);
 132
 133         /* get required compiler data */
 134
 135         cd = jd->cd;
 136
 137         if (src->flags & INMEMORY) {
 138                 COUNT_SPILLS;
 139
 140                 disp = src->vv.regoff;
 141
 142 #if defined(__ARMEL__)
 143                 M_ILD(tempreg, REG_SP, disp);
 144 #else
 145                 M_ILD(tempreg, REG_SP, disp + 4);
 146 #endif
 147
 148                 reg = tempreg;
 149         }
 150         else
 151                 reg = GET_LOW_REG(src->vv.regoff);
 152
 153         return reg;
 154 }
 155
 156
 157 /* emit_load_high **************************************************************
 158
 159    Emits a possible load of the high 32-bits of a long source operand.
 160
 161 *******************************************************************************/
 162
 163 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 164 {
 165         codegendata  *cd;
 166         s4            disp;
 167         s4            reg;
 168
 169         assert(src->type == TYPE_LNG);
 170
 171         /* get required compiler data */
 172
 173         cd = jd->cd;
 174
 175         if (src->flags & INMEMORY) {
 176                 COUNT_SPILLS;
 177
 178                 disp = src->vv.regoff;
 179
 180 #if defined(__ARMEL__)
 181                 M_ILD(tempreg, REG_SP, disp + 4);
 182 #else
 183                 M_ILD(tempreg, REG_SP, disp);
 184 #endif
 185
 186                 reg = tempreg;
 187         }
 188         else
 189                 reg = GET_HIGH_REG(src->vv.regoff);
 190
 191         return reg;
 192 }
 193
 194
 195 /* emit_store ******************************************************************
 196
 197    Emits a possible store to a variable.
 198
 199 *******************************************************************************/
 200
 201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 202 {
 203         codegendata  *cd;
 204         s4            disp;
 205
 206         /* get required compiler data */
 207
 208         cd = jd->cd;
 209
 210         if (dst->flags & INMEMORY) {
 211                 COUNT_SPILLS;
 212
 213                 disp = dst->vv.regoff;
 214
 215 #if defined(ENABLE_SOFTFLOAT)
 216                 switch (dst->type) {
 217                 case TYPE_INT:
 218                 case TYPE_FLT:
 219                 case TYPE_ADR:
 220                         M_IST(d, REG_SP, disp);
 221                         break;
 222                 case TYPE_LNG:
 223                 case TYPE_DBL:
 224                         M_LST(d, REG_SP, disp);
 225                         break;
 226                 default:
 227                         vm_abort("emit_store: unknown type %d", dst->type);
 228                 }
 229 #else
 230                 switch (dst->type) {
 231                 case TYPE_INT:
 232                 case TYPE_ADR:
 233                         M_IST(d, REG_SP, disp);
 234                         break;
 235                 case TYPE_LNG:
 236                         M_LST(d, REG_SP, disp);
 237                         break;
 238                 case TYPE_FLT:
 239                         M_FST(d, REG_SP, disp);
 240                         break;
 241                 case TYPE_DBL:
 242                         M_DST(d, REG_SP, disp);
 243                         break;
 244                 default:
 245                         vm_abort("emit_store: unknown type %d", dst->type);
 246                 }
 247 #endif
 248         }
 249 }
 250
 251
 252 /* emit_copy *******************************************************************
 253
 254    Generates a register/memory to register/memory copy.
 255
 256 *******************************************************************************/
 257
 258 void emit_copy(jitdata *jd, instruction *iptr)
 259 {
 260         codegendata *cd;
 261         varinfo     *src;
 262         varinfo     *dst;
 263         s4           s1, d;
 264
 265         /* get required compiler data */
 266
 267         cd = jd->cd;
 268
 269         /* get source and destination variables */
 270
 271         src = VAROP(iptr->s1);
 272         dst = VAROP(iptr->dst);
 273
 274         /* XXX dummy call, removed me!!! */
 275         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 276
 277         if ((src->vv.regoff != dst->vv.regoff) ||
 278                 ((src->flags ^ dst->flags) & INMEMORY)) {
 279
 280                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 281                         /* emit nothing, as the value won't be used anyway */
 282                         return;
 283                 }
 284
 285                 /* If one of the variables resides in memory, we can eliminate
 286                    the register move from/to the temporary register with the
 287                    order of getting the destination register and the load. */
 288
 289                 if (IS_INMEMORY(src->flags)) {
 290 #if !defined(ENABLE_SOFTFLOAT)
 291                         if (IS_FLT_DBL_TYPE(src->type))
 292                                 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
 293                         else
 294 #endif
 295                         {
 296                                 if (IS_2_WORD_TYPE(src->type))
 297                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 298                                 else
 299                                         d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
 300                         }
 301
 302                         s1 = emit_load(jd, iptr, src, d);
 303                 }
 304                 else {
 305 #if !defined(ENABLE_SOFTFLOAT)
 306                         if (IS_FLT_DBL_TYPE(src->type))
 307                                 s1 = emit_load(jd, iptr, src, REG_FTMP1);
 308                         else
 309 #endif
 310                         {
 311                                 if (IS_2_WORD_TYPE(src->type))
 312                                         s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 313                                 else
 314                                         s1 = emit_load(jd, iptr, src, REG_ITMP1);
 315                         }
 316
 317                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 318                 }
 319
 320                 if (s1 != d) {
 321 #if defined(ENABLE_SOFTFLOAT)
 322                         switch (src->type) {
 323                         case TYPE_INT:
 324                         case TYPE_FLT:
 325                         case TYPE_ADR:
 326                                 /* XXX grrrr, wrong direction! */
 327                                 M_MOV(d, s1);
 328                                 break;
 329                         case TYPE_LNG:
 330                         case TYPE_DBL:
 331                                 /* XXX grrrr, wrong direction! */
 332                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 333                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 334                                 break;
 335                         default:
 336                                 vm_abort("emit_copy: unknown type %d", src->type);
 337                         }
 338 #else
 339                         switch (src->type) {
 340                         case TYPE_INT:
 341                         case TYPE_ADR:
 342                                 /* XXX grrrr, wrong direction! */
 343                                 M_MOV(d, s1);
 344                                 break;
 345                         case TYPE_LNG:
 346                                 /* XXX grrrr, wrong direction! */
 347                                 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
 348                                 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
 349                                 break;
 350                         case TYPE_FLT:
 351                                 M_FMOV(s1, d);
 352                                 break;
 353                         case TYPE_DBL:
 354                                 M_DMOV(s1, d);
 355                                 break;
 356                         default:
 357                                 vm_abort("emit_copy: unknown type %d", src->type);
 358                         }
 359 #endif
 360                 }
 361
 362                 emit_store(jd, iptr, dst, d);
 363         }
 364 }
 365
 366
 367 /* emit_iconst *****************************************************************
 368
 369    XXX
 370
 371 *******************************************************************************/
 372
 373 void emit_iconst(codegendata *cd, s4 d, s4 value)
 374 {
 375         s4 disp;
 376
 377         if (IS_IMM(value))
 378                 M_MOV_IMM(d, value);
 379         else {
 380                 disp = dseg_add_s4(cd, value);
 381                 M_DSEG_LOAD(d, disp);
 382         }
 383 }
 384
 385
 386 /* emit_branch *****************************************************************
 387
 388    Emits the code for conditional and unconditional branchs.
 389
 390 *******************************************************************************/
 391
 392 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 393 {
 394         s4 checkdisp;
 395         s4 branchdisp;
 396
 397         /* calculate the different displacements */
 398
 399         checkdisp  = (disp - 8);
 400         branchdisp = (disp - 8) >> 2;
 401
 402         /* check which branch to generate */
 403
 404         if (condition == BRANCH_UNCONDITIONAL) {
 405                 /* check displacement for overflow */
 406
 407                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 408                         /* if the long-branches flag isn't set yet, do it */
 409
 410                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 411                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 412                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 413                         }
 414
 415                         vm_abort("emit_branch: emit unconditional long-branch code");
 416                 }
 417                 else {
 418                         M_B(branchdisp);
 419                 }
 420         }
 421         else {
 422                 /* and displacement for overflow */
 423
 424                 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
 425                         /* if the long-branches flag isn't set yet, do it */
 426
 427                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 428                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 429                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 430                         }
 431
 432                         vm_abort("emit_branch: emit conditional long-branch code");
 433                 }
 434                 else {
 435                         switch (condition) {
 436                         case BRANCH_EQ:
 437                                 M_BEQ(branchdisp);
 438                                 break;
 439                         case BRANCH_NE:
 440                                 M_BNE(branchdisp);
 441                                 break;
 442                         case BRANCH_LT:
 443                                 M_BLT(branchdisp);
 444                                 break;
 445                         case BRANCH_GE:
 446                                 M_BGE(branchdisp);
 447                                 break;
 448                         case BRANCH_GT:
 449                                 M_BGT(branchdisp);
 450                                 break;
 451                         case BRANCH_LE:
 452                                 M_BLE(branchdisp);
 453                                 break;
 454                         case BRANCH_UGT:
 455                                 M_BHI(branchdisp);
 456                                 break;
 457                         default:
 458                                 vm_abort("emit_branch: unknown condition %d", condition);
 459                         }
 460                 }
 461         }
 462 }
 463
 464
 465 /* emit_arithmetic_check *******************************************************
 466
 467    Emit an ArithmeticException check.
 468
 469 *******************************************************************************/
 470
 471 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 472 {
 473         if (INSTRUCTION_MUST_CHECK(iptr)) {
 474                 CHECK_INT_REG(reg);
 475                 M_TEQ_IMM(reg, 0);
 476                 M_TRAPEQ(0, TRAP_ArithmeticException);
 477         }
 478 }
 479
 480
 481 /* emit_nullpointer_check ******************************************************
 482
 483    Emit a NullPointerException check.
 484
 485 *******************************************************************************/
 486
 487 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 488 {
 489         if (INSTRUCTION_MUST_CHECK(iptr)) {
 490                 M_TST(reg, reg);
 491                 M_TRAPEQ(0, TRAP_NullPointerException);
 492         }
 493 }
 494
 495 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
 496 {
 497         M_TST(reg, reg);
 498         M_TRAPEQ(0, TRAP_NullPointerException);
 499 }
 500
 501
 502 /* emit_arrayindexoutofbounds_check ********************************************
 503
 504    Emit a ArrayIndexOutOfBoundsException check.
 505
 506 *******************************************************************************/
 507
 508 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 509 {
 510         if (INSTRUCTION_MUST_CHECK(iptr)) {
 511                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
 512                 M_CMP(s2, REG_ITMP3);
 513                 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
 514         }
 515 }
 516
 517
 518 /* emit_arraystore_check *******************************************************
 519
 520    Emit an ArrayStoreException check.
 521
 522 *******************************************************************************/
 523
 524 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 525 {
 526         if (INSTRUCTION_MUST_CHECK(iptr)) {
 527                 M_TST(REG_RESULT, REG_RESULT);
 528                 M_TRAPEQ(0, TRAP_ArrayStoreException);
 529         }
 530 }
 531
 532
 533 /* emit_classcast_check ********************************************************
 534
 535    Emit a ClassCastException check.
 536
 537 *******************************************************************************/
 538
 539 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 540 {
 541         if (INSTRUCTION_MUST_CHECK(iptr)) {
 542                 switch (condition) {
 543                 case BRANCH_EQ:
 544                         M_TRAPEQ(s1, TRAP_ClassCastException);
 545                         break;
 546
 547                 case BRANCH_LE:
 548                         M_TRAPLE(s1, TRAP_ClassCastException);
 549                         break;
 550
 551                 case BRANCH_UGT:
 552                         M_TRAPHI(s1, TRAP_ClassCastException);
 553                         break;
 554
 555                 default:
 556                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 557                 }
 558         }
 559 }
 560
 561 /* emit_exception_check ********************************************************
 562
 563    Emit an Exception check.
 564
 565 *******************************************************************************/
 566
 567 void emit_exception_check(codegendata *cd, instruction *iptr)
 568 {
 569         if (INSTRUCTION_MUST_CHECK(iptr)) {
 570                 M_TST(REG_RESULT, REG_RESULT);
 571                 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
 572         }
 573 }
 574
 575
 576 /* emit_trap *******************************************************************
 577
 578    Emit a trap instruction and return the original machine code.
 579
 580 *******************************************************************************/
 581
 582 uint32_t emit_trap(codegendata *cd)
 583 {
 584         uint32_t mcode;
 585
 586         /* Get machine code which is patched back in later. The
 587            trap is 1 instruction word long. */
 588
 589         mcode = *((uint32_t *) cd->mcodeptr);
 590
 591         M_TRAP(0, TRAP_PATCHER);
 592
 593         return mcode;
 594 }
 595
 596
 597 /* emit_verbosecall_enter ******************************************************
 598
 599    Generates the code for the call trace.
 600
 601 *******************************************************************************/
 602
 603 #if !defined(NDEBUG)
 604 void emit_verbosecall_enter(jitdata *jd)
 605 {
 606         methodinfo   *m;
 607         codegendata  *cd;
 608         registerdata *rd;
 609         methoddesc   *md;
 610         s4            disp;
 611         s4            i, s;
 612
 613         /* get required compiler data */
 614
 615         m  = jd->m;
 616         cd = jd->cd;
 617         rd = jd->rd;
 618
 619         md = m->parseddesc;
 620
 621         /* mark trace code */
 622
 623         M_NOP;
 624
 625         /* Keep stack 8-byte aligned. */
 626
 627         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 628         M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
 629
 630         /* save argument registers */
 631
 632         for (i = 0; i < md->paramcount; i++) {
 633                 if (!md->params[i].inmemory) {
 634                         s = md->params[i].regoff;
 635
 636 #if defined(ENABLE_SOFTFLOAT)
 637                         switch (md->paramtypes[i].type) {
 638                         case TYPE_INT:
 639                         case TYPE_FLT:
 640                         case TYPE_ADR:
 641                                 M_IST(s, REG_SP, i * 8);
 642                                 break;
 643                         case TYPE_LNG:
 644                         case TYPE_DBL:
 645                                 M_LST(s, REG_SP, i * 8);
 646                                 break;
 647                         }
 648 #else
 649                         switch (md->paramtypes[i].type) {
 650                         case TYPE_ADR:
 651                         case TYPE_INT:
 652                                 M_IST(s, REG_SP, i * 8);
 653                                 break;
 654                         case TYPE_LNG:
 655                                 M_LST(s, REG_SP, i * 8);
 656                                 break;
 657                         case TYPE_FLT:
 658                                 M_FST(s, REG_SP, i * 8);
 659                                 break;
 660                         case TYPE_DBL:
 661                                 M_DST(s, REG_SP, i * 8);
 662                                 break;
 663                         }
 664 #endif
 665                 }
 666         }
 667
 668         disp = dseg_add_address(cd, m);
 669         M_DSEG_LOAD(REG_A0, disp);
 670         M_MOV(REG_A1, REG_SP);
 671         M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize);
 672         M_LONGBRANCH(trace_java_call_enter);
 673
 674         /* restore argument registers */
 675
 676         for (i = 0; i < md->paramcount; i++) {
 677                 if (!md->params[i].inmemory) {
 678                         s = md->params[i].regoff;
 679
 680 #if defined(ENABLE_SOFTFLOAT)
 681                         switch (md->paramtypes[i].type) {
 682                         case TYPE_INT:
 683                         case TYPE_FLT:
 684                         case TYPE_ADR:
 685                                 M_ILD(s, REG_SP, i * 8);
 686                                 break;
 687                         case TYPE_LNG:
 688                         case TYPE_DBL:
 689                                 M_LLD(s, REG_SP, i * 8);
 690                                 break;
 691                         }
 692 #else
 693                         switch (md->paramtypes[i].type) {
 694                         case TYPE_ADR:
 695                         case TYPE_INT:
 696                                 M_ILD(s, REG_SP, i * 8);
 697                                 break;
 698                         case TYPE_LNG:
 699                                 M_LLD(s, REG_SP, i * 8);
 700                                 break;
 701                         case TYPE_FLT:
 702                                 M_FLD(s, REG_SP, i * 8);
 703                                 break;
 704                         case TYPE_DBL:
 705                                 M_DLD(s, REG_SP, i * 8);
 706                                 break;
 707                         }
 708 #endif
 709                 }
 710         }
 711
 712         /* Keep stack 8-byte aligned. */
 713
 714         M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
 715         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 716
 717         /* mark trace code */
 718
 719         M_NOP;
 720 }
 721 #endif /* !defined(NDEBUG) */
 722
 723
 724 /* emit_verbosecall_exit *******************************************************
 725
 726    Generates the code for the call trace.
 727
 728 *******************************************************************************/
 729
 730 #if !defined(NDEBUG)
 731 void emit_verbosecall_exit(jitdata *jd)
 732 {
 733         methodinfo   *m;
 734         codegendata  *cd;
 735         registerdata *rd;
 736         methoddesc   *md;
 737         s4            disp;
 738
 739         /* get required compiler data */
 740
 741         m  = jd->m;
 742         cd = jd->cd;
 743         rd = jd->rd;
 744
 745         md = m->parseddesc;
 746
 747         /* mark trace code */
 748
 749         M_NOP;
 750
 751         /* Keep stack 8-byte aligned. */
 752
 753         M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 754         M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
 755
 756         /* save return value */
 757
 758         switch (md->returntype.type) {
 759         case TYPE_ADR:
 760         case TYPE_INT:
 761         case TYPE_FLT:
 762                 M_IST(REG_RESULT, REG_SP, 0 * 8);
 763                 break;
 764         case TYPE_LNG:
 765         case TYPE_DBL:
 766                 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
 767                 break;
 768         }
 769
 770         disp = dseg_add_address(cd, m);
 771         M_DSEG_LOAD(REG_A0, disp);
 772         M_MOV(REG_A1, REG_SP);
 773         M_LONGBRANCH(trace_java_call_exit);
 774
 775         /* restore return value */
 776
 777         switch (md->returntype.type) {
 778         case TYPE_ADR:
 779         case TYPE_INT:
 780         case TYPE_FLT:
 781                 M_ILD(REG_RESULT, REG_SP, 0 * 8);
 782                 break;
 783         case TYPE_LNG:
 784         case TYPE_DBL:
 785                 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
 786                 break;
 787         }
 788
 789         /* Keep stack 8-byte aligned. */
 790
 791         M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
 792         M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
 793
 794         /* mark trace code */
 795
 796         M_NOP;
 797 }
 798 #endif /* !defined(NDEBUG) */
 799
 800
 801 /*
 802  * These are local overrides for various environment variables in Emacs.
 803  * Please do not remove this and leave it at the end of the file, where
 804  * Emacs will automagically detect them.
 805  * ---------------------------------------------------------------------
 806  * Local variables:
 807  * mode: c
 808  * indent-tabs-mode: t
 809  * c-basic-offset: 4
 810  * tab-width: 4
 811  * End:
 812  * vim:noexpandtab:sw=4:ts=4:
 813  */