1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
39 #include "vm/jit/arm/codegen.h"
41 #include "mm/memory.h"
43 #include "threads/lock-common.h"
45 #include "vm/builtin.h"
46 #include "vm/exceptions.h"
47 #include "vm/global.h"
49 #include "vm/jit/abi.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/patcher-common.h"
54 #include "vm/jit/replace.h"
56 #include "toolbox/logging.h" /* XXX for debugging only */
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->vv.regoff;
80 #if defined(ENABLE_SOFTFLOAT)
85 M_ILD(tempreg, REG_SP, disp);
89 M_LLD(tempreg, REG_SP, disp);
92 vm_abort("emit_load: unknown type %d", src->type);
98 M_ILD(tempreg, REG_SP, disp);
101 M_LLD(tempreg, REG_SP, disp);
104 M_FLD(tempreg, REG_SP, disp);
107 M_DLD(tempreg, REG_SP, disp);
110 vm_abort("emit_load: unknown type %d", src->type);
117 reg = src->vv.regoff;
123 /* emit_load_low ***************************************************************
125 Emits a possible load of the low 32-bits of a long source operand.
127 *******************************************************************************/
129 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
135 assert(src->type == TYPE_LNG);
137 /* get required compiler data */
141 if (src->flags & INMEMORY) {
144 disp = src->vv.regoff;
146 #if defined(__ARMEL__)
147 M_ILD(tempreg, REG_SP, disp);
149 M_ILD(tempreg, REG_SP, disp + 4);
155 reg = GET_LOW_REG(src->vv.regoff);
161 /* emit_load_high **************************************************************
163 Emits a possible load of the high 32-bits of a long source operand.
165 *******************************************************************************/
167 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
173 assert(src->type == TYPE_LNG);
175 /* get required compiler data */
179 if (src->flags & INMEMORY) {
182 disp = src->vv.regoff;
184 #if defined(__ARMEL__)
185 M_ILD(tempreg, REG_SP, disp + 4);
187 M_ILD(tempreg, REG_SP, disp);
193 reg = GET_HIGH_REG(src->vv.regoff);
199 /* emit_store ******************************************************************
201 Emits a possible store to a variable.
203 *******************************************************************************/
205 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
210 /* get required compiler data */
214 if (dst->flags & INMEMORY) {
217 disp = dst->vv.regoff;
219 #if defined(ENABLE_SOFTFLOAT)
224 M_IST(d, REG_SP, disp);
228 M_LST(d, REG_SP, disp);
231 vm_abort("emit_store: unknown type %d", dst->type);
237 M_IST(d, REG_SP, disp);
240 M_LST(d, REG_SP, disp);
243 M_FST(d, REG_SP, disp);
246 M_DST(d, REG_SP, disp);
249 vm_abort("emit_store: unknown type %d", dst->type);
256 /* emit_copy *******************************************************************
258 Generates a register/memory to register/memory copy.
260 *******************************************************************************/
262 void emit_copy(jitdata *jd, instruction *iptr)
269 /* get required compiler data */
273 /* get source and destination variables */
275 src = VAROP(iptr->s1);
276 dst = VAROP(iptr->dst);
278 /* XXX dummy call, removed me!!! */
279 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
281 if ((src->vv.regoff != dst->vv.regoff) ||
282 ((src->flags ^ dst->flags) & INMEMORY)) {
284 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
285 /* emit nothing, as the value won't be used anyway */
289 /* If one of the variables resides in memory, we can eliminate
290 the register move from/to the temporary register with the
291 order of getting the destination register and the load. */
293 if (IS_INMEMORY(src->flags)) {
294 #if !defined(ENABLE_SOFTFLOAT)
295 if (IS_FLT_DBL_TYPE(src->type))
296 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
300 if (IS_2_WORD_TYPE(src->type))
301 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
303 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
306 s1 = emit_load(jd, iptr, src, d);
309 #if !defined(ENABLE_SOFTFLOAT)
310 if (IS_FLT_DBL_TYPE(src->type))
311 s1 = emit_load(jd, iptr, src, REG_FTMP1);
315 if (IS_2_WORD_TYPE(src->type))
316 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
318 s1 = emit_load(jd, iptr, src, REG_ITMP1);
321 d = codegen_reg_of_var(iptr->opc, dst, s1);
325 #if defined(ENABLE_SOFTFLOAT)
330 /* XXX grrrr, wrong direction! */
335 /* XXX grrrr, wrong direction! */
336 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
337 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
340 vm_abort("emit_copy: unknown type %d", src->type);
346 /* XXX grrrr, wrong direction! */
350 /* XXX grrrr, wrong direction! */
351 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
352 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
361 vm_abort("emit_copy: unknown type %d", src->type);
366 emit_store(jd, iptr, dst, d);
371 /* emit_iconst *****************************************************************
375 *******************************************************************************/
377 void emit_iconst(codegendata *cd, s4 d, s4 value)
384 disp = dseg_add_s4(cd, value);
385 M_DSEG_LOAD(d, disp);
390 /* emit_branch *****************************************************************
392 Emits the code for conditional and unconditional branchs.
394 *******************************************************************************/
396 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
401 /* calculate the different displacements */
403 checkdisp = (disp - 8);
404 branchdisp = (disp - 8) >> 2;
406 /* check which branch to generate */
408 if (condition == BRANCH_UNCONDITIONAL) {
409 /* check displacement for overflow */
411 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
412 /* if the long-branches flag isn't set yet, do it */
414 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
415 cd->flags |= (CODEGENDATA_FLAG_ERROR |
416 CODEGENDATA_FLAG_LONGBRANCHES);
419 vm_abort("emit_branch: emit unconditional long-branch code");
426 /* and displacement for overflow */
428 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
429 /* if the long-branches flag isn't set yet, do it */
431 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
432 cd->flags |= (CODEGENDATA_FLAG_ERROR |
433 CODEGENDATA_FLAG_LONGBRANCHES);
436 vm_abort("emit_branch: emit conditional long-branch code");
462 vm_abort("emit_branch: unknown condition %d", condition);
469 /* emit_arithmetic_check *******************************************************
471 Emit an ArithmeticException check.
473 *******************************************************************************/
475 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
477 if (INSTRUCTION_MUST_CHECK(iptr)) {
480 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
485 /* emit_nullpointer_check ******************************************************
487 Emit a NullPointerException check.
489 *******************************************************************************/
491 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
493 if (INSTRUCTION_MUST_CHECK(iptr)) {
495 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
499 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
502 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
506 /* emit_arrayindexoutofbounds_check ********************************************
508 Emit a ArrayIndexOutOfBoundsException check.
510 *******************************************************************************/
512 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
514 if (INSTRUCTION_MUST_CHECK(iptr)) {
515 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
516 M_CMP(s2, REG_ITMP3);
517 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
522 /* emit_classcast_check ********************************************************
524 Emit a ClassCastException check.
526 *******************************************************************************/
528 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
530 if (INSTRUCTION_MUST_CHECK(iptr)) {
533 M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
537 M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
541 M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
545 vm_abort("emit_classcast_check: unknown condition %d", condition);
550 /* emit_exception_check ********************************************************
552 Emit an Exception check.
554 *******************************************************************************/
556 void emit_exception_check(codegendata *cd, instruction *iptr)
558 if (INSTRUCTION_MUST_CHECK(iptr)) {
559 M_TST(REG_RESULT, REG_RESULT);
560 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
565 /* emit_trap *******************************************************************
567 Emit a trap instruction and return the original machine code.
569 *******************************************************************************/
571 uint32_t emit_trap(codegendata *cd)
575 /* Get machine code which is patched back in later. The
576 trap is 1 instruction word long. */
578 mcode = *((u4 *) cd->mcodeptr);
580 M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
586 /* emit_verbosecall_enter ******************************************************
588 Generates the code for the call trace.
590 *******************************************************************************/
593 void emit_verbosecall_enter(jitdata *jd)
603 /* get required compiler data */
611 /* stackframesize is changed below */
613 stackframesize = cd->stackframesize;
615 /* mark trace code */
619 /* Save argument registers to stack (including LR and PV). Keep
620 stack 8-byte aligned. */
622 M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
623 M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
625 stackframesize += (6 + 2 + 2 + 1 + 1) * 4;
627 /* prepare args for tracer */
629 i = md->paramcount - 1;
634 for (; i >= 0; i--) {
635 t = md->paramtypes[i].type;
637 /* load argument into register (s1) and make it of TYPE_LNG */
639 if (!md->params[i].inmemory) {
640 s1 = md->params[i].regoff;
642 if (!IS_2_WORD_TYPE(t)) {
643 M_MOV_IMM(REG_ITMP1, 0);
644 s1 = PACK_REGS(s1, REG_ITMP1);
648 s1 = REG_ITMP12_PACKED;
649 s2 = md->params[i].regoff + stackframesize;
651 if (IS_2_WORD_TYPE(t))
652 M_LLD(s1, REG_SP, s2);
654 M_ILD(GET_LOW_REG(s1), REG_SP, s2);
655 M_MOV_IMM(GET_HIGH_REG(s1), 0);
659 /* place argument for tracer */
662 #if defined(__ARMEL__)
663 s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
664 abi_registers_integer_argument[i * 2 + 1]);
665 #else /* defined(__ARMEB__) */
666 s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
667 abi_registers_integer_argument[i * 2]);
673 M_LST(s1, REG_SP, s2 * 4);
677 /* prepare methodinfo pointer for tracer */
679 disp = dseg_add_address(cd, m);
680 M_DSEG_LOAD(REG_ITMP1, disp);
681 M_STR_INTERN(REG_ITMP1, REG_SP, 16);
683 /* call tracer here (we use a long branch) */
685 M_LONGBRANCH(builtin_verbosecall_enter);
687 /* Restore argument registers from stack. Keep stack 8-byte
690 M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* free argument stack */
691 M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
693 /* mark trace code */
697 #endif /* !defined(NDEBUG) */
700 /* emit_verbosecall_exit *******************************************************
702 Generates the code for the call trace.
704 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
706 *******************************************************************************/
709 void emit_verbosecall_exit(jitdata *jd)
717 /* get required compiler data */
725 /* mark trace code */
729 /* Keep stack 8-byte aligned. */
731 M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
732 M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for f and m */
734 switch (md->returntype.type) {
737 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
738 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
742 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
746 M_IST(REG_RESULT, REG_SP, 0 * 4);
750 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
754 disp = dseg_add_address(cd, m);
755 M_DSEG_LOAD(REG_ITMP1, disp);
756 M_AST(REG_ITMP1, REG_SP, 1 * 4);
757 M_LONGBRANCH(builtin_verbosecall_exit);
759 /* Keep stack 8-byte aligned. */
761 M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
762 M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
764 /* mark trace code */
768 #endif /* !defined(NDEBUG) */
772 * These are local overrides for various environment variables in Emacs.
773 * Please do not remove this and leave it at the end of the file, where
774 * Emacs will automagically detect them.
775 * ---------------------------------------------------------------------
778 * indent-tabs-mode: t
782 * vim:noexpandtab:sw=4:ts=4: