1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
38 #include "vm/jit/arm/codegen.h"
40 #if defined(ENABLE_THREADS)
41 # include "threads/native/lock.h"
44 #include "vm/builtin.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/emit-common.h"
47 #include "vm/jit/jit.h"
48 #include "vm/jit/replace.h"
50 #include "toolbox/logging.h" /* XXX for debugging only */
53 /* emit_load *******************************************************************
55 Emits a possible load of an operand.
57 *******************************************************************************/
59 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
65 /* get required compiler data */
69 if (src->flags & INMEMORY) {
72 disp = src->vv.regoff * 4;
74 if (IS_FLT_DBL_TYPE(src->type)) {
75 #if defined(ENABLE_SOFTFLOAT)
76 if (IS_2_WORD_TYPE(src->type))
77 M_LLD(tempreg, REG_SP, disp);
79 M_ILD(tempreg, REG_SP, disp);
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
88 if (IS_2_WORD_TYPE(src->type))
89 M_LLD(tempreg, REG_SP, disp);
91 M_ILD(tempreg, REG_SP, disp);
103 /* emit_load_low ***************************************************************
105 Emits a possible load of the low 32-bits of a long source operand.
107 *******************************************************************************/
109 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
115 assert(src->type == TYPE_LNG);
117 /* get required compiler data */
121 if (src->flags & INMEMORY) {
124 disp = src->vv.regoff * 4;
126 #if defined(__ARMEL__)
127 M_ILD(tempreg, REG_SP, disp);
129 M_ILD(tempreg, REG_SP, disp + 4);
135 reg = GET_LOW_REG(src->vv.regoff);
141 /* emit_load_high **************************************************************
143 Emits a possible load of the high 32-bits of a long source operand.
145 *******************************************************************************/
147 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
153 assert(src->type == TYPE_LNG);
155 /* get required compiler data */
159 if (src->flags & INMEMORY) {
162 disp = src->vv.regoff * 4;
164 #if defined(__ARMEL__)
165 M_ILD(tempreg, REG_SP, disp + 4);
167 M_ILD(tempreg, REG_SP, disp);
173 reg = GET_HIGH_REG(src->vv.regoff);
179 /* emit_store ******************************************************************
181 Emits a possible store to a variable.
183 *******************************************************************************/
185 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
190 /* get required compiler data */
194 if (dst->flags & INMEMORY) {
197 disp = dst->vv.regoff * 4;
199 if (IS_FLT_DBL_TYPE(dst->type)) {
200 #if defined(ENABLE_SOFTFLOAT)
201 if (IS_2_WORD_TYPE(dst->type))
202 M_LST(d, REG_SP, disp);
204 M_IST(d, REG_SP, disp);
206 if (IS_2_WORD_TYPE(dst->type))
207 M_DST(d, REG_SP, disp);
209 M_FST(d, REG_SP, disp);
213 if (IS_2_WORD_TYPE(dst->type))
214 M_LST(d, REG_SP, disp);
216 M_IST(d, REG_SP, disp);
219 else if (IS_LNG_TYPE(dst->type)) {
220 #if defined(__ARMEL__)
221 if (GET_HIGH_REG(dst->vv.regoff) == REG_SPLIT)
222 M_IST_INTERN(GET_HIGH_REG(d), REG_SP, 0 * 4);
224 if (GET_LOW_REG(dst->vv.regoff) == REG_SPLIT)
225 M_IST_INTERN(GET_LOW_REG(d), REG_SP, 0 * 4);
231 /* emit_copy *******************************************************************
235 *******************************************************************************/
237 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
243 /* get required compiler data */
248 /* XXX dummy call, removed me!!! */
249 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
251 if ((src->vv.regoff != dst->vv.regoff) ||
252 ((src->flags ^ dst->flags) & INMEMORY)) {
254 /* If one of the variables resides in memory, we can eliminate
255 the register move from/to the temporary register with the
256 order of getting the destination register and the load. */
258 if (IS_INMEMORY(src->flags)) {
259 #if !defined(ENABLE_SOFTFLOAT)
260 if (IS_FLT_DBL_TYPE(src->type))
261 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
265 if (IS_2_WORD_TYPE(src->type))
266 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
268 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
271 s1 = emit_load(jd, iptr, src, d);
274 #if !defined(ENABLE_SOFTFLOAT)
275 if (IS_FLT_DBL_TYPE(src->type))
276 s1 = emit_load(jd, iptr, src, REG_FTMP1);
280 if (IS_2_WORD_TYPE(src->type))
281 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
283 s1 = emit_load(jd, iptr, src, REG_ITMP1);
286 d = codegen_reg_of_var(iptr->opc, dst, s1);
290 if (IS_FLT_DBL_TYPE(src->type)) {
291 #if defined(ENABLE_SOFTFLOAT)
292 if (IS_2_WORD_TYPE(src->type))
295 /* XXX grrrr, wrong direction! */
298 if (IS_2_WORD_TYPE(src->type))
305 if (IS_2_WORD_TYPE(src->type))
308 /* XXX grrrr, wrong direction! */
313 emit_store(jd, iptr, dst, d);
318 /* emit_iconst *****************************************************************
322 *******************************************************************************/
324 void emit_iconst(codegendata *cd, s4 d, s4 value)
331 disp = dseg_add_s4(cd, value);
332 M_DSEG_LOAD(d, disp);
337 /* emit_nullpointer_check ******************************************************
339 Emit a NullPointerException check.
341 *******************************************************************************/
343 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
345 if (INSTRUCTION_MUST_CHECK(iptr)) {
348 codegen_add_nullpointerexception_ref(cd);
353 /* emit_arrayindexoutofbounds_check ********************************************
355 Emit a ArrayIndexOutOfBoundsException check.
357 *******************************************************************************/
359 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
361 if (INSTRUCTION_MUST_CHECK(iptr)) {
362 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
363 M_CMP(s2, REG_ITMP3);
365 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
370 /* emit_exception_stubs ********************************************************
372 Generates the code for the exception stubs.
374 *******************************************************************************/
376 void emit_exception_stubs(jitdata *jd)
386 /* get required compiler data */
391 /* generate exception stubs */
395 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
396 /* back-patch the branch to this exception code */
398 branchmpc = er->branchpos;
399 targetmpc = cd->mcodeptr - cd->mcodebase;
401 md_codegen_patch_branch(cd, branchmpc, targetmpc);
405 /* Check if the exception is an
406 ArrayIndexOutOfBoundsException. If so, move index register
410 M_MOV(REG_ITMP1, er->reg);
412 /* calcuate exception address */
414 assert((er->branchpos - 4) % 4 == 0);
415 M_ADD_IMM_EXT_MUL4(REG_ITMP2_XPC, REG_IP, (er->branchpos - 4) / 4);
417 /* move function to call into REG_ITMP3 */
419 disp = dseg_add_functionptr(cd, er->function);
420 M_DSEG_LOAD(REG_ITMP3, disp);
422 if (targetdisp == 0) {
423 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
425 M_MOV(rd->argintregs[0], REG_IP);
426 M_MOV(rd->argintregs[1], REG_SP);
428 if (jd->isleafmethod)
429 M_MOV(rd->argintregs[2], REG_LR);
431 M_LDR(rd->argintregs[2], REG_SP,
432 cd->stackframesize * 4 - SIZEOF_VOID_P);
434 M_MOV(rd->argintregs[3], REG_ITMP2_XPC);
437 /* TODO: we only need to save LR in leaf methods */
439 M_STMFD(BITMASK_ARGS | 1<<REG_IP | 1<<REG_LR, REG_SP);
441 /* move a3 to stack */
443 M_STR_UPDATE(REG_ITMP1, REG_SP, -4);
445 /* do the exception call */
447 M_MOV(REG_LR, REG_PC);
448 M_MOV(REG_PC, REG_ITMP3);
450 M_ADD_IMM(REG_SP, REG_SP, 4);
452 /* result of stacktrace is our XPTR */
454 M_MOV(REG_ITMP1_XPTR, REG_RESULT);
456 /* restore registers */
458 M_LDMFD(BITMASK_ARGS | 1<<REG_IP | 1<<REG_LR, REG_SP);
460 disp = dseg_add_functionptr(cd, asm_handle_exception);
461 M_DSEG_LOAD(REG_ITMP3, disp);
462 M_MOV(REG_PC, REG_ITMP3);
465 disp = (((u4 *) cd->mcodebase) + targetdisp) -
466 (((u4 *) cd->mcodeptr) + 2);
474 /* emit_patcher_stubs **********************************************************
476 Generates the code for the patcher stubs.
478 *******************************************************************************/
480 void emit_patcher_stubs(jitdata *jd)
490 /* get required compiler data */
494 /* generate patcher stub call code */
498 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
499 /* check code segment size */
503 /* Get machine code which is patched back in later. The
504 call is 1 instruction word long. */
506 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
508 mcode = *((u4 *) tmpmcodeptr);
510 /* Patch in the call to call the following code (done at
513 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
514 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
516 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
519 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
521 /* create stack frame */
523 M_SUB_IMM(REG_SP, REG_SP, 7 * 4);
525 /* save itmp3 onto stack */
527 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
529 /* calculate return address and move it onto stack */
530 /* ATTENTION: we can not use BL to branch to patcher stub, */
531 /* ATTENTION: because we need to preserve LR for leaf methods */
533 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
535 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
536 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
538 /* move pointer to java_objectheader onto stack */
540 #if defined(ENABLE_THREADS)
541 /* order reversed because of data segment layout */
543 (void) dseg_add_unique_address(cd, NULL); /* flcword */
544 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
545 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
547 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_IP, -disp / 4);
548 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
550 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
551 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
554 /* move machine code onto stack */
556 disp = dseg_add_unique_s4(cd, mcode);
557 M_DSEG_LOAD(REG_ITMP3, disp);
558 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
560 /* move class/method/field reference onto stack */
562 disp = dseg_add_unique_address(cd, pref->ref);
563 M_DSEG_LOAD(REG_ITMP3, disp);
564 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
566 /* move data segment displacement onto stack */
568 disp = dseg_add_unique_s4(cd, pref->disp);
569 M_DSEG_LOAD(REG_ITMP3, disp);
570 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
572 /* move patcher function pointer onto stack */
574 disp = dseg_add_functionptr(cd, pref->patcher);
575 M_DSEG_LOAD(REG_ITMP3, disp);
576 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
578 /* finally call the patcher via asm_patcher_wrapper */
579 /* ATTENTION: don't use REG_IP here, because some patchers need it */
581 if (targetdisp == 0) {
582 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
584 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
585 /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_IP, a);*/
586 /* TODO: this is only a hack */
587 M_DSEG_LOAD(REG_ITMP3, disp);
588 M_MOV(REG_PC, REG_ITMP3);
591 disp = (((u4 *) cd->mcodebase) + targetdisp) -
592 (((u4 *) cd->mcodeptr) + 2);
600 /* emit_replacement_stubs ******************************************************
602 Generates the code for the replacement stubs.
604 *******************************************************************************/
606 #if defined(ENABLE_REPLACEMENT)
607 void emit_replacement_stubs(jitdata *jd)
616 /* get required compiler data */
621 #endif /* defined(ENABLE_REPLACEMENT) */
624 /* emit_verbosecall_enter ******************************************************
626 Generates the code for the call trace.
628 *******************************************************************************/
631 void emit_verbosecall_enter(jitdata *jd)
641 /* get required compiler data */
649 /* stackframesize is changed below */
651 stackframesize = cd->stackframesize;
653 /* mark trace code */
657 /* save argument registers to stack (including LR and IP) */
658 M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_IP), REG_SP);
659 M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* space for a3, a4 and m */
661 stackframesize += 6 + 2 + 2 + 1;
663 /* prepare args for tracer */
665 i = md->paramcount - 1;
670 for (; i >= 0; i--) {
671 t = md->paramtypes[i].type;
673 /* load argument into register (s1) and make it of TYPE_LNG */
675 if (!md->params[i].inmemory) {
676 s1 = md->params[i].regoff;
678 if (!IS_2_WORD_TYPE(t)) {
679 M_MOV_IMM(REG_ITMP1, 0);
680 s1 = PACK_REGS(s1, REG_ITMP1);
683 SPLIT_OPEN(t, s1, REG_ITMP1);
684 SPLIT_LOAD(t, s1, stackframesize);
688 s1 = md->params[i].regoff + stackframesize;
690 if (IS_2_WORD_TYPE(t))
691 M_LLD(REG_ITMP12_PACKED, REG_SP, s1 * 4);
693 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
696 /* place argument for tracer */
699 #if defined(__ARMEL__)
700 s2 = PACK_REGS(rd->argintregs[i * 2], rd->argintregs[i * 2 + 1]);
701 #else /* defined(__ARMEB__) */
702 s2 = PACK_REGS(rd->argintregs[i * 2 + 1], rd->argintregs[i * 2]);
708 M_LST(s1, REG_SP, s2 * 4);
712 /* prepare methodinfo pointer for tracer */
714 disp = dseg_add_address(cd, m);
715 M_DSEG_LOAD(REG_ITMP1, disp);
716 M_STR_INTERN(REG_ITMP1, REG_SP, 16);
718 /* call tracer here (we use a long branch) */
720 M_LONGBRANCH(builtin_trace_args);
722 /* restore argument registers from stack */
724 M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* free argument stack */
725 M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_IP), REG_SP);
727 /* mark trace code */
731 #endif /* !defined(NDEBUG) */
734 /* emit_verbosecall_exit *******************************************************
736 Generates the code for the call trace.
738 *******************************************************************************/
741 void emit_verbosecall_exit(jitdata *jd)
750 /* get required compiler data */
758 /* mark trace code */
762 M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_IP), REG_SP);
763 M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for d[high reg] and f */
765 #if defined(__ARMEL__)
766 s1 = PACK_REGS(rd->argintregs[1], rd->argintregs[2]);
767 #else /* defined(__ARMEB__) */
768 s1 = PACK_REGS(rd->argintregs[2], rd->argintregs[1]);
771 switch (md->returntype.type) {
774 M_INTMOVE(REG_RESULT, GET_LOW_REG(s1));
775 M_MOV_IMM(GET_HIGH_REG(s1), 0);
779 M_LNGMOVE(REG_RESULT_PACKED, s1);
783 M_IST(REG_RESULT, REG_SP, 1 * 4);
787 s1 = rd->argintregs[3];
788 M_INTMOVE(REG_RESULT, s1);
789 M_IST(REG_RESULT2, REG_SP, 0 * 4);
793 disp = dseg_add_address(cd, m);
794 M_DSEG_LOAD(rd->argintregs[0], disp);
795 M_LONGBRANCH(builtin_displaymethodstop);
797 M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
798 M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_IP), REG_SP);
800 /* mark trace code */
804 #endif /* !defined(NDEBUG) */
808 * These are local overrides for various environment variables in Emacs.
809 * Please do not remove this and leave it at the end of the file, where
810 * Emacs will automagically detect them.
811 * ---------------------------------------------------------------------
814 * indent-tabs-mode: t
818 * vim:noexpandtab:sw=4:ts=4: