1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
38 #include "vm/jit/arm/codegen.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
47 #include "vm/exceptions.h"
48 #include "vm/global.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/replace.h"
55 #include "toolbox/logging.h" /* XXX for debugging only */
58 /* emit_load *******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (src->flags & INMEMORY) {
77 disp = src->vv.regoff * 4;
79 if (IS_FLT_DBL_TYPE(src->type)) {
80 #if defined(ENABLE_SOFTFLOAT)
81 if (IS_2_WORD_TYPE(src->type))
82 M_LLD(tempreg, REG_SP, disp);
84 M_ILD(tempreg, REG_SP, disp);
86 if (IS_2_WORD_TYPE(src->type))
87 M_DLD(tempreg, REG_SP, disp);
89 M_FLD(tempreg, REG_SP, disp);
93 if (IS_2_WORD_TYPE(src->type))
94 M_LLD(tempreg, REG_SP, disp);
96 M_ILD(tempreg, REG_SP, disp);
102 reg = src->vv.regoff;
108 /* emit_load_low ***************************************************************
110 Emits a possible load of the low 32-bits of a long source operand.
112 *******************************************************************************/
114 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
120 assert(src->type == TYPE_LNG);
122 /* get required compiler data */
126 if (src->flags & INMEMORY) {
129 disp = src->vv.regoff * 4;
131 #if defined(__ARMEL__)
132 M_ILD(tempreg, REG_SP, disp);
134 M_ILD(tempreg, REG_SP, disp + 4);
140 reg = GET_LOW_REG(src->vv.regoff);
146 /* emit_load_high **************************************************************
148 Emits a possible load of the high 32-bits of a long source operand.
150 *******************************************************************************/
152 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
158 assert(src->type == TYPE_LNG);
160 /* get required compiler data */
164 if (src->flags & INMEMORY) {
167 disp = src->vv.regoff * 4;
169 #if defined(__ARMEL__)
170 M_ILD(tempreg, REG_SP, disp + 4);
172 M_ILD(tempreg, REG_SP, disp);
178 reg = GET_HIGH_REG(src->vv.regoff);
184 /* emit_store ******************************************************************
186 Emits a possible store to a variable.
188 *******************************************************************************/
190 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
195 /* get required compiler data */
199 if (dst->flags & INMEMORY) {
202 disp = dst->vv.regoff * 4;
204 if (IS_FLT_DBL_TYPE(dst->type)) {
205 #if defined(ENABLE_SOFTFLOAT)
206 if (IS_2_WORD_TYPE(dst->type))
207 M_LST(d, REG_SP, disp);
209 M_IST(d, REG_SP, disp);
211 if (IS_2_WORD_TYPE(dst->type))
212 M_DST(d, REG_SP, disp);
214 M_FST(d, REG_SP, disp);
218 if (IS_2_WORD_TYPE(dst->type))
219 M_LST(d, REG_SP, disp);
221 M_IST(d, REG_SP, disp);
224 else if (IS_LNG_TYPE(dst->type)) {
225 #if defined(__ARMEL__)
226 if (GET_HIGH_REG(dst->vv.regoff) == REG_SPLIT)
227 M_IST_INTERN(GET_HIGH_REG(d), REG_SP, 0 * 4);
229 if (GET_LOW_REG(dst->vv.regoff) == REG_SPLIT)
230 M_IST_INTERN(GET_LOW_REG(d), REG_SP, 0 * 4);
236 /* emit_copy *******************************************************************
240 *******************************************************************************/
242 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
248 /* get required compiler data */
253 /* XXX dummy call, removed me!!! */
254 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
256 if ((src->vv.regoff != dst->vv.regoff) ||
257 ((src->flags ^ dst->flags) & INMEMORY)) {
259 /* If one of the variables resides in memory, we can eliminate
260 the register move from/to the temporary register with the
261 order of getting the destination register and the load. */
263 if (IS_INMEMORY(src->flags)) {
264 #if !defined(ENABLE_SOFTFLOAT)
265 if (IS_FLT_DBL_TYPE(src->type))
266 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
270 if (IS_2_WORD_TYPE(src->type))
271 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
273 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
276 s1 = emit_load(jd, iptr, src, d);
279 #if !defined(ENABLE_SOFTFLOAT)
280 if (IS_FLT_DBL_TYPE(src->type))
281 s1 = emit_load(jd, iptr, src, REG_FTMP1);
285 if (IS_2_WORD_TYPE(src->type))
286 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
288 s1 = emit_load(jd, iptr, src, REG_ITMP1);
291 d = codegen_reg_of_var(iptr->opc, dst, s1);
295 if (IS_FLT_DBL_TYPE(src->type)) {
296 #if defined(ENABLE_SOFTFLOAT)
297 if (IS_2_WORD_TYPE(src->type))
300 /* XXX grrrr, wrong direction! */
303 if (IS_2_WORD_TYPE(src->type))
310 if (IS_2_WORD_TYPE(src->type))
313 /* XXX grrrr, wrong direction! */
318 emit_store(jd, iptr, dst, d);
323 /* emit_iconst *****************************************************************
327 *******************************************************************************/
329 void emit_iconst(codegendata *cd, s4 d, s4 value)
336 disp = dseg_add_s4(cd, value);
337 M_DSEG_LOAD(d, disp);
342 /* emit_branch *****************************************************************
344 Emits the code for conditional and unconditional branchs.
346 *******************************************************************************/
348 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
353 /* calculate the different displacements */
355 checkdisp = (disp - 8);
356 branchdisp = (disp - 8) >> 2;
358 /* check which branch to generate */
360 if (condition == BRANCH_UNCONDITIONAL) {
361 /* check displacement for overflow */
363 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
364 /* if the long-branches flag isn't set yet, do it */
366 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
367 cd->flags |= (CODEGENDATA_FLAG_ERROR |
368 CODEGENDATA_FLAG_LONGBRANCHES);
371 vm_abort("emit_branch: emit unconditional long-branch code");
378 /* and displacement for overflow */
380 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
381 /* if the long-branches flag isn't set yet, do it */
383 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
384 cd->flags |= (CODEGENDATA_FLAG_ERROR |
385 CODEGENDATA_FLAG_LONGBRANCHES);
388 vm_abort("emit_branch: emit conditional long-branch code");
414 vm_abort("emit_branch: unknown condition %d", condition);
421 /* emit_arithmetic_check *******************************************************
423 Emit an ArithmeticException check.
425 *******************************************************************************/
427 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
429 if (INSTRUCTION_MUST_CHECK(iptr)) {
432 M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
437 /* emit_nullpointer_check ******************************************************
439 Emit a NullPointerException check.
441 *******************************************************************************/
443 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
445 if (INSTRUCTION_MUST_CHECK(iptr)) {
447 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
451 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
454 M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
458 /* emit_arrayindexoutofbounds_check ********************************************
460 Emit a ArrayIndexOutOfBoundsException check.
462 *******************************************************************************/
464 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
466 if (INSTRUCTION_MUST_CHECK(iptr)) {
467 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
468 M_CMP(s2, REG_ITMP3);
469 M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
474 /* emit_classcast_check ********************************************************
476 Emit a ClassCastException check.
478 *******************************************************************************/
480 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
482 if (INSTRUCTION_MUST_CHECK(iptr)) {
485 M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
489 M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
493 M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
497 vm_abort("emit_classcast_check: unknown condition %d", condition);
502 /* emit_exception_check ********************************************************
504 Emit an Exception check.
506 *******************************************************************************/
508 void emit_exception_check(codegendata *cd, instruction *iptr)
510 if (INSTRUCTION_MUST_CHECK(iptr)) {
511 M_TST(REG_RESULT, REG_RESULT);
512 M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
517 /* emit_patcher_stubs **********************************************************
519 Generates the code for the patcher stubs.
521 *******************************************************************************/
523 void emit_patcher_stubs(jitdata *jd)
533 /* get required compiler data */
537 /* generate patcher stub call code */
541 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
542 /* check code segment size */
546 /* Get machine code which is patched back in later. The
547 call is 1 instruction word long. */
549 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
551 mcode = *((u4 *) tmpmcodeptr);
553 /* Patch in the call to call the following code (done at
556 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
557 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
559 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
562 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
564 /* create stack frame (align stack to 8-byte) */
566 M_SUB_IMM(REG_SP, REG_SP, 8 * 4);
568 /* save itmp3 onto stack */
570 M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
572 /* calculate return address and move it onto stack */
573 /* ATTENTION: we can not use BL to branch to patcher stub, */
574 /* ATTENTION: because we need to preserve LR for leaf methods */
576 disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
578 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
579 M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
581 /* move pointer to java_objectheader onto stack */
583 #if defined(ENABLE_THREADS)
584 /* order reversed because of data segment layout */
586 (void) dseg_add_unique_address(cd, NULL); /* flcword */
587 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
588 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
590 M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PV, -disp / 4);
591 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
593 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
594 M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
597 /* move machine code onto stack */
599 disp = dseg_add_unique_s4(cd, mcode);
600 M_DSEG_LOAD(REG_ITMP3, disp);
601 M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
603 /* move class/method/field reference onto stack */
605 disp = dseg_add_unique_address(cd, pref->ref);
606 M_DSEG_LOAD(REG_ITMP3, disp);
607 M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
609 /* move data segment displacement onto stack */
611 disp = dseg_add_unique_s4(cd, pref->disp);
612 M_DSEG_LOAD(REG_ITMP3, disp);
613 M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
615 /* move patcher function pointer onto stack */
617 disp = dseg_add_functionptr(cd, pref->patcher);
618 M_DSEG_LOAD(REG_ITMP3, disp);
619 M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
621 /* finally call the patcher via asm_patcher_wrapper */
622 /* ATTENTION: don't use REG_PV here, because some patchers need it */
624 if (targetdisp == 0) {
625 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
627 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
628 /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_PV, a);*/
629 /* TODO: this is only a hack */
630 M_DSEG_LOAD(REG_ITMP3, disp);
631 M_MOV(REG_PC, REG_ITMP3);
634 disp = (((u4 *) cd->mcodebase) + targetdisp) -
635 (((u4 *) cd->mcodeptr) + 2);
643 /* emit_replacement_stubs ******************************************************
645 Generates the code for the replacement stubs.
647 *******************************************************************************/
649 #if defined(ENABLE_REPLACEMENT)
650 void emit_replacement_stubs(jitdata *jd)
659 /* get required compiler data */
664 #endif /* defined(ENABLE_REPLACEMENT) */
667 /* emit_verbosecall_enter ******************************************************
669 Generates the code for the call trace.
671 *******************************************************************************/
674 void emit_verbosecall_enter(jitdata *jd)
684 /* get required compiler data */
692 /* stackframesize is changed below */
694 stackframesize = cd->stackframesize;
696 /* mark trace code */
700 /* Save argument registers to stack (including LR and PV). Keep
701 stack 8-byte aligned. */
703 M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
704 M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
706 stackframesize += 6 + 2 + 2 + 1 + 1;
708 /* prepare args for tracer */
710 i = md->paramcount - 1;
715 for (; i >= 0; i--) {
716 t = md->paramtypes[i].type;
718 /* load argument into register (s1) and make it of TYPE_LNG */
720 if (!md->params[i].inmemory) {
721 s1 = md->params[i].regoff;
723 if (!IS_2_WORD_TYPE(t)) {
724 M_MOV_IMM(REG_ITMP1, 0);
725 s1 = PACK_REGS(s1, REG_ITMP1);
728 SPLIT_OPEN(t, s1, REG_ITMP1);
729 SPLIT_LOAD(t, s1, stackframesize);
733 s1 = REG_ITMP12_PACKED;
734 s2 = md->params[i].regoff + stackframesize;
736 if (IS_2_WORD_TYPE(t))
737 M_LLD(s1, REG_SP, s2 * 4);
739 M_ILD(GET_LOW_REG(s1), REG_SP, s2 * 4);
740 M_MOV_IMM(GET_HIGH_REG(s1), 0);
744 /* place argument for tracer */
747 #if defined(__ARMEL__)
748 s2 = PACK_REGS(rd->argintregs[i * 2], rd->argintregs[i * 2 + 1]);
749 #else /* defined(__ARMEB__) */
750 s2 = PACK_REGS(rd->argintregs[i * 2 + 1], rd->argintregs[i * 2]);
756 M_LST(s1, REG_SP, s2 * 4);
760 /* prepare methodinfo pointer for tracer */
762 disp = dseg_add_address(cd, m);
763 M_DSEG_LOAD(REG_ITMP1, disp);
764 M_STR_INTERN(REG_ITMP1, REG_SP, 16);
766 /* call tracer here (we use a long branch) */
768 M_LONGBRANCH(builtin_verbosecall_enter);
770 /* Restore argument registers from stack. Keep stack 8-byte
773 M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* free argument stack */
774 M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
776 /* mark trace code */
780 #endif /* !defined(NDEBUG) */
783 /* emit_verbosecall_exit *******************************************************
785 Generates the code for the call trace.
787 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
789 *******************************************************************************/
792 void emit_verbosecall_exit(jitdata *jd)
800 /* get required compiler data */
808 /* mark trace code */
812 /* Keep stack 8-byte aligned. */
814 M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
815 M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for f and m */
817 switch (md->returntype.type) {
820 M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
821 M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
825 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
829 M_IST(REG_RESULT, REG_SP, 0 * 4);
833 M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
837 disp = dseg_add_address(cd, m);
838 M_DSEG_LOAD(REG_ITMP1, disp);
839 M_AST(REG_ITMP1, REG_SP, 1 * 4);
840 M_LONGBRANCH(builtin_verbosecall_exit);
842 /* Keep stack 8-byte aligned. */
844 M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
845 M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
847 /* mark trace code */
851 #endif /* !defined(NDEBUG) */
855 * These are local overrides for various environment variables in Emacs.
856 * Please do not remove this and leave it at the end of the file, where
857 * Emacs will automagically detect them.
858 * ---------------------------------------------------------------------
861 * indent-tabs-mode: t
865 * vim:noexpandtab:sw=4:ts=4: